公开(公告)号：US09443054B1

公开(公告)日：2016-09-13

申请号：US14256949

申请日：2014-04-19

申请人： Altera Corporation

发明人： Vaughn Betz ,  Caroline Pantofaru ,  Jordan Swartz

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  G06F17/5054 ,  G06F2217/84

摘要： A method for designing a system on a programmable logic device (PLD) is disclosed. Routing resources are selected for a user specified signal on the PLD in response to user specified routing constraints. Routing resources are selected for a non-user specified signal on the PLD without utilizing the user specified routing constraints.

公开(公告)号：US09361421B2

公开(公告)日：2016-06-07

申请号：US14152624

申请日：2014-01-10

申请人： Altera Corporation

发明人： David Samuel Goldman ,  Mark Bourgeault ,  Vaughn Betz ,  Alan Louis Herrmann

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  G06F17/5054 ,  G06F17/5072 ,  G06F2217/72

摘要： A method for designing a system on a target device includes assigning resources on the target device to static logic modules and partial reconfigurable (PR) modules in the system. The instances of one of the PR modules are placed and routed in parallel utilizing resources from those that are assigned. Other embodiments are also disclosed.

摘要翻译： 用于在目标设备上设计系统的方法包括将目标设备上的资源分配给系统中的静态逻辑模块和部分可重新配置（PR）模块。 其中一个PR模块的实例使用分配的那些资源进行并行布置和路由。 还公开了其他实施例。

公开(公告)号：US08732646B2

公开(公告)日：2014-05-20

申请号：US13847666

申请日：2013-03-20

申请人： Altera Corporation

发明人： Andy L. Lee ,  Cameron R. McClintock ,  Brian D. Johnson ,  Richard G. Cliff ,  Srinivas T. Reddy ,  Christopher F. Lane ,  Paul Leventis ,  Vaughn Betz ,  David Lewis

IPC分类号： G06F17/50 ,  G06F7/38 ,  H03K19/173

CPC分类号： H03K19/17736 ,  H03K19/177 ,  H03K19/17732 ,  H03K19/1778 ,  H03K19/17796

摘要： In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function block to be incorporated. An interface region is provided for interfacing the remaining LE array base signal routing architecture to the IP function block.

摘要翻译： 根据本发明的一个方面，通过中断LE阵列基本信号路由体系结构，在PLD的LE阵列内形成一个孔，使得留下用于IP功能块的孔。 提供接口区域用于将剩余的LE阵列基本信号路由体系结构与IP功能块进行接口。

公开(公告)号：US10242146B2

公开(公告)日：2019-03-26

申请号：US15132163

申请日：2016-04-18

申请人： Altera Corporation

发明人： David Samuel Goldman ,  Mark Bourgeault ,  Vaughn Betz ,  Alan Louis Herrmann

IPC分类号： G06F17/50

摘要： A method for designing a system on a target device includes assigning resources on the target device to static logic modules and partial reconfigurable (PR) modules in the system. The instances of one of the PR modules are placed and routed in parallel utilizing resources from those that are assigned. Other embodiments are also disclosed.

公开(公告)号：US10140411B2

公开(公告)日：2018-11-27

申请号：US15356791

申请日：2016-11-21

申请人： Altera Corporation

发明人： Vaughn Betz ,  Jordan Swartz ,  Vadim Gouterman

IPC分类号： G06F17/50

摘要： A method for designing a system to be implemented on a target device, the method including generating bounding boxes on the target device for nets in the system where a bounding box identifies routing resources available for routing a corresponding net in the bounding box. The nets in the system are assigned to a plurality of threads to be routed. The threads are executed so that a plurality of the nets are routed in parallel within their corresponding bounding box.

公开(公告)号：US20170337318A1

公开(公告)日：2017-11-23

申请号：US15663772

申请日：2017-07-30

申请人： Altera Corporation

发明人： Terry Borer ,  Gabriel Quan ,  Stephen D. Brown ,  Deshanand P. Singh ,  Chris Sanford ,  Vaughn Betz ,  Caroline Pantofaru ,  Jordan Swartz

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  G06F17/5054 ,  G06F17/5068

摘要： A method for designing a system on a target device utilizing programmable logic devices (PLDs) includes generating options for utilizing resources on the PLDs in response to user specified constraints. The options for utilizing the resources on the PLDs are refined independent of the user specified constraints.

公开(公告)号：US09754065B2

公开(公告)日：2017-09-05

申请号：US14052126

申请日：2013-10-11

申请人： Altera Corporation

发明人： Terry Borer ,  Gabriel Quan ,  Stephen D. Brown ,  Deshanand P. Singh ,  Chris Sanford ,  Vaughn Betz ,  Caroline Pantofaru ,  Jordan Swartz

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  G06F17/5054 ,  G06F17/5068

摘要： A method for designing a system on a target device utilizing programmable logic devices (PLDs) includes generating options for utilizing resources on the PLDs in response to user specified constraints. The options for utilizing the resources on the PLDs are refined independent of the user specified constraints.

公开(公告)号：US08935650B2

公开(公告)日：2015-01-13

申请号：US14245162

申请日：2014-04-04

申请人： Altera Corporation

发明人： Vaughn Betz ,  Jordan Swartz ,  Vadim Gouterman

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： A method for designing a system to be implemented on a target device includes generating bounding boxes on the target device for nets in the system where a bounding box identifies routing resources available for routing its corresponding net. The nets in the system are assigned to a plurality of threads to be routed. The threads are executed so that a plurality of the nets are routed in parallel within their corresponding bounding box.

摘要翻译： 一种用于设计要在目标设备上实现的系统的方法包括在系统中为网络生成目标设备上的边界框，其中边界框标识可用于路由其相应网络的路由资源。 系统中的网络被分配给要路由的多个线程。 执行线程使得多个网络在其对应的边界框内并行路由。

公开(公告)号：US20140258956A1

公开(公告)日：2014-09-11

申请号：US14281735

申请日：2014-05-19

申请人： Altera Corporation

发明人： David Lewis ,  Christopher Lane ,  Sarathy Partha Sribhashyam ,  Srinivas Perisetty ,  Tim Vanderhoek ,  Vaughn Betz ,  Thomas Yau-Tsun Wong ,  Andy L. Lee

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F17/5077 ,  H03K19/17784

摘要： A programmable logic device (PLD) includes a non-volatile memory, a configuration memory, and a control circuitry. The control circuitry couples to the non-volatile memory and to the configuration memory. A set of voltages are derived from the outputs of the control circuitry, and are applied to circuitry within the PLD.

摘要翻译： 可编程逻辑器件（PLD）包括非易失性存储器，配置存储器和控制电路。 控制电路耦合到非易失性存储器和配置存储器。 一组电压从控制电路的输出导出，并被应用于PLD内的电路。

公开(公告)号：US08739105B2

公开(公告)日：2014-05-27

申请号：US13957794

申请日：2013-08-02

申请人： Altera Corporation

发明人： Vaughn Betz ,  Jordan Swartz ,  Vadim Gouterman

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： A method for designing a system to be implemented on a target device includes generating bounding boxes on the target device for nets in the system where a bounding box identifies routing resources available for routing its corresponding net. The nets in the system are assigned to a plurality of threads to be routed. The threads are executed so that a plurality of the nets are routed in parallel within their corresponding bounding box.

摘要翻译： 一种用于设计要在目标设备上实现的系统的方法包括在系统中为网络生成目标设备上的边界框，其中边界框标识可用于路由其相应网络的路由资源。 系统中的网络被分配给要路由的多个线程。 执行线程使得多个网络在其对应的边界框内并行路由。