公开(公告)号：US09094014B2

公开(公告)日：2015-07-28

申请号：US14243641

申请日：2014-04-02

Applicant: Altera Corporation

Inventor： Andy L. Lee ,  Cameron R. McClintock ,  Brian D. Johnson ,  Richard G. Cliff ,  Srinivas T. Reddy ,  Christopher F. Lane ,  Paul Leventis ,  Vaughn Betz ,  David Lewis

IPC: G06F17/50 ,  H03K19/177

CPC classification number: H03K19/17736 ,  H03K19/177 ,  H03K19/17732 ,  H03K19/1778 ,  H03K19/17796

Abstract: In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function block to be incorporated. An interface region is provided for interfacing the remaining LE array base signal routing architecture to the IP function block.

公开(公告)号：US20140210515A1

公开(公告)日：2014-07-31

申请号：US14243641

申请日：2014-04-02

Applicant: Altera Corporation

Inventor： Andy L. Lee ,  Cameron R. McClintock ,  Brian D. Johnson ,  Richard G. Cliff ,  Srinivas T. Reddy ,  Christopher F. Lane ,  Paul Leventis ,  Vaughn Betz ,  David Lewis

IPC: H03K19/177

CPC classification number: H03K19/17736 ,  H03K19/177 ,  H03K19/17732 ,  H03K19/1778 ,  H03K19/17796

Abstract: In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function block to be incorporated. An interface region is provided for interfacing the remaining LE array base signal routing architecture to the IP function block.

Abstract translation: 根据本发明的一个方面，通过中断LE阵列基本信号路由体系结构，在PLD的LE阵列内形成一个孔，使得留下用于IP功能块的孔。 提供接口区域用于将剩余的LE阵列基本信号路由体系结构与IP功能块进行接口。

公开(公告)号：US08732646B2

公开(公告)日：2014-05-20

申请号：US13847666

申请日：2013-03-20

Applicant: Altera Corporation

Inventor： Andy L. Lee ,  Cameron R. McClintock ,  Brian D. Johnson ,  Richard G. Cliff ,  Srinivas T. Reddy ,  Christopher F. Lane ,  Paul Leventis ,  Vaughn Betz ,  David Lewis

IPC: G06F17/50 ,  G06F7/38 ,  H03K19/173

CPC classification number: H03K19/17736 ,  H03K19/177 ,  H03K19/17732 ,  H03K19/1778 ,  H03K19/17796

Abstract: In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function block to be incorporated. An interface region is provided for interfacing the remaining LE array base signal routing architecture to the IP function block.

Abstract translation: 根据本发明的一个方面，通过中断LE阵列基本信号路由体系结构，在PLD的LE阵列内形成一个孔，使得留下用于IP功能块的孔。 提供接口区域用于将剩余的LE阵列基本信号路由体系结构与IP功能块进行接口。