公开(公告)号：US09070679B2

公开(公告)日：2015-06-30

申请号：US12942918

申请日：2010-11-09

申请人： Albert Wu ,  Shiann-Ming Liou ,  Scott Wu

发明人： Albert Wu ,  Shiann-Ming Liou ,  Scott Wu

IPC分类号： H01L21/56 ,  H01L23/498 ,  H01L23/538

CPC分类号： H01L23/49833 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/17 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/07025 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/1579 ,  H01L2924/00

摘要： Embodiments of the present disclosure provide configurations for a semiconductor package and associated methods of fabricating the semiconductor package. A method of fabricating a semiconductor package includes attaching a semiconductor die to a first substrate, attaching a second substrate to the first substrate, wherein the semiconductor die is embedded in between the first substrate and the second substrate, and forming an electrically insulative structure to substantially encapsulate the semiconductor die, wherein forming the electrically insulative structure is performed subsequent to the second substrate being attached to the first substrate. Additional embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例提供了半导体封装的配置以及制造半导体封装的相关方法。 制造半导体封装的方法包括将半导体管芯附接到第一衬底，将第二衬底附接到第一衬底，其中半导体管芯被嵌入在第一衬底和第二衬底之间，并且形成电绝缘结构，以基本上 封装半导体管芯，其中在第二衬底附接到第一衬底之后执行形成电绝缘结构。 可以描述和/或要求保护附加实施例。

公开(公告)号：US09257410B2

公开(公告)日：2016-02-09

申请号：US13012644

申请日：2011-01-24

申请人： Albert Wu ,  Roawen Chen ,  Chung Chyung Han ,  Shiann-Ming Liou ,  Chien-Chuan Wei ,  Runzi Chang ,  Scott Wu ,  Chuan-Cheng Cheng

发明人： Albert Wu ,  Roawen Chen ,  Chung Chyung Han ,  Shiann-Ming Liou ,  Chien-Chuan Wei ,  Runzi Chang ,  Scott Wu ,  Chuan-Cheng Cheng

IPC分类号： H01L25/04 ,  H01L21/48 ,  H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00 ,  H01L23/367 ,  H01L23/00

CPC分类号： H01L25/04 ,  H01L21/486 ,  H01L21/565 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/13 ,  H01L23/147 ,  H01L23/3677 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/09 ,  H01L24/16 ,  H01L24/17 ,  H01L24/33 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13024 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81193 ,  H01L2224/83904 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of the present disclosure provide an apparatus comprising a semiconductor substrate having a first surface, a second surface that is disposed opposite to the first surface, wherein at least a portion of the first surface is recessed to form a recessed region of the semiconductor substrate, and one or more vias formed in the recessed region of the semiconductor substrate to provide an electrical or thermal pathway between the first surface and the second surface of the semiconductor substrate, and a die coupled to the semiconductor substrate, the die being electrically coupled to the one or more vias formed in the recessed region of the semiconductor substrate. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例提供了一种装置，包括具有第一表面的半导体衬底，与第一表面相对设置的第二表面，其中第一表面的至少一部分被凹入以形成半导体衬底的凹陷区域， 以及形成在半导体衬底的凹陷区域中以在半导体衬底的第一表面和第二表面之间提供电或热路径的一个或多个通孔，以及耦合到半导体衬底的管芯，该管芯电耦合到 形成在半导体衬底的凹陷区域中的一个或多个通孔。 可以描述和/或要求保护其他实施例。

公开(公告)号：US09034730B2

公开(公告)日：2015-05-19

申请号：US13015988

申请日：2011-01-28

申请人： Albert Wu ,  Roawen Chen ,  Chung Chyung Han ,  Shiann-Ming Liou ,  Chien-Chuan Wei ,  Runzi Chang ,  Scott Wu ,  Chuan-Cheng Cheng

发明人： Albert Wu ,  Roawen Chen ,  Chung Chyung Han ,  Shiann-Ming Liou ,  Chien-Chuan Wei ,  Runzi Chang ,  Scott Wu ,  Chuan-Cheng Cheng

IPC分类号： H01L21/762 ,  H01L25/04 ,  H01L21/48 ,  H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L25/00 ,  H01L23/367 ,  H01L23/00

CPC分类号： H01L25/04 ,  H01L21/486 ,  H01L21/565 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/13 ,  H01L23/147 ,  H01L23/3677 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/09 ,  H01L24/16 ,  H01L24/17 ,  H01L24/33 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13024 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81193 ,  H01L2224/83904 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of the present disclosure provide a method, comprising providing a semiconductor substrate having (i) a first surface and (ii) a second surface that is disposed opposite to the first surface, forming one or more vias in the first surface of the semiconductor substrate, the one or more vias initially passing through only a portion of the semiconductor substrate without reaching the second surface, forming a dielectric film on the first surface of the semiconductor substrate, forming a redistribution layer on the dielectric film, the redistribution layer being electrically coupled to the one or more vias, coupling one or more dies to the redistribution layer, forming a molding compound to encapsulate at least a portion of the one or more dies, and recessing the second surface of the semiconductor substrate to expose the one or more vias. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例提供一种方法，包括提供半导体衬底，其具有（i）第一表面和（ii）与第一表面相对设置的第二表面，在半导体衬底的第一表面中形成一个或多个通孔 一个或多个通孔最初仅通过半导体衬底的一部分而不到达第二表面，在半导体衬底的第一表面上形成电介质膜，在电介质膜上形成再分布层，再分配层电耦合 连接到所述一个或多个通孔，将一个或多个管芯耦合到所述再分布层，形成模制化合物以封装所述一个或多个管芯的至少一部分，以及使所述半导体衬底的所述第二表面凹陷以暴露所述一个或多个通孔 。 可以描述和/或要求保护其他实施例。

公开(公告)号：US08618654B2

公开(公告)日：2013-12-31

申请号：US13184304

申请日：2011-07-15

申请人： Sehat Sutardja ,  Albert Wu ,  Scott Wu

发明人： Sehat Sutardja ,  Albert Wu ,  Scott Wu

IPC分类号： H01L23/34

CPC分类号： H01L25/50 ,  H01L23/12 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/25 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2224/92224 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of the present disclosure provide a method that comprises providing a first die having a surface comprising a bond pad to route electrical signals of the first die and attaching the first die to a layer of a substrate. The method further comprises forming one or more additional layers of the substrate to embed the first die in the substrate and coupling a second die to the one or more additional layers, the second die having a surface comprising a bond pad to route electrical signals of the second die. The second die is coupled to the one or more additional layers such that electrical signals are routed between the first die and the second die.

公开(公告)号：US20110186992A1

公开(公告)日：2011-08-04

申请号：US13015988

申请日：2011-01-28

申请人： Albert Wu ,  Roawen Chen ,  Chung Chyung Han ,  Shiann-Ming Liou ,  Chien-Chuan Wei ,  Runzi Chang ,  Scott Wu ,  Chuan-Cheng Cheng

发明人： Albert Wu ,  Roawen Chen ,  Chung Chyung Han ,  Shiann-Ming Liou ,  Chien-Chuan Wei ,  Runzi Chang ,  Scott Wu ,  Chuan-Cheng Cheng

IPC分类号： H01L23/48 ,  H01L21/56

CPC分类号： H01L25/04 ,  H01L21/486 ,  H01L21/565 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/13 ,  H01L23/147 ,  H01L23/3677 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/09 ,  H01L24/16 ,  H01L24/17 ,  H01L24/33 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13024 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81193 ,  H01L2224/83904 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of the present disclosure provide a method, comprising providing a semiconductor substrate having (i) a first surface and (ii) a second surface that is disposed opposite to the first surface, forming one or more vias in the first surface of the semiconductor substrate, the one or more vias initially passing through only a portion of the semiconductor substrate without reaching the second surface, forming a dielectric film on the first surface of the semiconductor substrate, forming a redistribution layer on the dielectric film, the redistribution layer being electrically coupled to the one or more vias, coupling one or more dies to the redistribution layer, forming a molding compound to encapsulate at least a portion of the one or more dies, and recessing the second surface of the semiconductor substrate to expose the one or more vias. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例提供一种方法，包括提供半导体衬底，其具有（i）第一表面和（ii）与第一表面相对设置的第二表面，在半导体衬底的第一表面中形成一个或多个通孔 一个或多个通孔最初仅通过半导体衬底的一部分而不到达第二表面，在半导体衬底的第一表面上形成电介质膜，在电介质膜上形成再分布层，再分配层电耦合 连接到所述一个或多个通孔，将一个或多个管芯耦合到所述再分布层，形成模制化合物以封装所述一个或多个管芯的至少一部分，以及使所述半导体衬底的所述第二表面凹陷以暴露所述一个或多个通孔 。 可以描述和/或要求保护其他实施例。

公开(公告)号：US08338934B2

公开(公告)日：2012-12-25

申请号：US13049550

申请日：2011-03-16

申请人： Albert Wu ,  Scott Wu

发明人： Albert Wu ,  Scott Wu

IPC分类号： H01L23/22

CPC分类号： H01L24/82 ,  H01L23/3121 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/3512 ,  H01L2924/00

摘要： Embodiments of the present disclosure provide a substrate having (i) a first laminate layer, (ii) a second laminate layer, and (iii) a core material that is disposed between the first laminate layer and the second laminate layer; and a die attached to the first laminate layer, the die having an interposer bonded to a surface of an active side of the die, the surface comprising (i) a dielectric material and (ii) a bond pad to route electrical signals of the die, the interposer having a via formed therein, the via being electrically coupled to the bond pad to further route the electrical signals of the die, wherein the die and the interposer are embedded in the core material of the substrate. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例提供一种基板，其具有（i）第一层叠层，（ii）第二层叠层，以及（iii）设置在第一层叠层和第二层叠层之间的芯材料; 和模具，其附接到第一层压层，所述模具具有接合到所述管芯的有效侧的表面的插入件，所述表面包括（i）电介质材料和（ii）用于引导所述管芯的电信号的接合焊盘 所述插入件具有形成在其中的通孔，所述通孔电耦合到所述接合焊盘，以进一步布置所述管芯的电信号，其中所述管芯和所述插入件嵌入在所述衬底的芯材中。 可以描述和/或要求保护其他实施例。

公开(公告)号：US20110186998A1

公开(公告)日：2011-08-04

申请号：US13012644

申请日：2011-01-24

申请人： Albert Wu ,  Roawen Chen ,  Chung Chyung Han ,  Shiann-Ming Liou ,  Chien-Chuan Wei ,  Runzi Chang ,  Scott Wu ,  Chuan-Cheng Cheng

发明人： Albert Wu ,  Roawen Chen ,  Chung Chyung Han ,  Shiann-Ming Liou ,  Chien-Chuan Wei ,  Runzi Chang ,  Scott Wu ,  Chuan-Cheng Cheng

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L25/04 ,  H01L21/486 ,  H01L21/565 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/13 ,  H01L23/147 ,  H01L23/3677 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/09 ,  H01L24/16 ,  H01L24/17 ,  H01L24/33 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13024 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81193 ,  H01L2224/83904 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of the present disclosure provide an apparatus comprising a semiconductor substrate having a first surface, a second surface that is disposed opposite to the first surface, wherein at least a portion of the first surface is recessed to form a recessed region of the semiconductor substrate, and one or more vias formed in the recessed region of the semiconductor substrate to provide an electrical or thermal pathway between the first surface and the second surface of the semiconductor substrate, and a die coupled to the semiconductor substrate, the die being electrically coupled to the one or more vias formed in the recessed region of the semiconductor substrate. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例提供了一种装置，包括具有第一表面的半导体衬底，与第一表面相对设置的第二表面，其中第一表面的至少一部分被凹入以形成半导体衬底的凹陷区域， 以及形成在半导体衬底的凹陷区域中以在半导体衬底的第一表面和第二表面之间提供电或热路径的一个或多个通孔以及耦合到半导体衬底的管芯，该管芯电耦合到 形成在半导体衬底的凹陷区域中的一个或多个通孔。 可以描述和/或要求保护其他实施例。

公开(公告)号：US20120049364A1

公开(公告)日：2012-03-01

申请号：US13184304

申请日：2011-07-15

申请人： Sehat Sutardja ,  Albert Wu ,  Scott Wu

发明人： Sehat Sutardja ,  Albert Wu ,  Scott Wu

IPC分类号： H01L23/498 ,  H01L21/50

CPC分类号： H01L25/50 ,  H01L23/12 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/25 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2224/92224 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of the present disclosure provide a method that comprises providing a first die having a surface comprising a bond pad to route electrical signals of the first die and attaching the first die to a layer of a substrate. The method further comprises forming one or more additional layers of the substrate to embed the first die in the substrate and coupling a second die to the one or more additional layers, the second die having a surface comprising a bond pad to route electrical signals of the second die. The second die is coupled to the one or more additional layers such that electrical signals are routed between the first die and the second die.

摘要翻译： 本公开的实施例提供了一种方法，其包括提供第一管芯，其具有包括接合焊盘的表面以路由第一管芯的电信号并将第一管芯附接到衬底层。 该方法还包括形成基板的一个或多个附加层以将第一管芯嵌入衬底中并将第二管芯耦合到一个或多个附加层，第二管芯具有包括接合焊盘的表面，以将电信号 第二次死亡 第二管芯耦合到一个或多个附加层，使得电信号在第一管芯和第二管芯之间布线。

公开(公告)号：US20110227223A1

公开(公告)日：2011-09-22

申请号：US13049550

申请日：2011-03-16

申请人： Albert Wu ,  Scott Wu

发明人： Albert Wu ,  Scott Wu

IPC分类号： H01L23/498 ,  H01L21/603

CPC分类号： H01L24/82 ,  H01L23/3121 ,  H01L23/5389 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/3512 ,  H01L2924/00

摘要： Embodiments of the present disclosure provide a substrate having (i) a first laminate layer, (ii) a second laminate layer, and (iii) a core material that is disposed between the first laminate layer and the second laminate layer; and a die attached to the first laminate layer, the die having an interposer bonded to a surface of an active side of the die, the surface comprising (i) a dielectric material and (ii) a bond pad to route electrical signals of the die, the interposer having a via formed therein, the via being electrically coupled to the bond pad to further route the electrical signals of the die, wherein the die and the interposer are embedded in the core material of the substrate. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例提供一种基板，其具有（i）第一层叠层，（ii）第二层叠层，以及（iii）设置在第一层叠层和第二层叠层之间的芯材料; 和模具，其附接到第一层压层，所述模具具有接合到所述管芯的有效侧的表面的插入件，所述表面包括（i）电介质材料和（ii）用于引导所述管芯的电信号的接合焊盘 所述插入件具有形成在其中的通孔，所述通孔电耦合到所述接合焊盘，以进一步布置所述管芯的电信号，其中所述管芯和所述插入件嵌入在所述衬底的芯材中。 可以描述和/或要求保护其他实施例。

公开(公告)号：US20110186960A1

公开(公告)日：2011-08-04

申请号：US13007059

申请日：2011-01-14

申请人： Albert Wu ,  Roawen Chen ,  Chung Chyung Han ,  Shiann-Ming Liou ,  Chien-Chuan Wei ,  Runzi Chang ,  Scott Wu ,  Chuan-Cheng Cheng

发明人： Albert Wu ,  Roawen Chen ,  Chung Chyung Han ,  Shiann-Ming Liou ,  Chien-Chuan Wei ,  Runzi Chang ,  Scott Wu ,  Chuan-Cheng Cheng

IPC分类号： H01L27/04 ,  H01L23/488 ,  H01L21/60 ,  H01L21/98

CPC分类号： H01L25/04 ,  H01L21/486 ,  H01L21/565 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/13 ,  H01L23/147 ,  H01L23/3677 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/09 ,  H01L24/16 ,  H01L24/17 ,  H01L24/33 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13024 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/81193 ,  H01L2224/83904 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1515 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of the present disclosure provide a method comprising providing a semiconductor substrate having (i) a first surface and (ii) a second surface that is disposed opposite to the first surface, forming a dielectric film on the first surface of the semiconductor substrate, forming a redistribution layer on the dielectric film, electrically coupling one or more dies to the redistribution layer, forming a molding compound on the semiconductor substrate, recessing the second surface of the semiconductor substrate, forming one or more channels through the recessed second surface of the semiconductor substrate to expose the redistribution layer; and forming one or more package interconnect structures in the one or more channels, the one or more package interconnect structures being electrically coupled to the redistribution layer, the one or more package interconnect structures to route electrical signals of the one or more dies. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例提供了一种方法，包括提供具有（i）第一表面和（ii）与第一表面相对设置的第二表面的半导体衬底，在半导体衬底的第一表面上形成电介质膜，形成 电介质膜上的再分配层，将一个或多个管芯电耦合到再分布层，在半导体衬底上形成模制化合物，使半导体衬底的第二表面凹陷，通过半导体的凹陷的第二表面形成一个或多个沟道 衬底以暴露再分布层; 以及在所述一个或多个通道中形成一个或多个封装互连结构，所述一个或多个封装互连结构电耦合到所述再分布层，所述一个或多个封装互连结构用于布置所述一个或多个管芯的电信号。 可以描述和/或要求保护其他实施例。