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    Techniques for improving operand caching
    1.
    发明授权
    Techniques for improving operand caching 有权

    公开(公告)号：US11436016B2

    公开(公告)日：2022-09-06

    申请号：US16703833

    申请日：2019-12-04

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Anthony T. Gutierrez ,  Bradford M. Beckmann ,  Marcus Nathaniel Chow

    IPC: G06F9/30 ,  G06F9/38

    Abstract: A technique for determining whether a register value should be written to an operand cache or whether the register value should remain in and not be evicted from the operand cache is provided. The technique includes executing an instruction that accesses an operand that comprises the register value, performing one or both of a lookahead technique and a prediction technique to determine whether the register value should be written to an operand cache or whether the register value should remain in and not be evicted from the operand cache, and based on the determining, updating the operand cache.

    Performance for GPU exceptions
    4.
    发明授权
    Performance for GPU exceptions 有权

    公开(公告)号：US11249765B2

    公开(公告)日：2022-02-15

    申请号：US16109567

    申请日：2018-08-22

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Anthony T. Gutierrez

    IPC: G06F9/30 ,  G06F9/38 ,  G06T1/20

    Abstract: Techniques for improving performance of accelerated processing devices (“APDs”) when exceptions occur are provided. In APDs, the very large number of parallel processing execution units, and the complexity of the hardware used to execute a large number of work-items in parallel, means that APDs typically stall when an exception occurs (unlike in central processing units (“CPUs”), which are able to execute speculatively and out-of-order). However, the techniques provided herein allow at least some execution to occur past exceptions. Execution past an exception generating instruction occurs by executing instructions that would not lead to a corruption while skipping those that would lead to a corruption. After the exception has been satisfied, execution occurs in a replay mode in which the potentially exception-generating instruction is executed and in which instructions that did not execute in the exception-wait mode are executed. A mask and counter are used to control execution in replay mode.

    Selecting a precision level for executing a workload in an electronic device
    5.
    发明授权
    Selecting a precision level for executing a workload in an electronic device 有权

    公开(公告)号：US11150899B2

    公开(公告)日：2021-10-19

    申请号：US15948795

    申请日：2018-04-09

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Anthony T. Gutierrez ,  Sergey Blagodurov ,  Scott A. Moe ,  Xianwei Zhang ,  Jieming Yin ,  Matthew D. Sinclair

    IPC: G06F9/30 ,  G06F8/71 ,  G06N3/063 ,  G06N3/08

    Abstract: An electronic device includes a controller functional block and a computational functional block. During operation, while the computational functional block executes a test portion of a workload at at least one precision level, the controller functional block monitors a behavior of the computational functional block. Based on the behavior of the computational functional block while executing the test portion of the workload at the at least one precision level, the controller functional block selects a given precision level from among a set of two or more precision levels at which the computational functional block is to execute a remaining portion of the workload. The controller functional block then configures the computational block to execute the remaining portion of the workload at the given precision level.

    TECHNIQUES FOR IMPROVING OPERAND CACHING
    6.
    发明申请
    TECHNIQUES FOR IMPROVING OPERAND CACHING 有权

    公开(公告)号：US20210173650A1

    公开(公告)日：2021-06-10

    申请号：US16703833

    申请日：2019-12-04

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Anthony T. Gutierrez ,  Bradford M. Beckmann ,  Marcus Nathaniel Chow

    IPC: G06F9/30 ,  G06F9/38

    Abstract: A technique for determining whether a register value should be written to an operand cache or whether the register value should remain in and not be evicted from the operand cache is provided. The technique includes executing an instruction that accesses an operand that comprises the register value, performing one or both of a lookahead technique and a prediction technique to determine whether the register value should be written to an operand cache or whether the register value should remain in and not be evicted from the operand cache, and based on the determining, updating the operand cache.

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