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公开(公告)号:US10793946B1
公开(公告)日:2020-10-06
申请号:US16676017
申请日:2019-11-06
申请人: ASM IP Holding B.V.
发明人: Delphine Longrie , Antti Juhani Niskanen , Han Wang , Qi Xie , Jan Willem Maes , Shang Chen , Toshiharu Watarai , Takahiro Onuma , Dai Ishikawa , Kunitoshi Namba
IPC分类号: C23C16/02 , C23C16/06 , C23C16/34 , C23C16/44 , C23C16/455 , H01L21/768 , H01L21/285 , C23C16/56
摘要: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.
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公开(公告)号:US10014212B2
公开(公告)日:2018-07-03
申请号:US15622510
申请日:2017-06-14
申请人: ASM IP HOLDING B.V.
发明人: Shang Chen , Toshiharu Watarai , Takahiro Onuma , Dai Ishikawa , Kunitoshi Namba
IPC分类号: H01L21/768 , H01L21/285 , H01L23/532
CPC分类号: H01L21/7685 , H01L21/02068 , H01L21/28562 , H01L21/28568 , H01L21/3105 , H01L21/76823 , H01L21/76826 , H01L21/76849 , H01L21/76868 , H01L21/76883 , H01L23/53228 , H01L23/53238 , H01L23/53266
摘要: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.
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公开(公告)号:US20180151344A1
公开(公告)日:2018-05-31
申请号:US15703241
申请日:2017-09-13
申请人: ASM IP HOLDING B.V.
发明人: Antti J. Niskanen , Shang Chen , Viljami Pore
IPC分类号: H01L21/02 , H01L29/66 , C23C16/34 , C23C16/455
摘要: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).
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公开(公告)号:US20160079054A1
公开(公告)日:2016-03-17
申请号:US14855261
申请日:2015-09-15
申请人: ASM IP Holding B.V.
发明人: Shang Chen , Viljami Pore , Ryoko Yamada , Antti Juhani Niskanen
IPC分类号: H01L21/02
CPC分类号: H01L21/0228 , C23C16/045 , C23C16/345 , C23C16/45536 , C23C16/45553 , H01L21/0217 , H01L21/02274
摘要: Methods and precursors for forming silicon nitride films are provided. In some embodiments, silicon nitride can be deposited by atomic layer deposition (ALD), such as plasma enhanced ALD. In some embodiments, deposited silicon nitride can be treated with a plasma treatment. The plasma treatment can be a nitrogen plasma treatment. In some embodiments the silicon precursors for depositing the silicon nitride comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%). In some embodiments, a method for depositing silicon nitride films comprises a multi-step plasma treatment.
摘要翻译: 提供了形成氮化硅膜的方法和前体。 在一些实施例中,氮化硅可以通过原子层沉积(ALD)沉积,例如等离子体增强的ALD。 在一些实施例中,沉积的氮化硅可以用等离子体处理。 等离子体处理可以是氮等离子体处理。 在一些实施方案中,用于沉积氮化硅的硅前体包含碘配体。 当沉积到诸如FinFETS或其它类型的多栅极FET的三维结构上时,氮化硅膜可以具有相对均匀的垂直和水平部分的蚀刻速率。 在一些实施方案中,本公开的各种氮化硅膜具有小于具有稀释HF(0.5%)的热氧化物去除速率的一半的蚀刻速率。 在一些实施例中,沉积氮化硅膜的方法包括多步等离子体处理。
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公开(公告)号:US11784043B2
公开(公告)日:2023-10-10
申请号:US17406919
申请日:2021-08-19
申请人: ASM IP Holding B.V.
发明人: Toshiya Suzuki , Viljami J. Pore , Shang Chen , Ryoko Yamada , Dai Ishikawa , Kunitoshi Namba
IPC分类号: H01L21/02
CPC分类号: H01L21/0228 , H01L21/0217 , H01L21/02208 , H01L21/02274
摘要: Methods of forming silicon nitride thin films on a substrate in a reaction space under high pressure are provided. The methods can include a plurality of plasma enhanced atomic layer deposition (PEALD) cycles, where at least one PEALD deposition cycle comprises contacting the substrate with a nitrogen plasma at a process pressure of 20 Torr to 500 Torr within the reaction space. In some embodiments the silicon precursor is a silyl halide, such as H2SiI2. In some embodiments the processes allow for the deposition of silicon nitride films having improved properties on three dimensional structures. For example, such silicon nitride films can have a ratio of wet etch rates on the top surfaces to the sidewall of about 1:1 in dilute HF.
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公开(公告)号:US11289327B2
公开(公告)日:2022-03-29
申请号:US16574542
申请日:2019-09-18
申请人: ASM IP HOLDING B.V.
发明人: Antti J. Niskanen , Shang Chen , Viljami Pore
IPC分类号: H01L21/02 , C23C16/34 , C23C16/455 , H01L29/66
摘要: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).
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公开(公告)号:US11133181B2
公开(公告)日:2021-09-28
申请号:US16543917
申请日:2019-08-19
申请人: ASM IP Holding B.V.
发明人: Toshiya Suzuki , Viljami J. Pore , Shang Chen , Ryoko Yamada , Dai Ishikawa , Kunitoshi Namba
IPC分类号: H01L21/02
摘要: Methods of forming silicon nitride thin films on a substrate in a reaction space under high pressure are provided. The methods can include a plurality of plasma enhanced atomic layer deposition (PEALD) cycles, where at least one PEALD deposition cycle comprises contacting the substrate with a nitrogen plasma at a process pressure of 20 Torr to 500 Torr within the reaction space. In some embodiments the silicon precursor is a silyly halide, such as H2SiI2. In some embodiments the processes allow for the deposition of silicon nitride films having improved properties on three dimensional structures. For example, such silicon nitride films can have a ratio of wet etch rates on the top surfaces to the sidewall of about 1:1 in dilute HF.
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公开(公告)号:US20210082684A1
公开(公告)日:2021-03-18
申请号:US17101428
申请日:2020-11-23
申请人: ASM IP HOLDING B.V.
发明人: Antti J. Niskanen , Shang Chen , Viljami Pore , Atsuki Fukazawa , Hideaki Fukuda , Suvi P. Haukka
IPC分类号: H01L21/02
摘要: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).
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公开(公告)号:US20180068844A1
公开(公告)日:2018-03-08
申请号:US15706435
申请日:2017-09-15
申请人: ASM IP Holding B.V.
发明人: Shang Chen , Viljami Pore , Ryoko Yamada , Antti Juhani Niskanen
IPC分类号: H01L21/02 , C23C16/04 , C23C16/455 , C23C16/34
CPC分类号: H01L21/0228 , C23C16/045 , C23C16/345 , C23C16/45536 , C23C16/45553 , H01L21/0217 , H01L21/02274
摘要: Methods and precursors for forming silicon nitride films are provided. In some embodiments, silicon nitride can be deposited by atomic layer deposition (ALD), such as plasma enhanced ALD. In some embodiments, deposited silicon nitride can be treated with a plasma treatment. The plasma treatment can be a nitrogen plasma treatment. In some embodiments the silicon precursors for depositing the silicon nitride comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%). In some embodiments, a method for depositing silicon nitride films comprises a multi-step plasma treatment.
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公开(公告)号:US20170358482A1
公开(公告)日:2017-12-14
申请号:US15622510
申请日:2017-06-14
申请人: ASM IP HOLDING B.V.
发明人: Shang Chen , Toshiharu Watarai , Takahiro Onuma , Dai Ishikawa , Kunitoshi Namba
IPC分类号: H01L21/768 , H01L23/532 , H01L21/285
CPC分类号: H01L21/7685 , H01L21/28562 , H01L21/28568 , H01L21/32051 , H01L21/32055 , H01L21/76823 , H01L21/76826 , H01L21/76868 , H01L23/53228 , H01L23/53238 , H01L23/53266
摘要: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.
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