公开(公告)号：US20200321209A1

公开(公告)日：2020-10-08

申请号：US16904166

申请日：2020-06-17

申请人： ASM IP Holding B.V.

发明人： Dai Ishikawa ,  Atsuki Fukazawa ,  Eiichiro Shiba ,  Shinya Ueda ,  Taishi Ebisudani ,  SeungJu Chun ,  YongMin Yoo ,  YoonKi Min ,  SeYong Kim ,  JongWan Choi

IPC分类号： H01L21/02 ,  H01L21/311

摘要： A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.

公开(公告)号：US10410857B2

公开(公告)日：2019-09-10

申请号：US14834290

申请日：2015-08-24

申请人： ASM IP Holding B.V.

发明人： Toshiya Suzuki ,  Viljami J. Pore ,  Shang Chen ,  Ryoko Yamada ,  Dai Ishikawa ,  Kunitoshi Namba

IPC分类号： H01L21/02

摘要： Methods of forming silicon nitride thin films on a substrate in a reaction space under high pressure are provided. The methods can include a plurality of plasma enhanced atomic layer deposition (PEALD) cycles, where at least one PEALD deposition cycle comprises contacting the substrate with a nitrogen plasma at a process pressure of 20 Torr to 500 Torr within the reaction space. In some embodiments the silicon precursor is a silyl halide, such as H2SiI2. In some embodiments the processes allow for the deposition of silicon nitride films having improved properties on three dimensional structures. For example, such silicon nitride films can have a ratio of wet etch rates on the top surfaces to the sidewall of about 1:1 in dilute HF.

公开(公告)号：US20170316940A1

公开(公告)日：2017-11-02

申请号：US15650686

申请日：2017-07-14

申请人： ASM IP Holding B.V.

发明人： Dai Ishikawa ,  Atsuki Fukazawa ,  Toshiharu Watarai

IPC分类号： H01L21/033 ,  H01L21/02 ,  H01L21/311

CPC分类号： H01L21/0337 ,  C23C16/345 ,  C23C16/45536 ,  C23C16/45553 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0338 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31144

摘要： A method of forming spacers for spacer-defined multiple pattering (SDMP), includes: depositing a pattern transfer film by PEALD on the entire patterned surface of a template using halogenated silane as a precursor and nitrogen as a reactant at a temperature of 200° C. or less, which pattern transfer film is a silicon nitride film; dry-etching the template using a fluorocarbon as an etchant, and thereby selectively removing a portion of the pattern transfer film formed on a top of a core material and a horizontal portion of the pattern transfer film while leaving the core material and a vertical portion of the pattern transfer film as a vertical spacer, wherein a top of the vertical spacer is substantially flat; and dry-etching the core material, whereby the template has a surface patterned by the vertical spacer on a underlying layer.

公开(公告)号：US20160093485A1

公开(公告)日：2016-03-31

申请号：US14498036

申请日：2014-09-26

申请人： ASM IP Holding B.V.

发明人： Akiko Kobayashi ,  Akinori Nakano ,  Dai Ishikawa ,  Kiyohiro Matsushita

IPC分类号： H01L21/02

CPC分类号： H01L21/0228 ,  C23C16/45542 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/02359 ,  H01L21/02362 ,  H01L21/3105

摘要： A method is for hydrophobization of a surface of a silicon-containing film by atomic layer deposition (ALD), wherein the surface is subjected to atmospheric exposure. The method includes: (i) providing a substrate with a silicon-containing film formed thereon; and (ii) forming on a surface of the silicon-containing film a hydrophobic atomic layer as a protective layer subjected to atmospheric exposure, by exposing the surface to a silicon-containing treating gas without exciting the gas. The treating gas is capable of being chemisorbed on the surface to form a hydrophobic atomic layer thereon.

摘要翻译： 一种方法是通过原子层沉积（ALD）使含硅膜的表面疏水化，其中该表面经受大气暴露。 该方法包括：（i）向基板提供其上形成的含硅膜; 和（ii）通过将表面暴露于含硅处理气体而不使气体激发，在作为经受大气暴露的保护层的疏水性原子层的表面上形成含硅膜的表面。 处理气体能够在表面上被化学吸附以在其上形成疏水原子层。

公开(公告)号：US20150118864A1

公开(公告)日：2015-04-30

申请号：US14069244

申请日：2013-10-31

申请人： ASM IP Holding B.V.

发明人： Akinori Nakano ,  Shintaro Ueda ,  Dai Ishikawa ,  Kiyohiro Matsushita

IPC分类号： H01L21/02

CPC分类号： H01L21/02126 ,  H01L21/02274 ,  H01L21/02277 ,  H01L21/0234 ,  H01L21/02348

摘要： A method for forming a gap-fill SiOCH film on a patterned substrate includes: (i) providing a substrate having recessed features on its surface; (ii) filling the recessed features of the substrate with a SiOCH film which is flowable and non-porous; (iii) after completion of step (ii), exposing the SiOCH film to a plasma including a hydrogen plasma; and (iv) curing the plasma-exposed SiOCH film with UV light.

摘要翻译： 在图案化衬底上形成间隙填充SiOCH膜的方法包括：（i）提供在其表面上具有凹陷特征的衬底; （ii）用可流动且无孔的SiOCH膜填充基底的凹陷特征; （iii）步骤（ii）完成后，将SiOCH膜暴露于包括氢等离子体的等离子体; 和（iv）用UV光固化等离子体暴露的SiOCH膜。

公开(公告)号：US08785215B2

公开(公告)日：2014-07-22

申请号：US13901341

申请日：2013-05-23

申请人： ASM IP Holding B.V.

发明人： Akiko Kobayashi ,  Yosuke Kimura ,  Dai Ishikawa ,  Kiyohiro Matsushita

IPC分类号： H01L21/00 ,  H01L21/768

CPC分类号： H01L21/76825 ,  C23C16/045 ,  C23C16/45527 ,  H01L21/02167 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/3105 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76831

摘要： A method for repairing process-related damage of a dielectric film includes: (i) adsorbing a first gas containing silicon on a surface of the damaged dielectric film without depositing a film in the absence of reactive species, (ii) adsorbing a second gas containing silicon on a surface of the dielectric film, followed by applying reactive species to the surface of the dielectric film, to form a monolayer film thereon, and (iii) repeating step (ii). The duration of exposing the surface to the first gas in step (i) is longer than the duration of exposing the surface to the second gas in step (ii).

摘要翻译： 一种用于修复电介质膜的工艺相关损伤的方法包括：（i）在不存在反应性物质的情况下，在不沉积膜的情况下，在损坏的电介质膜的表面上吸附含硅的第一气体，（ii）吸附含有 在电介质膜的表面上形成硅，然后在电介质膜的表面上施加反应性物质，以在其上形成单层膜，和（iii）重复步骤（ii）。 在步骤（i）中将表面暴露于第一气体的持续时间比在步骤（ii）中将表面暴露于第二气体的持续时间长。

公开(公告)号：US20210175052A1

公开(公告)日：2021-06-10

申请号：US17109080

申请日：2020-12-01

申请人： ASM IP Holding B.V.

发明人： Yuki Takahashi ,  Dai Ishikawa

IPC分类号： H01J37/32 ,  H01L21/02

摘要： Examples of a substrate processing apparatus include a chamber, a shielding component that is a susceptor or an upper cover provided in the chamber, and a bevel mask that is provided in the chamber and has an inclined surface on which a vertical distance from the shielding component increases toward a center side of the shielding component.

公开(公告)号：US10720322B2

公开(公告)日：2020-07-21

申请号：US16167225

申请日：2018-10-22

申请人： ASM IP Holding B.V.

发明人： Dai Ishikawa ,  Atsuki Fukazawa ,  Eiichiro Shiba ,  Shinya Ueda ,  Taishi Ebisudani ,  SeungJu Chun ,  YongMin Yoo ,  YoonKi Min ,  SeYong Kim ,  JongWan Choi

IPC分类号： H01L21/02 ,  H01L21/311

摘要： A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing the sidewall portion of the film by wet etching which removes the sidewall portion of the film more predominantly than the top/bottom portion according to the different chemical resistance properties.

公开(公告)号：US20190259612A1

公开(公告)日：2019-08-22

申请号：US15900425

申请日：2018-02-20

申请人： ASM IP Holding B.V.

发明人： Toshihisa Nozawa ,  Dai Ishikawa ,  Tomohiro Kubota

IPC分类号： H01L21/033 ,  H01L21/311 ,  H01L21/027 ,  H01L21/02

摘要： A method of spacer-defined direct patterning in semiconductor fabrication includes: providing a photoresist structure having a target width of lines; trimming the photoresist structures such that a width of each trimmed photoresist structure is smaller than the target width; depositing an oxide film on the template, thereby entirely covering with the oxide film an exposed top surface of the template and the trimmed photoresist structures; etching the oxide film-covered template to remove an unwanted portion of the oxide film without removing the trimmed photoresist structures so as to form vertical spacers isolated from each other, each spacer substantially maintaining the target width and being constituted by the trimmed photoresist structures and a vertical portion of the oxide film covering sidewalls of the trimmed photoresist structures; and etching the spacer-formed template to transfer a pattern constituted by the spacers to the template.

公开(公告)号：US10041166B2

公开(公告)日：2018-08-07

申请号：US15795768

申请日：2017-10-27

申请人： ASM IP Holding B.V.

发明人： Delphine Longrie ,  Antti Juhani Niskanen ,  Han Wang ,  Qi Xie ,  Jan Willem Maes ,  Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC分类号： C23C16/02 ,  C23C16/455 ,  H01L21/285 ,  H01L21/768

CPC分类号： C23C16/02 ,  C23C16/06 ,  C23C16/345 ,  C23C16/4404 ,  C23C16/4405 ,  C23C16/45525 ,  C23C16/45536 ,  C23C16/56 ,  H01L21/28562 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76883

摘要： Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.