-
公开(公告)号：US20150220100A1
公开(公告)日：2015-08-06
申请号：US14169986
申请日：2014-01-31
申请人： ANALOG DEVICES, INC.
发明人： Haiyang Zhu , Wenhua W. Yang , Nathan T. Egan
CPC分类号： G05F3/02 , H03M1/1009 , H03M1/1019 , H03M1/742
摘要： In an example embodiment, a circuit is provided that includes a current source with a calibrated trim circuit whose output current varies with transconductance of the current source, and tracks a current mismatch between the current source and another current source under varying bias currents and temperatures. The trim circuit may include at least one calibration digital to analog converter (CAL DAC), which may be driven by a bias circuit generating current proportional to the transconductance of the current source. In an example embodiment, the trim circuit may include at least two CAL DACs, whose output current may vary with bias current only, and with bias current and temperature. A method to calibrate the CAL DACs includes varying calibration settings of the CAL DACs under different bias currents until the output current of the trim circuit substantially accurately tracks the current mismatch under disparate bias currents and temperatures.
摘要翻译： 在一个示例性实施例中，提供一种电路，其包括电流源，该电流源具有经校准的微调电路，其输出电流随着电流源的跨导而变化，并且在变化的偏置电流和温度下跟踪电流源与另一电流源之间的电流失配。 微调电路可以包括至少一个校准数模转换器（CAL DAC），其可以由产生与电流源的跨导成比例的电流的偏置电路来驱动。 在一个示例性实施例中，微调电路可以包括至少两个CAL DAC，其输出电流可以仅随偏置电流而变化，并且具有偏置电流和温度。 校准CAL DAC的方法包括在不同偏置电流下对CAL DAC进行变化的校准设置，直到微调电路的输出电流在不同的偏置电流和温度下基本上精确地跟踪电流失配。
-
公开(公告)号：US10579086B2
公开(公告)日：2020-03-03
申请号：US16102637
申请日：2018-08-13
申请人： Analog Devices, Inc.
发明人： Haiyang Zhu , Wenhua W. Yang , Nathan T. Egan
摘要： In an example embodiment, a circuit is provided that includes a current source with a calibrated trim circuit whose output current varies with transconductance of the current source, and tracks a current mismatch between the current source and another current source under varying bias currents and temperatures. The trim circuit may include at least one calibration digital to analog converter (CAL DAC), which may be driven by a bias circuit generating current proportional to the transconductance of the current source. In an example embodiment, the trim circuit may include at least two CAL DACs, whose output current may vary with bias current only, and with bias current and temperature. A method to calibrate the CAL DACs includes varying calibration settings of the CAL DACs under different bias currents until the output current of the trim circuit substantially accurately tracks the current mismatch under disparate bias currents and temperatures.
-
公开(公告)号：US09543974B1
公开(公告)日：2017-01-10
申请号：US14858239
申请日：2015-09-18
申请人： ANALOG DEVICES, INC.
发明人： Wenhua W. Yang
CPC分类号： H03M1/066 , H03M1/0863 , H03M1/1033
摘要： In some converter architectures, unary digital-to-analog (DAC) converter elements generate an analog output which represents the digital input signal. Thermometer codes trigger an appropriate number of DAC elements to generate the analog output. The DAC elements are not all perfectly weighted, and mismatch shaping is often used to dynamically equalize the usage of each DAC element during data conversion to average out the mismatches. Unfortunately, mismatch shaping adds additional switching and can worsen the effect of switching errors. Switching errors which are non-linearly dependent on the input causes a second order distortion if the sum of the switching errors corresponding to a set of DAC elements is not zero. Prior to data conversion, calibration can select a subset of DAC elements having a lesser sum of switching errors for data conversion. Other (redundant) DAC elements are not used at all or shut off permanently.
摘要翻译： 在一些转换器架构中，一元数模（DAC）转换器元件产生一个代表数字输入信号的模拟输出。 温度计代码触发适当数量的DAC元件产生模拟输出。 DAC元件不是完全加权的，并且通常使用失配整形来动态地平衡数据转换期间每个DAC元件的使用情况，以平衡不匹配。 不幸的是，失配形状增加了额外的切换，并且可能会加剧切换错误的影响。 如果与一组DAC元件相对应的切换误差的和不为零，则非线性地依赖于输入的切换误差将导致二阶失真。 在数据转换之前，校准可以选择DAC元件的子集，其数据转换的转换误差之和较小。 其他（冗余）DAC元件根本不使用或永久关闭。
-
4.发明授权公开(公告)号：US09231614B2
公开(公告)日：2016-01-05
申请号：US14298459
申请日：2014-06-06
申请人： ANALOG DEVICES, INC.
发明人： Jose Barreiro Silva , Jialin Zhao , Wenhua W. Yang
摘要： The present disclosure describes a mechanism to digitally correct for the static mismatch of the digital-to-analog converter (DAC) in at least the first-stage of a multi-stage noise shaping (MASH) analog-to-digital converter (ADC). The correction is applicable to continuous-time implementations, and is especially attractive for high-speed applications.
摘要翻译： 本公开描述了在多级噪声整形（MASH）模数转换器（ADC）的至少第一级数字校正数模转换器（DAC）的静态失配的机制， 。 该校正适用于连续时间实现，对于高速应用特别有吸引力。
-
公开(公告)号：US10048714B2
公开(公告)日：2018-08-14
申请号：US14169986
申请日：2014-01-31
申请人： ANALOG DEVICES, INC.
发明人： Haiyang Zhu , Wenhua W. Yang , Nathan T. Egan
摘要： In an example embodiment, a circuit is provided that includes a current source with a calibrated trim circuit whose output current varies with transconductance of the current source, and tracks a current mismatch between the current source and another current source under varying bias currents and temperatures. The trim circuit may include at least one calibration digital to analog converter (CAL DAC), which may be driven by a bias circuit generating current proportional to the transconductance of the current source. In an example embodiment, the trim circuit may include at least two CAL DACs, whose output current may vary with bias current only, and with bias current and temperature. A method to calibrate the CAL DACs includes varying calibration settings of the CAL DACs under different bias currents until the output current of the trim circuit substantially accurately tracks the current mismatch under disparate bias currents and temperatures.
-
-
-
-
搜索结果
5 条记录 (耗时 0.013 秒)
