公开(公告)号：US08466521B2

公开(公告)日：2013-06-18

申请号：US12724435

申请日：2010-03-16

Applicant: Chin-Long Wey ,  Chin-Fong Chiu ,  Ying-Zong Juang ,  Hann-Huei Tsai ,  Chen-Fu Lin

Inventor： Chin-Long Wey ,  Chin-Fong Chiu ,  Ying-Zong Juang ,  Hann-Huei Tsai ,  Chen-Fu Lin

IPC: H01L31/119

CPC classification number: H01L29/78 ,  G01N27/414 ,  H01L29/4958

Abstract: A hydrogen ion-sensitive field effect transistor and a manufacturing method thereof are provided. The hydrogen ion-sensitive field effect transistor includes a semiconductor substrate, an insulating layer, a transistor gate, and a sensing film. A gate area is defined on the semiconductor substrate having a source area and a drain area. The insulating layer is formed within the gate area on the semiconductor substrate. The transistor gate is deposited within the gate area and includes a first gate layer. Further, the first gate layer is an aluminum layer, and a sensing window is defined thereon. The sensing film is an alumina film formed within the sensing window by oxidizing the first gate layer. Thus, the sensing film is formed without any film deposition process, and consequently the manufacturing method is simplified.

Abstract translation: 提供氢离子敏感场效应晶体管及其制造方法。 氢离子敏感场效应晶体管包括半导体衬底，绝缘层，晶体管栅极和感测膜。 在具有源极区域和漏极区域的半导体衬底上限定栅极区域。 绝缘层形成在半导体衬底上的栅极区域内。 晶体管栅极沉积在栅极区内并且包括第一栅极层。 此外，第一栅极层是铝层，并且在其上限定感测窗口。 感测膜是通过氧化第一栅极层而在感测窗内形成的氧化铝膜。 因此，在没有任何膜沉积工艺的情况下形成感测膜，因此简化了制造方法。

公开(公告)号：US20110169056A1

公开(公告)日：2011-07-14

申请号：US12724435

申请日：2010-03-16

Applicant: Chin-Long Wey ,  Chin-Fong Chiu ,  Ying-Zong Juang ,  Hann-Huei Tsai ,  Chen-Fu Lin

Inventor： Chin-Long Wey ,  Chin-Fong Chiu ,  Ying-Zong Juang ,  Hann-Huei Tsai ,  Chen-Fu Lin

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/78 ,  G01N27/414 ,  H01L29/4958

Abstract: A hydrogen ion-sensitive field effect transistor and a manufacturing method thereof are provided. The hydrogen ion-sensitive field effect transistor includes a semiconductor substrate, an insulating layer, a transistor gate, and a sensing film. A gate area is defined on the semiconductor substrate having a source area and a drain area. The insulating layer is formed within the gate area on the semiconductor substrate. The transistor gate is deposited within the gate area and includes a first gate layer. Further, the first gate layer is an aluminum layer, and a sensing window is defined thereon. The sensing film is an alumina film formed within the sensing window by oxidizing the first gate layer. Thus, the sensing film is formed without any film deposition process, and consequently the manufacturing method is simplified.

Abstract translation: 提供氢离子敏感场效应晶体管及其制造方法。 氢离子敏感场效应晶体管包括半导体衬底，绝缘层，晶体管栅极和感测膜。 在具有源极区域和漏极区域的半导体衬底上限定栅极区域。 绝缘层形成在半导体衬底上的栅极区域内。 晶体管栅极沉积在栅极区内并且包括第一栅极层。 此外，第一栅极层是铝层，并且在其上限定感测窗口。 感测膜是通过氧化第一栅极层而在感测窗内形成的氧化铝膜。 因此，在没有任何膜沉积工艺的情况下形成感测膜，因此简化了制造方法。

公开(公告)号：US20100277203A1

公开(公告)日：2010-11-04

申请号：US12489624

申请日：2009-06-23

Applicant: Ting Hsu Chien ,  Chi Sheng Lin ,  Chin-Long Wey ,  Chun-Ming Huang ,  Ying-Zong Juang

Inventor： Ting Hsu Chien ,  Chi Sheng Lin ,  Chin-Long Wey ,  Chun-Ming Huang ,  Ying-Zong Juang

IPC: H03K5/19

CPC classification number: H03K5/19 ,  H03K5/1534 ,  H03L7/0891 ,  H03L7/10

Abstract: An edge-missing detector structure includes a first detector, a first delay unit, a first logic gate, a second detector, a second delay unit, and a second logic gate. After being input separately into the edge-missing detector structure, a first reference signal and a first clock signal are detected by the first and second detectors and then subjected to cycle suppression by the first and second logic gates, respectively, so as to generate a second reference signal and a second clock signal which present a phase difference less than 2π. Moreover, the edge-missing detector structure generates a compensative current corresponding to the number of occurrences of cycle suppression. Thus, a phase-locked loop (PLL) using the edge-missing detector structure can avoid cycle slip problems and achieve fast acquisition of phase lock.

Abstract translation: 边缘丢失检测器结构包括第一检测器，第一延迟单元，第一逻辑门，第二检测器，第二延迟单元和第二逻辑门。 在分别输入到边缘丢失检测器结构中之后，第一和第二检测器检测第一参考信号和第一时钟信号，然后分别由第一和第二逻辑门进行循环抑制，以产生 第二参考信号和呈现小于2＆pgr的相位差的第二时钟信号。 此外，边缘丢失检测器结构产生对应于循环抑制的出现次数的补偿电流。 因此，使用边缘丢失检测器结构的锁相环（PLL）可以避免周期滑移问题并实现锁相的快速采集。

公开(公告)号：US20060105543A1

公开(公告)日：2006-05-18

申请号：US11270523

申请日：2005-11-10

Applicant: Fu-Yuan Xiao ,  Ying-Zong Juang ,  Chin-Fong Chiu

Inventor： Fu-Yuan Xiao ,  Ying-Zong Juang ,  Chin-Fong Chiu

IPC: H01L21/30

CPC classification number: B81C1/00246 ,  B81C2203/0735 ,  H01L21/764 ,  H01L27/0617 ,  H01L27/08 ,  H01L28/10

Abstract: A fully CMOS compatible MEMS multi-project wafer process comprises coating a layer of thick photoresist on a wafer surface, patterning the photoresist to define a micromachining region, and performing a micromachining in the micromachining region to form suspended microstructures.

Abstract translation: 完全CMOS兼容的MEMS多工程晶片工艺包括在晶片表面上涂覆一层厚的光致抗蚀剂，图案化光致抗蚀剂以限定微加工区域，并在微加工区域中进行微机械加工以形成悬浮的微结构。

公开(公告)号：US10656184B1

公开(公告)日：2020-05-19

申请号：US16426011

申请日：2019-05-30

Applicant: Ying-Zong Juang ,  Hann-Huei Tsai ,  Po-Chang Wu ,  Yu-Chen Liu ,  Chih-Yuan Yeh

Inventor： Ying-Zong Juang ,  Hann-Huei Tsai ,  Po-Chang Wu ,  Yu-Chen Liu ,  Chih-Yuan Yeh

IPC: G01R15/14 ,  H03F3/45 ,  G01R1/20 ,  H03F3/393 ,  G01R19/00

Abstract: A signal process circuit includes a signal modulation unit, a first resistor, a second resistor, a first discharge unit, a second discharge unit and a discharge detection unit. The signal modulation unit is used to modulate an input signal for generating a modulated signal. The first resistor is coupled between the signal modulation unit and an operation node. The second resistor is coupled between the operation node and the signal modulation unit. The first discharge unit is coupled to the signal modulation unit. The discharge unit is coupled to the signal modulation unit. The discharge detection unit is coupled to the first discharge unit, the operation node and the second discharge unit for detecting an output common voltage and control a discharge path accordingly.

公开(公告)号：US20130153969A1

公开(公告)日：2013-06-20

申请号：US13419156

申请日：2012-03-13

Applicant: Ying-Zong JUANG ,  Hann-Huei Tsai ,  Hsin-Hao Liao ,  Chen-Fu Lin

Inventor： Ying-Zong JUANG ,  Hann-Huei Tsai ,  Hsin-Hao Liao ,  Chen-Fu Lin

IPC: H01L29/66

CPC classification number: G01N27/4145

Abstract: A structure for a metal-oxide-semiconductor field-effect transistor (MOSFET) sensor is provided. The structure includes a MOSFET, a sensing membrane, and a reference electrode. The reference electrode and the sensing membrane are formed on the first surface of the MOSFET and are arranged in such a way that the reference electrode and the sensing membrane are uniformly and electrically coupled to each other. Thus, the electric field between the sensing membrane and the reference electrode is uniformly distributed therebetween to stabilize the working signal of the MOSFET sensor.

Abstract translation: 提供了一种用于金属氧化物半导体场效应晶体管（MOSFET）传感器的结构。 该结构包括MOSFET，感测膜和参考电极。 参考电极和感测膜形成在MOSFET的第一表面上并且被布置成使得参考电极和感测膜彼此均匀且电耦合。 因此，感测膜和参考电极之间的电场均匀地分布在其间，以稳定MOSFET传感器的工作信号。

公开(公告)号：US20110133256A1

公开(公告)日：2011-06-09

申请号：US12708546

申请日：2010-02-19

Applicant: Chin-Fong Chiu ,  Ying Zong Juang ,  Hann Huei Tsai ,  Sheng-Hsiang Tseng ,  Chen-Fu Lin

Inventor： Chin-Fong Chiu ,  Ying Zong Juang ,  Hann Huei Tsai ,  Sheng-Hsiang Tseng ,  Chen-Fu Lin

IPC: H01L29/84

CPC classification number: B81C1/00246 ,  B81B2203/0118 ,  B81B2207/015 ,  B81C2203/0714 ,  B81C2203/0735 ,  G01F1/28 ,  H01L27/0617

Abstract: The present invention discloses a CMOS-MEMS cantilever structure. The CMOS-MEMS cantilever structure includes a substrate, a circuit structure, and a cantilever beam. The substrate has a circuit area and a sensor unit area defined thereon. The circuit structure is formed in the circuit area. The cantilever beam is disposed in the sensor unit area with one end floating above the substrate and the other end connecting to the circuit structure. With the above arrangement, the manufacturing process of CMOS-MEMS cantilever structure of this invention can be simplified. Furthermore, the structure of the cantilever beam is thinned down and therefore has a higher sensitivity.

Abstract translation: 本发明公开了一种CMOS-MEMS悬臂结构。 CMOS-MEMS悬臂结构包括基板，电路结构和悬臂梁。 基板具有限定在其上的电路区域和传感器单元区域。 电路结构形成在电路区域中。 悬臂梁设置在传感器单元区域中，其一端浮在基板上方，另一端连接到电路结构。 通过上述结构，可以简化本发明的CMOS-MEMS悬臂结构的制造工艺。 此外，悬臂梁的结构变薄，因此具有较高的灵敏度。

公开(公告)号：US07769360B2

公开(公告)日：2010-08-03

申请号：US11703182

申请日：2007-02-07

Applicant: Hsien-Ku Chen ,  Shey-Shi Lu ,  Da-Chiang Chang ,  Ying-Zong Juang ,  Chin-Fong Chiu

Inventor： Hsien-Ku Chen ,  Shey-Shi Lu ,  Da-Chiang Chang ,  Ying-Zong Juang ,  Chin-Fong Chiu

IPC: H04B1/26

CPC classification number: H04B1/18

Abstract: An adapter for RF front end processor chip wherein the RF front end processor chip includes a low noise amplifier which is used to receive a RF filter signal so as to generate a first signal. An adapter is used to receive a first signal so as to induce and generate a second signal and a third signal which is electrically reverse. Then a frequency mixer of the RF front end processor chip is used to receive the second signal and the third signal and a resonant signal, the second signal and the third signal are used to generate a medium frequency signal. Wherein, adapter includes a primary measured coil.

Abstract translation: 一种用于RF前端处理器芯片的适配器，其中RF前端处理器芯片包括用于接收RF滤波器信号以产生第一信号的低噪声放大器。 适配器用于接收第一信号，以便产生第二信号和电反向的第三信号。 然后使用RF前端处理器芯片的混频器来接收第二信号和第三信号，并且使用谐振信号，第二信号和第三信号来产生中频信号。 其中，适配器包括主要测量线圈。

公开(公告)号：US20100098585A1

公开(公告)日：2010-04-22

申请号：US12333990

申请日：2008-12-12

Applicant: Chin-Fong CHIU ,  Ying-Zong Juang ,  Hann-Huei Tsai ,  Chen-Fu Lin

Inventor： Chin-Fong CHIU ,  Ying-Zong Juang ,  Hann-Huei Tsai ,  Chen-Fu Lin

IPC: B01J19/00

CPC classification number: B01L3/502707 ,  B01L2200/0689 ,  B01L2300/0636 ,  B01L2300/0816 ,  B01L2400/0439

Abstract: A biosensor package structure with a micro-fluidic channel is provided. The biosensor package structure includes a substrate, a biochip, and a cover. The substrate has a first surface, a second surface, and an opening. The biochip is attached on the first surface. A bio-sensing area of the biochip is exposed to the opening of the substrate. The cover is attached on the second surface to cover the opening so as to form a micro-fluidic channel. By implementing the invention, the manufacturing process of the biosensor is simplified and the productivity is increased.

Abstract translation: 提供具有微流体通道的生物传感器封装结构。 生物传感器封装结构包括基板，生物芯片和盖。 基板具有第一表面，第二表面和开口。 生物芯片附着在第一表面上。 生物芯片的生物感测区域暴露于基底的开口。 盖子安装在第二表面上以覆盖开口以形成微流体通道。 通过实施本发明，简化了生物传感器的制造过程，提高了生产率。

公开(公告)号：US20090155948A1

公开(公告)日：2009-06-18

申请号：US11959282

申请日：2007-12-18

Applicant: Chen-Fu Lin ,  Hann-Huei Tsai ,  Ying-Zong Juang ,  Chin-Fong Chiu

Inventor： Chen-Fu Lin ,  Hann-Huei Tsai ,  Ying-Zong Juang ,  Chin-Fong Chiu

IPC: H01L21/8238

CPC classification number: G01N27/128 ,  B81B2201/0214 ,  B81C1/00246 ,  B81C2203/0714 ,  B81C2203/0735

Abstract: A manufacture method for CMOS sensor, which comprise of steps such as: forming protection layer on a substrate having multiple device structural layers, then using first photo-resist layer as mask for etching to form patterned molecular sensing layer, then forming third photo resist layer and etching protection layer and substrate so as to remove partial substrate underneath the sensor structure.

Abstract translation: 一种用于CMOS传感器的制造方法，其包括以下步骤：在具有多个器件结构层的衬底上形成保护层，然后使用第一光致抗蚀剂层作为蚀刻掩模以形成图案化分子感测层，然后形成第三光致抗蚀剂层 以及蚀刻保护层和衬底，以去除传感器结构下方的部分衬底。