Flip chip contact (FCC) power package
    5.
    发明授权
    Flip chip contact (FCC) power package 有权
    倒装芯片接触(FCC)电源封装

    公开(公告)号:US08564049B2

    公开(公告)日:2013-10-22

    申请号:US11894240

    申请日:2008-03-31

    IPC分类号: H01L29/66

    摘要: This invention discloses a power device package for containing, protecting and providing electrical contacts for a power transistor. The power device package includes a top and bottom lead frames for directly no-bump attaching to the power transistor. The power transistor is attached to the bottom lead frame as a flip-chip with a source contact and a gate contact directly no-bumping attaching to the bottom lead frame. The power transistor has a bottom drain contact attaching to the top lead frame. The top lead frame further includes an extension for providing a bottom drain electrode substantially on a same side with the bottom lead frame. In a preferred embodiment, the power device package further includes a joint layer between device metal of source, gate or drain and top or bottom lead frame, through applying ultrasonic energy. In another embodiment, a layer of conductive epoxy or adhesive, a solder paste, a carbon paste, or other types of attachment agents for direct no-bumping attaching the power transistor to one of the top and bottom lead frames.

    摘要翻译: 本发明公开了一种功率器件封装,用于容纳,保护和提供功率晶体管的电触头。 功率器件封装包括用于直接不连接到功率晶体管的顶部和底部引线框架。 功率晶体管作为具有源极接触的倒装芯片附接到底部引线框架,并且栅极接触件直接地不连接到底部引线框架上。 功率晶体管具有附接到顶部引线框架的底部漏极接触。 顶部引线框架还包括用于提供与底部引线框架基本上在同一侧上的底部漏极电极的延伸部分。 在优选实施例中,功率器件封装还包括通过施加超声波能量的源极,栅极或漏极以及顶部或底部引线框架的器件金属之间的接合层。 在另一个实施方案中,导电环氧树脂或粘合剂层,焊膏,碳糊或其它类型的附着剂用于将功率晶体管附接到顶引线框架和底引线框架之一的直接无凸起。

    Flip chip contact (FCC) power package
    7.
    发明申请
    Flip chip contact (FCC) power package 有权
    倒装芯片接触(FCC)电源封装

    公开(公告)号:US20080211070A1

    公开(公告)日:2008-09-04

    申请号:US11894240

    申请日:2008-03-31

    IPC分类号: H01L23/495

    摘要: This invention discloses a power device package for containing, protecting and providing electrical contacts for a power transistor. The power device package includes a top and bottom lead frames for directly no-bump attaching to the power transistor. The power transistor is attached to the bottom lead frame as a flip-chip with a source contact and a gate contact directly no-bumping attaching to the bottom lead frame. The power transistor has a bottom drain contact attaching to the top lead frame. The top lead frame further includes an extension for providing a bottom drain electrode substantially on a same side with the bottom lead frame. In a preferred embodiment, the power device package further includes a joint layer between device metal of source, gate or drain and top or bottom lead frame, through applying ultrasonic energy. In another embodiment, a layer of conductive epoxy or adhesive, a solder paste, a carbon paste, or other types of attachment agents for direct no-bumping attaching the power transistor to one of the top and bottom lead frames.

    摘要翻译: 本发明公开了一种功率器件封装,用于容纳,保护和提供功率晶体管的电触头。 功率器件封装包括用于直接不连接到功率晶体管的顶部和底部引线框架。 功率晶体管作为具有源极接触的倒装芯片附接到底部引线框架,并且栅极接触件直接地不连接到底部引线框架上。 功率晶体管具有附接到顶部引线框架的底部漏极接触。 顶部引线框架还包括用于提供与底部引线框架基本上在同一侧上的底部漏极电极的延伸部分。 在优选实施例中,功率器件封装还包括通过施加超声波能量的源极,栅极或漏极以及顶部或底部引线框架的器件金属之间的接合层。 在另一个实施方案中,导电环氧树脂或粘合剂层,焊膏,碳糊或其它类型的附着剂用于将功率晶体管附接到顶引线框架和底引线框架之一的直接无凸起。