公开(公告)号：US20060017169A1

公开(公告)日：2006-01-26

申请号：US11168559

申请日：2005-06-29

Applicant: Panayotis Andricacos ,  Hariklia Deligianni ,  John Dukovic ,  Daniel Edelstein ,  Wilma Horkans ,  Chao-Kun Hu ,  Jeffrey Hurd ,  Kenneth Rodbell ,  Cyprian Uzoh ,  Kwong-Hon Wong

Inventor： Panayotis Andricacos ,  Hariklia Deligianni ,  John Dukovic ,  Daniel Edelstein ,  Wilma Horkans ,  Chao-Kun Hu ,  Jeffrey Hurd ,  Kenneth Rodbell ,  Cyprian Uzoh ,  Kwong-Hon Wong

IPC: H01L23/48 ,  H01L21/44

CPC classification number: C25D3/38 ,  C25D5/022 ,  H01L21/2885 ,  H01L21/76877 ,  H01L21/76885

Abstract: A process is described for the fabrication of submicton interconnect structures for integrated circuit chips. Void-free and seamless conductors are obtained by electroplating Cu from baths that contain additives and are conventionally used to deposit level, bright, ductile, and low-stress Cu metal. The capability of this method to superfill features without leaving voids or seams is unique and superior to that of other deposition approaches. The electromigration resistance of structures making use of CU electroplated in this manner is superior to the electromigration resistance of AlCu structures or structures fabricated using Cu deposited by methods other than electroplating.

Abstract translation: 描述了用于集成电路芯片的亚微米互连结构的制造的过程。 通过从包含添加剂的浴中电镀Cu获得无空隙和无缝导体，并且通常用于沉积水平，光亮，延展性和低应力Cu金属。 这种方法在不留下空隙或接缝的情况下超滤特征的能力是独一无二的，优于其他沉积方法。 以这种方式电镀Cu的结构的电迁移阻力优于AlCu结构或使用不是电镀方法沉积的Cu制造的结构的电迁移电阻。

公开(公告)号：US20050199502A1

公开(公告)日：2005-09-15

申请号：US11123117

申请日：2005-05-06

Applicant: Panayotis Andricacos ,  Hariklia Deligianni ,  Wilma Horkans ,  Keith Kwietniak ,  Michael Lane ,  Sandra Malhotra ,  Fenton McFeely ,  Conal Murray ,  Kenneth Rodbell ,  Philippe Vereecken

Inventor： Panayotis Andricacos ,  Hariklia Deligianni ,  Wilma Horkans ,  Keith Kwietniak ,  Michael Lane ,  Sandra Malhotra ,  Fenton McFeely ,  Conal Murray ,  Kenneth Rodbell ,  Philippe Vereecken

IPC: C25D5/18 ,  C25D7/12 ,  C25D5/02

CPC classification number: C25D5/18 ,  C25D7/12 ,  Y10S428/926 ,  Y10T428/12493 ,  Y10T428/12528 ,  Y10T428/12771 ,  Y10T428/12778 ,  Y10T428/12903

Abstract: A conductive material is electroplated onto a platable resistive metal barrier layer(s) employing a plating bath optionally comprising a super filling additive and a suppressor, and by changing the current or voltage as a function of the area of plated metal. A structure is also provided that comprises a substrate, a platable metal barrier layer(s) located on the substrate and a relatively continuous uniform electroplated layer of a conductive material located on the platable resistive metal barrier layer.

Abstract translation: 导电材料电镀在可镀敷的电阻金属阻挡层上，该层使用任选地包含超填充添加剂和抑制剂的电镀槽，并且通过改变作为电镀金属面积的函数的电流或电压。 还提供了一种结构，其包括衬底，位于衬底上的可镀金属阻挡层和位于可镀电阻金属阻挡层上的导电材料的相对连续的均匀电镀层。