公开(公告)号：US08830783B2

公开(公告)日：2014-09-09

申请号：US12929138

申请日：2011-01-03

申请人： Sachin Satish Idgunji ,  Hemangi Umakant Gajjewar ,  Vincent Phillipe Schuppe ,  Yew Keong Chong ,  Hsin-Yu Chen

发明人： Sachin Satish Idgunji ,  Hemangi Umakant Gajjewar ,  Vincent Phillipe Schuppe ,  Yew Keong Chong ,  Hsin-Yu Chen

IPC分类号： G11C8/00 ,  G11C11/419 ,  G11C11/418 ,  G11C11/41 ,  G11C11/413 ,  G11C8/08 ,  G11C7/22 ,  G11C8/10 ,  G11C8/16 ,  G11C11/412

CPC分类号： G11C7/222 ,  G11C8/08 ,  G11C8/10 ,  G11C8/16 ,  G11C11/41 ,  G11C11/412 ,  G11C11/413 ,  G11C11/418 ,  G11C11/419

摘要： A semiconductor memory storage device is disclosed. The memory comprises a plurality of storage cells for storing data each storage cell comprising an access control device for providing the storage cell with access to or isolation from a data access port in response to an access control signal, access control circuitry for transmitting the access control signal along an access control line to control a plurality of the access control devices connected to the access control line. The access control circuitry responds to a data access request signal by increasing a voltage level supplied to the access control line to a first voltage level at a first average rate and then in response to receipt of a further signal increasing the voltage level supplied to the access control line to the predetermined higher voltage level, in such a way that a further average rate of increase of the voltage level from the first to the predetermined higher voltage level is lower than the first average rate of increase to the first level.

摘要翻译： 公开了一种半导体存储器存储装置。 存储器包括用于存储数据的多个存储单元，每个存储单元包括访问控制设备，用于响应于访问控制信号向存储单元提供对数据访问端口的访问或与数据访问端口的隔离，存取控制电路用于发送访问控制 信号沿着访问控制线路控制连接到访问控制线路的多个访问控制设备。 访问控制电路通过将提供给访问控制线的电压电平以第一平均速率增加到第一电压电平来响应于数据访问请求信号，然后响应于接收到增加提供给访问的电压电平的另外的信号 控制线到预定的较高电压电平，使得从第一电压到预定的较高电压电平的电压电平的进一步的平均增加率低于第一平均增长率至第一电平。

公开(公告)号：US08611172B2

公开(公告)日：2013-12-17

申请号：US13476218

申请日：2012-05-21

申请人： Amaranth Shyanmugam ,  Bikas Maiti ,  Vincent Phillipe Schuppe ,  Yew Keong Chong ,  Martin Jay Kinkade ,  Hsin-Yu Chen

发明人： Amaranth Shyanmugam ,  Bikas Maiti ,  Vincent Phillipe Schuppe ,  Yew Keong Chong ,  Martin Jay Kinkade ,  Hsin-Yu Chen

IPC分类号： G11C7/00

CPC分类号： G11C7/02 ,  G11C8/08 ,  G11C11/418

摘要： A semiconductor memory storage device having a plurality of storage cells for storing data, each storage cell comprising an access control device and access control circuitry. The access control circuitry is configured to respond to a data access request signal to access a selected storage cell connected to a corresponding selected access control line to: control the voltage control switching circuitry to connect the at least one capacitor to the voltage supply line such that the at least one capacitor is charged by the voltage supply line and a voltage level on the voltage supply line is reduced; and to control the access control line switching circuitry to connect the selected access control line to the voltage supply line having the reduced voltage level.

摘要翻译： 一种具有用于存储数据的多个存储单元的半导体存储器存储装置，每个存储单元包括访问控制装置和访问控制电路。 访问控制电路被配置为响应数据访问请求信号以访问连接到相应的所选访问控制线路的所选择的存储单元，以便：控制电压控制切换电路以将至少一个电容器连接到电压供应线，使得 所述至少一个电容器由所述电压供给线充电，并且所述电压供给线上的电压电平减小; 并且控制访问控制线路切换电路将所选择的访问控制线路连接到具有降低的电压电平的电压供应线路。

公开(公告)号：US20120170390A1

公开(公告)日：2012-07-05

申请号：US12929138

申请日：2011-01-03

申请人： Sachin Satish Idgunji ,  Hemangi Umakant Gajjewar ,  Vincent Phillipe Schuppe ,  Yew Keong Chong ,  Hsin-Yu Chen

发明人： Sachin Satish Idgunji ,  Hemangi Umakant Gajjewar ,  Vincent Phillipe Schuppe ,  Yew Keong Chong ,  Hsin-Yu Chen

IPC分类号： G11C7/22 ,  G06F17/50 ,  G11C7/12

CPC分类号： G11C7/222 ,  G11C8/08 ,  G11C8/10 ,  G11C8/16 ,  G11C11/41 ,  G11C11/412 ,  G11C11/413 ,  G11C11/418 ,  G11C11/419

摘要： A semiconductor memory storage device is disclosed. The memory comprises a plurality of storage cells for storing data each storage cell comprising an access control device for providing the storage cell with access to or isolation from a data access port in response to an access control signal, access control circuitry for transmitting the access control signal along an access control line to control a plurality of the access control devices connected to the access control line. The access control circuitry responds to a data access request signal by increasing a voltage level supplied to the access control line to a first voltage level at a first average rate and then in response to receipt of a further signal increasing the voltage level supplied to the access control line to the predetermined higher voltage level, in such a way that a further average rate of increase of the voltage level from the first to the predetermined higher voltage level is lower than the first average rate of increase to the first level.

摘要翻译： 公开了一种半导体存储器存储装置。 存储器包括用于存储数据的多个存储单元，每个存储单元包括访问控制设备，用于响应于访问控制信号向存储单元提供对数据访问端口的访问或与数据访问端口的隔离，存取控制电路用于发送访问控制 信号沿着访问控制线路控制连接到访问控制线路的多个访问控制设备。 访问控制电路通过将提供给访问控制线的电压电平以第一平均速率增加到第一电压电平来响应于数据访问请求信号，然后响应于接收到增加提供给访问的电压电平的另外的信号 控制线到预定的较高电压电平，使得从第一电压到预定的较高电压电平的电压电平的进一步的平均增加率低于第一平均增长率至第一电平。