公开(公告)号：US08830114B2

公开(公告)日：2014-09-09

申请号：US13510638

申请日：2010-09-30

Applicant: Tomoyoshi Yasue ,  Tomoyoshi Kushida

Inventor： Tomoyoshi Yasue ,  Tomoyoshi Kushida

IPC: G01S13/04 ,  G01S13/56 ,  G01S13/87 ,  G01S13/536 ,  G01S13/00 ,  G08B13/16

CPC classification number: G01S13/56 ,  G01S13/04 ,  G01S13/87 ,  G08B13/1627

Abstract: A mobile object detecting apparatus includes first radiation detecting means; and second radiation detecting means for radiating an electromagnetic wave having the same frequency as the electromagnetic wave radiated by the first radiation detecting means such that the radiated electromagnetic wave passes near a point in the first radiation detecting means from which the electromagnetic wave is radiated, and detecting a standing wave which is generated due to reflection of the radiated electromagnetic wave at an object; wherein a distance, over which the electromagnetic wave radiated by the first radiation detecting means travels until it reaches near the first radiation detecting means, corresponds to a distance of an integral multiple of a wave length of a half cycle of the electromagnetic waves radiated by the radiation detecting means plus a wave length of a predetermined period which is smaller than the half cycle.

Abstract translation: 移动物体检测装置包括第一辐射检测装置; 以及第二辐射检测装置，用于辐射具有与由第一辐射检测装置辐射的电磁波相同频率的电磁波，使得辐射电磁波通过靠近辐射电磁波的第一辐射检测装置中的一点;以及 检测由于物体处的辐射电磁波的反射而产生的驻波; 其中由第一辐射检测装置辐射的电磁波行进直到其到达第一辐射检测装置附近的距离对应于由第一辐射检测装置辐射的电磁波的半周期的波长的整数倍的距离， 辐射检测装置加上小于半周期的预定周期的波长。

公开(公告)号：US20080023795A1

公开(公告)日：2008-01-31

申请号：US11902978

申请日：2007-09-27

Applicant: Shinya YAMAZAKI ,  Tomoyoshi KUSHIDA ,  Takahide SUGIYAMA

Inventor： Shinya YAMAZAKI ,  Tomoyoshi KUSHIDA ,  Takahide SUGIYAMA

IPC: H01L27/082 ,  H01L21/02 ,  H01L29/30

CPC classification number: H01L29/868 ,  H01L29/32

Abstract: With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an intermediate semiconductor region in which complex defects are formed. The method comprises introducing impurities (for example, carbon), which are the same kind of impurities intrinsically contained in the intermediate semiconductor region, into the intermediate semiconductor region, and irradiating the intermediate semiconductor region with helium ions to form point defects.

Abstract translation: 对于常规装置，由于每个硅晶片的固有杂质的浓度不同，所以复合缺陷的数量因每个半导体器件而不同。 因此，半导体器件之间的特性存在不期望的变化。 本发明提供一种制造PIN型二极管的方法，其包括形成复杂缺陷的中间半导体区域。 该方法包括将与中间半导体区域本征含有的相同种类的杂质的杂质（例如碳）引入中间半导体区域，并且用氦离子照射中间半导体区域以形成点缺陷。

公开(公告)号：US5905294A

公开(公告)日：1999-05-18

申请号：US787682

申请日：1997-01-23

Applicant: Tomoyoshi Kushida

Inventor： Tomoyoshi Kushida

IPC: H01L29/06 ,  H01L21/265 ,  H01L21/336 ,  H01L29/10 ,  H01L29/423 ,  H01L29/739 ,  H01L29/78

CPC classification number: H01L29/66712 ,  H01L29/1095 ,  H01L29/42324 ,  H01L29/7802 ,  H01L21/26586 ,  H01L29/0619

Abstract: A field-effect semiconductor device has a gate pad at the outside of an area of a semiconductor element and island regions of a conductivity type opposite that of a substrate of the device at surfaces of the device under the gate pad. When voltage is applied to the semiconductor device's drain, depletion layers form and extend to the opposite side of the substrate from each of the island regions and become continuous with one another. Thus, the voltage applied to the device's insulation layers is limited and a high rated voltage of the device can be obtained. Further, this arrangement provides a wide contact area between the gate pad and the gate wiring because meshed gate wiring is formed in the area between the island regions. In this way, insulation film having no contact holes in the island regions and contact holes in the body region may be formed without replacing masks by alternating the opening with for introducing impurities in the island region and the opening width in the body region.

Abstract translation: 场效应半导体器件在半导体元件的区域的外侧具有栅极焊盘，并且在栅极焊盘下方的器件的表面处具有与器件的衬底的导电类型相反的岛状区域。 当电压施加到半导体器件的漏极时，耗尽层从每个岛区域形成并延伸到衬底的相对侧并且彼此连续。 因此，施加到器件绝缘层的电压是有限的，并且可以获得器件的高额定电压。 此外，这种布置提供了栅极焊盘和栅极布线之间的宽接触面积，因为在岛状区域之间的区域中形成有栅极栅极布线。 以这种方式，可以形成在岛状区域中不具有接触孔的绝缘膜和体区域中的接触孔，而不用通过交替开口替换掩模，以在岛区域中引入杂质和体区域中的开口宽度。

公开(公告)号：US07569914B2

公开(公告)日：2009-08-04

申请号：US11902978

申请日：2007-09-27

Applicant: Shinya Yamazaki ,  Tomoyoshi Kushida ,  Takahide Sugiyama

Inventor： Shinya Yamazaki ,  Tomoyoshi Kushida ,  Takahide Sugiyama

IPC: H01L29/30

CPC classification number: H01L29/868 ,  H01L29/32

Abstract: With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an intermediate semiconductor region in which complex defects are formed. The method comprises introducing impurities (for example, carbon), which are the same kind of impurities intrinsically contained in the intermediate semiconductor region, into the intermediate semiconductor region, and irradiating the intermediate semiconductor region with helium ions to form point defects.

公开(公告)号：US20060281263A1

公开(公告)日：2006-12-14

申请号：US11436616

申请日：2006-05-19

Applicant: Shinya Yamazaki ,  Tomoyoshi Kushida ,  Takahide Sugiyama

Inventor： Shinya Yamazaki ,  Tomoyoshi Kushida ,  Takahide Sugiyama

IPC: H01L21/336

CPC classification number: H01L29/868 ,  H01L29/32

Abstract: With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an intermediate semiconductor region in which complex defects are formed. The method comprises introducing impurities (for example, carbon), which are the sane kind of impurities intrinsically contained in the intermediate semiconductor region, into the intermediate semiconductor region, and irradiating the intermediate semiconductor region with helium ions to form point defects.

公开(公告)号：US06930353B2

公开(公告)日：2005-08-16

申请号：US10694947

申请日：2003-10-29

Applicant: Katsuhiko Nishiwaki ,  Tomoyoshi Kushida

Inventor： Katsuhiko Nishiwaki ,  Tomoyoshi Kushida

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/739 ,  H01L29/76

CPC classification number: H01L29/0696 ,  H01L29/0839 ,  H01L29/7397

Abstract: It is intended to provide a field-effective-type semiconductor device that can let low ON-resistance and non-excessive short-circuit current go together by effectively using its channel width and prevents device from destruction. In a field-effective-type semiconductor device, a semiconductor region arranged between gate electrodes 106 has stripe-patterned structure consisting of an N+ emitter region 104 and a P emitter region. The P emitter region is constituted by P channel region 103 of low concentration and P+ emitter region 100 of high concentration. The N+ emitter region 104, the P channel region 103, and the P+ emitter region 100 are in contact with the emitter electrode 109. Thereby, a channel width X is limited to the extent that is enough for ON current under normal operation state. That is, low ON-resistance and not excessive short-circuit current can go together in the field-effective-type semiconductor device.

Abstract translation: 旨在提供一种场效应型半导体器件，其可以通过有效地使用其沟道宽度并且防止器件破坏而使低导通电阻和非过度短路电流一起。 在现场有效型半导体器件中，布置在栅电极106之间的半​​导体区域具有由N + +发射极区域104和P发射极区域构成的条纹图案化结构。 P发射极区域由低浓度的P沟道区域103和高浓度的P + +发射极区域100构成。 N +发射极区域104，P沟道区域103和P + +发射极区域100与发射极电极109接触。由此，通道宽度X为 限于在正常运行状态下对ON电流足够的程度。 也就是说，在场效应型半导体器件中，低导通电阻而不是过度的短路电流可以一起放在一起。

公开(公告)号：US06855983B1

公开(公告)日：2005-02-15

申请号：US09435766

申请日：1999-11-08

Applicant: Tomoyoshi Kushida

Inventor： Tomoyoshi Kushida

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/739 ,  H01L29/78 ,  H01L29/76 ,  H01L29/94 ,  H01L27/095 ,  H01L29/861 ,  H01L31/062

CPC classification number: H01L29/7813 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/7391 ,  H01L29/872

Abstract: A trench gate type semiconductor device has an ON resistance that has been reduced. The device has a drain electrode on one side of the substrate and has a drift region, channel region, source region, and a source electrode on the other side. The channel region is sandwiched between a trench gate region covered with insulating film. Current passes when a positive bias voltage is applied to the trench region, and current is cut off when a negative bias voltage is applied.

Abstract translation: 沟槽栅型半导体器件具有已经降低的导通电阻。 该器件在衬底的一侧具有漏电极，并且在另一侧具有漂移区，沟道区，源极区和源电极。 沟道区夹在覆盖有绝缘膜的沟槽栅极区域之间。 当正偏置电压施加到沟槽区时，电流通过，当施加负偏置电压时，电流被切断。

公开(公告)号：US06200868B1

公开(公告)日：2001-03-13

申请号：US09126722

申请日：1998-07-31

Applicant: Akira Mase ,  Tomoyoshi Kushida

Inventor： Akira Mase ,  Tomoyoshi Kushida

IPC: H01L21336

CPC classification number: H01L29/7395 ,  H01L29/1095 ,  H01L29/42372

Abstract: A side insulation layer is formed on a side wall of a gate electrode by oxidizing (or nitrizing) a substance of the gate electrode, so that the gate electrode is insulated from the semiconductor substrate with the side insulation layer and a gate insulation film. The gap between the gate electrode and the semiconductor substrate is greater around the side wall of the gate electrode than around the center thereof. The gap between the side wall of the gate electrode and the semiconductor substrate is densely filled with an insulating substance.

Abstract translation: 通过使栅电极的物质氧化（或氮化），使栅电极与侧绝缘层和栅极绝缘膜与半导体基板绝缘而在栅电极的侧壁上形成侧绝缘层。 栅电极和半导体衬底之间的间隙围绕栅电极的侧壁大于其中心周围。 栅电极的侧壁与半导体衬底之间的间隙被绝缘物质密集地填充。

公开(公告)号：US20120235850A1

公开(公告)日：2012-09-20

申请号：US13510638

申请日：2010-09-30

Applicant: Tomoyoshi Yasue ,  Tomoyoshi Kushida

Inventor： Tomoyoshi Yasue ,  Tomoyoshi Kushida

IPC: G01S13/56

CPC classification number: G01S13/56 ,  G01S13/04 ,  G01S13/87 ,  G08B13/1627

Abstract: A mobile object detecting apparatus includes first radiation detecting means ; and second radiation detecting means for radiating an electromagnetic wave having the same frequency as the electromagnetic wave radiated by the first radiation detecting means such that the radiated electromagnetic wave passes near a point in the first radiation detecting means from which the electromagnetic wave is radiated, and detecting a standing wave which is generated due to reflection of the radiated electromagnetic wave at an object; wherein a distance, over which the electromagnetic wave radiated by the first radiation detecting means travels until it reaches near the first radiation detecting means, corresponds to a distance of an integral multiple of a wave length of a half cycle of the electromagnetic waves radiated by the radiation detecting means plus a wave length of a predetermined period which is smaller than the half cycle.

Abstract translation: 移动物体检测装置包括第一辐射检测装置; 以及第二辐射检测装置，用于辐射具有与由第一辐射检测装置辐射的电磁波相同频率的电磁波，使得辐射电磁波通过靠近辐射电磁波的第一辐射检测装置中的一点;以及 检测由于物体处的辐射电磁波的反射而产生的驻波; 其中由第一辐射检测装置辐射的电磁波行进直到其到达第一辐射检测装置附近的距离对应于由第一辐射检测装置辐射的电磁波的半周期的波长的整数倍的距离， 辐射检测装置加上小于半周期的预定周期的波长。

公开(公告)号：US07507646B2

公开(公告)日：2009-03-24

申请号：US11436616

申请日：2006-05-19

Applicant: Shinya Yamazaki ,  Tomoyoshi Kushida ,  Takahide Sugiyama

Inventor： Shinya Yamazaki ,  Tomoyoshi Kushida ,  Takahide Sugiyama

IPC: H01L21/265

CPC classification number: H01L29/868 ,  H01L29/32

Abstract: With conventional device, the quantity of complex defects differs with each semiconductor device because the concentration of impurities intrinsically contained differs for each silicon wafer. Consequently, there is an undesirable variation in characteristics among the semiconductor devices. The invention provides a method for manufacturing PIN type diode which comprises an intermediate semiconductor region in which complex defects are formed. The method comprises introducing impurities (for example, carbon), which are the sane kind of impurities intrinsically contained in the intermediate semiconductor region, into the intermediate semiconductor region, and irradiating the intermediate semiconductor region with helium ions to form point defects.

Abstract translation: 对于常规装置，由于每个硅晶片的固有杂质的浓度不同，所以复合缺陷的数量因每个半导体器件而不同。 因此，半导体器件之间的特性存在不期望的变化。 本发明提供一种制造PIN型二极管的方法，其包括形成复杂缺陷的中间半导体区域。 该方法包括将与中间半导体区域本征含有的相同种类的杂质的杂质（例如碳）引入中间半导体区域，并且用氦离子照射中间半导体区域以形成点缺陷。