Method of manufacturing semiconductor device including forming two stress films and irradiation of one stress film
    2.
    发明授权
    Method of manufacturing semiconductor device including forming two stress films and irradiation of one stress film 有权
    制造半导体器件的方法包括形成两个应力膜和照射一个应力膜

    公开(公告)号:US07763509B2

    公开(公告)日:2010-07-27

    申请号:US11639344

    申请日:2006-12-15

    摘要: A method of manufacturing a semiconductor device, in which a stress film having a large stress can be formed with high accuracy over a transistor. The method comprises the steps of: depositing a tensile stress film over the whole surface of a substrate having formed thereon an n-MOSFET; removing by etching the deposited stress film while leaving it on the n-MOSFET; and performing UV irradiation to the remaining stress film. By the UV irradiation, a tensile stress of the stress film is improved. Further, although the stress film is cured by the UV irradiation, occurrence of etching defects caused by the curing is prevented because the UV irradiation is performed after the etching. Thus, speeding-up and high quality of the n-MOSFET can be attained.

    摘要翻译: 一种制造半导体器件的方法,其中可以以高精度在晶体管上形成具有大应力的应力膜。 该方法包括以下步骤:在其上形成有n-MOSFET的衬底的整个表面上沉积拉伸应力膜; 通过蚀刻沉积的应力膜同时将其留在n-MOSFET上去除; 对剩余的应力膜进行紫外线照射。 通过UV照射,应力膜的拉伸应力提高。 此外,虽然通过UV照射使应力膜固化,但是由于在蚀刻之后进行UV照射,因此防止了由固化引起的蚀刻缺陷的发生。 因此,可以获得n-MOSFET的加速和高质量。

    Method of manufacturing semiconductor device
    3.
    发明授权
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US07749897B2

    公开(公告)日:2010-07-06

    申请号:US12219271

    申请日:2008-07-18

    IPC分类号: H01L21/4763

    CPC分类号: H01L21/76829 H01L21/76808

    摘要: A method of manufacturing a semiconductor device comprising a wiring structure that includes a vertical wiring section is disclosed. The method comprises a step of forming an interlayer insulation film made of a low dielectric constant material on a wiring layer, a step of forming a silicon oxide film by CVD using SiH4 gas and CO2 gas on the interlayer insulation film, a step of forming a chemically amplified resist film to cover the silicon oxide film, and a step of forming a first opening in a position on the chemically amplified resist film where the vertical wiring section is to be formed.

    摘要翻译: 公开了一种制造包括垂直布线部分的布线结构的半导体器件的方法。 该方法包括在布线层上形成由低介电常数材料制成的层间绝缘膜的步骤,通过在层间绝缘膜上使用SiH 4气体和CO 2气体通过CVD形成氧化硅膜的步骤,形成 化学放大抗蚀剂膜覆盖氧化硅膜,以及在要形成垂直布线部分的化学放大抗蚀剂膜上的位置形成第一开口的步骤。

    Semiconductor device
    7.
    发明申请
    Semiconductor device 审中-公开
    半导体器件

    公开(公告)号:US20060087041A1

    公开(公告)日:2006-04-27

    申请号:US11256681

    申请日:2005-10-24

    IPC分类号: H01L23/48

    摘要: A semiconductor device is disclosed that includes a substrate, a first wiring structure arranged on the substrate which first wiring structure includes a first insulating layer and a first wiring layer arranged within the first insulating layer, a second wiring structure arranged on the first wiring structure which second wiring structure includes a second insulating layer including a shock absorbing layer made of an insulating film and a second wiring layer arranged within the second insulating layer, and a third wiring structure arranged on the second wiring structure which third wiring structure includes a third insulating layer and a third wiring layer arranged within the third insulating layer. The fracture toughness value of the shock absorbing layer is arranged to be greater than the fracture toughness value of the first insulating film and the fracture toughness value of the third insulating film.

    摘要翻译: 公开了一种半导体器件,其包括基板,布置在基板上的第一布线结构,第一布线结构包括第一绝缘层和布置在第一绝缘层内的第一布线层,布置在第一布线结构上的第二布线结构, 第二布线结构包括:第二绝缘层,包括由绝缘膜制成的减震层和布置在第二绝缘层内的第二布线层;以及布置在第二布线结构上的第三布线结构,第三布线结构包括第三绝缘层 以及布置在所述第三绝缘层内的第三布线层。 冲击吸收层的断裂韧性值被设置为大于第一绝缘膜的断裂韧性值和第三绝缘膜的断裂韧性值。