公开(公告)号：US20110236598A1

公开(公告)日：2011-09-29

申请号：US13070844

申请日：2011-03-24

申请人： Takeshi KUMAGAI ,  Hitoshi Kato

发明人： Takeshi KUMAGAI ,  Hitoshi Kato

IPC分类号： C23C16/52 ,  C23C16/455 ,  C23C16/458 ,  C23C16/50

CPC分类号： C23C16/4554 ,  C23C16/401 ,  C23C16/45536 ,  C23C16/45551 ,  C23C16/45557 ,  C23C16/4584

摘要： In an disclosed film deposition method, after a film deposition-alteration step is carried out that includes a film deposition process where a Si containing gas is adsorbed on a wafer W and the adsorbed Si containing gas on the wafer is oxidized by supplying an O3 gas to the upper surface of the wafer, thereby producing a silicon oxide layer(s) by rotating a turntable on which the wafer is placed, and an alteration process where the silicon oxide layers) is altered by plasma, an alteration step where the silicon oxide layer(s) is altered by plasma while the Si containing gas is not supplied.

摘要翻译： 在所公开的膜沉积方法中，在进行膜沉积改变步骤之后，其中包括在晶片W上吸附含Si气体的膜沉积工艺，并且通过提供O 3气体来氧化晶片上吸附的含Si气体 到晶片的上表面，从而通过旋转其上放置晶片的转台和氧化硅层的改变工艺）通过等离子体改变来制造氧化硅层，其中氧化硅 在不提供含Si气体的情况下，层被等离子体改变。

公开(公告)号：US07125812B2

公开(公告)日：2006-10-24

申请号：US10500150

申请日：2003-01-14

申请人： Takeshi Kumagai ,  Hitoshi Katoh ,  Jinsu Lee ,  Shingo Maku

发明人： Takeshi Kumagai ,  Hitoshi Katoh ,  Jinsu Lee ,  Shingo Maku

IPC分类号： H01L21/31

CPC分类号： C23C16/45561 ,  C23C16/308 ,  C23C16/345 ,  C23C16/40 ,  C23C16/401 ,  C23C16/452

摘要： A CVD apparatus (2) forms an insulating film, which is a silicon oxide film, silicon nitride film, or silicon oxynitride film. The CVD apparatus includes a process chamber (8) to accommodate a target substrate (W), a support member (20) to support the target substrate in the process chamber, a heater (12) to heat the target substrate supported by the support member, an exhaust section (39) to vacuum-exhaust the process chamber, and a supply section (40) to supply a gas into the process chamber. The supply section includes a first circuit (42) to supply a first gas of a silane family gas, a second circuit (44) to supply a second gas, which is an oxidizing gas, nitriding gas, or oxynitriding gas, and a third circuit (46) to supply a third gas of a carbon hydride gas, and can supply the first, second, and third gases together.

摘要翻译： CVD装置（2）形成作为氧化硅膜，氮化硅膜或氮氧化硅膜的绝缘膜。 CVD装置包括：容纳目标基板（W）的处理室（8）;将处理室中的目标基板支撑的支撑构件（20）;加热器（12），用于加热由支撑构件支撑的目标基板 ，用于对处理室进行真空排气的排气部（39），以及向处理室供给气体的供给部（40）。 供给部包括供给硅烷族气体的第一气体的第一回路（42），供给作为氧化气体的第二气体的第二回路（44），氮化气体或氮氧化气体，以及第三回路 （46）供应碳氢化合物气体的第三气体，并且可以将第一，第二和第三气体供应在一起。

公开(公告)号：US20050081789A1

公开(公告)日：2005-04-21

申请号：US10986282

申请日：2004-11-12

申请人： Hitoshi Kato ,  Kohei Fukushima ,  Atsushi Endo ,  Tatsuo Nishita ,  Takeshi Kumagai

发明人： Hitoshi Kato ,  Kohei Fukushima ,  Atsushi Endo ,  Tatsuo Nishita ,  Takeshi Kumagai

IPC分类号： C23C16/34 ,  C23C16/44 ,  H01L21/318 ,  C23C16/00

CPC分类号： H01L21/02271 ,  C23C16/345 ,  C23C16/4405 ,  C23C16/4412 ,  H01L21/0217 ,  H01L21/3185 ,  Y10S438/905

摘要： A thermal processing system (1) includes a reaction vessel (2) capable of forming a silicon nitride film on semiconductor wafers (10) through interaction between hexachlorodisilane and ammonia, and an exhaust pipe (16) connected to the reaction vessel (2). The reaction vessel 2 is heated at a temperature in the range of 500 to 900° C. and the exhaust pipe (16) is heated at 100° C. before disassembling and cleaning the exhaust pipe 16. Ammonia is supplied through a process gas supply pipe (13) into the reaction vessel (2), and the ammonia is discharged from the reaction vessel (2) into the exhaust pipe (16).

摘要翻译： 热处理系统（1）包括能够通过六氯二硅烷和氨之间的相互作用在半导体晶片（10）上形成氮化硅膜的反应容器（2）和连接到反应容器（2）的排气管（16）。 将反应容器2在500-900℃的温度范围内加热，并且排气管（16）在100℃下被加热，然后拆卸和清洁排气管16.氨通过工艺气体供应 管（13）进入反应容器（2），氨从反应容器（2）排出到排气管（16）中。

公开(公告)号：US06791147B1

公开(公告)日：2004-09-14

申请号：US09431762

申请日：1999-11-01

申请人： Junichi Karasawa ,  Kunio Watanabe ,  Takeshi Kumagai

发明人： Junichi Karasawa ,  Kunio Watanabe ,  Takeshi Kumagai

IPC分类号： H01L2976

CPC分类号： H01L27/11 ,  H01L21/823892 ,  H01L27/0928

摘要： A semiconductor memory device has a peripheral circuit area and a memory cell area on a main surface thereof. The semiconductor memory device includes a first well formed in the peripheral circuit area, a second well of a first conductivity type formed in the memory cell area, a third well of a second conductivity type formed in the memory cell area, and a device isolation structure formed in the memory cell area for isolating an element formed in the second well from an element formed in the third well. The second well of the first conductivity type has a depth shallower than a depth of the first well. The third well of the second conductivity type is equal in depth to the second well. The second and third wells are formed down to a level lower than the device isolation structure.

摘要翻译： 半导体存储器件在其主表面上具有外围电路区域和存储单元区域。 半导体存储器件包括形成在外围电路区域中的第一阱，形成在存储单元区域中的第一导电类型的第二阱，形成在存储单元区域中的第二导电类型的第三阱，以及器件隔离结构 形成在用于将形成在第二阱中的元件与形成在第三阱中的元件隔离的存储单元区域中。 第一导电类型的第二阱具有比第一阱的深度浅的深度。 第二导电类型的第三阱与第二阱的深度相等。 第二和第三阱形成为低于器件隔离结构的水平。

公开(公告)号：US5162983A

公开(公告)日：1992-11-10

申请号：US727602

申请日：1991-07-09

申请人： Takeshi Kumagai

发明人： Takeshi Kumagai

IPC分类号： H02J3/01

CPC分类号： H02J3/01 ,  Y02E40/40

摘要： An active filter suppresses harmonic current components flowing through a power supply, to which a compensation object load including a harmonic component source and a capacitive load is coupled. The active filter supplies a compensation current Ic in accordance with an output of a subtracter coupled to current transformers for detecting the load current I1 and the capacitive load current If, respectively. Thus, the compensation current Ic supplied from the active filter corresponds to and compensates only for the harmonic current components generated by the harmonic component source. The capacitive load current If is excluded from control operation. Thus, the positive feedback of the system is avoided, and stable control operation can be obtained.

摘要翻译： 有源滤波器抑制流过电源的谐波电流分量，包括谐波分量源和容性负载的补偿对象负载耦合到该电源。 有源滤波器根据耦合到电流互感器的减法器的输出分别提供补偿电流Ic，用于检测负载电流I1和容性负载电流If。 因此，从有源滤波器提供的补偿电流Ic对应于并补偿由谐波分量源产生的谐波电流分量。 电容负载电流If被排除在控制操作之外。 因此，避免了系统的正反馈，可以获得稳定的控制操作。

公开(公告)号：US4831474A

公开(公告)日：1989-05-16

申请号：US111460

申请日：1987-10-20

申请人： Takeshi Kumagai

发明人： Takeshi Kumagai

IPC分类号： G11B17/028 ,  G11B19/20

CPC分类号： G11B17/0282 ,  G11B19/2009

摘要： A disk driving apparatus is disclosed which, in such apparatus constituted of a disk holding portion on which a hub disposed in the center of a disk is loaded and a motor for supplying the disk holding portion with rotational power, comprises within the disk holding portion two members, a guide cap and a housing, externally attached to the outer rings of bearings fitted to the shaft of the motor. The guide cap is provided thereon with a centering peripheral surface with which the center hole of the hub is engaged and the housing is provided with portions for positioning parts which are attached thereto in the direction of the shaft of the disk.

摘要翻译： 公开了一种盘驱动装置，在其中装载有设置在盘中心的轮毂的盘保持部和用于向盘保持部提供旋转动力的马达构成的装置中，包括在盘保持部2内 构件，导向盖和壳体，外部附接到安装到电动机的轴的轴承的外圈。 导向盖设置有定心圆周表面，毂的中心孔与该中心圆周表面接合，并且壳体设置有用于沿着盘的轴的方向附着到其上的定位部件的部分。

公开(公告)号：US08553543B2

公开(公告)日：2013-10-08

申请号：US12947182

申请日：2010-11-16

申请人： Hideki Hinosugi ,  Yoshihiko Sakata ,  Atsushi Anzai ,  Takeshi Kumagai ,  Shinsuke Nakashima

发明人： Hideki Hinosugi ,  Yoshihiko Sakata ,  Atsushi Anzai ,  Takeshi Kumagai ,  Shinsuke Nakashima

IPC分类号： H04J3/16 ,  H04L12/26 ,  H04L12/56 ,  G06F15/16

CPC分类号： H04L47/2441 ,  H04L47/2475 ,  H04L47/50 ,  H04L47/522 ,  H04L47/627 ,  H04L49/254 ,  H04L49/602

摘要： A packet relay device comprises a distribution processing unit classifying traffics into groups and users based on header information of packets received; a calculation unit calculating available frame rate of each user from peak frame rate, minimum frame rate, and weight information set for each user; a scheduling control unit updating a transmission schedule point-in-time calculated based on the available frame rate of each user, and judging which packet should be transmitted in accordance with the transmission schedule point-in-time updated; and a shaping unit updating a transmission schedule point-in-time calculated based on the peak frame rate of each user, and performing a shaping of packets at the peak frame rate on each user basis in accordance with the transmission schedule point-in-time updated; and a priority-control processing unit performing a strict priority control over transmission of packets of each group in correspondence with degree of priority of each group.

摘要翻译： 分组中继装置包括：分发处理单元，基于接收到的分组的报头信息，将流量分组到组和用户; 计算单元，从针对每个用户的峰值帧速率，最小帧速率和权重信息计算每个用户的可用帧速率; 调度控制单元基于每个用户的可用帧速率来更新计算出的发送调度时间点，并且根据传输调度来更新哪个分组应该被发送; 以及整形单元，其更新基于每个用户的峰值帧速率计算出的传输调度时间点，并且根据传输调度时间点对每个用户基于峰值帧速率对分组进行整形 更新; 以及优先级控制处理单元，对与各组的优先级相对应地对每组的分组的发送执行严格的优先级控制。

公开(公告)号：US20130130512A1

公开(公告)日：2013-05-23

申请号：US13471587

申请日：2012-05-15

申请人： Hitoshi KATO ,  Shigehiro USHIKUBO ,  Tatsuya TAMURA ,  Shigenori OZAKI ,  Takeshi KUMAGAI ,  Hiroyuki KIKUCHI

发明人： Hitoshi KATO ,  Shigehiro USHIKUBO ,  Tatsuya TAMURA ,  Shigenori OZAKI ,  Takeshi KUMAGAI ,  Hiroyuki KIKUCHI

IPC分类号： H01L21/02

CPC分类号： H01L21/02274 ,  C23C16/345 ,  C23C16/4554 ,  H01J37/321 ,  H01J37/32449 ,  H01J37/32715 ,  H01J37/32733 ,  H01J37/32779 ,  H01L21/02164 ,  H01L21/0228

摘要： A film deposition method including: a step of carrying a substrate into a vacuum chamber, and placing the substrate on a turntable; a step of rotating the turntable; and an adsorption-formation-irradiation step of supplying a first reaction gas to the substrate from a first reaction gas supply part to adsorb the first reaction gas on the substrate; supplying a second reaction gas from a second reaction gas supply part so that the first reaction gas adsorbed on the substrate reacts with the second reaction gas so as to form a reaction product on the substrate; and supplying a hydrogen containing gas to a plasma generation part that is separated from the first reaction gas supply part and the second reaction gas supply part in a circumferential direction of the turntable so as to generate plasma above the turntable and to irradiate the plasma to the reaction product.

摘要翻译： 一种膜沉积方法，包括：将基板搬入真空室，并将基板放置在转台上的步骤; 转动转盘的一步; 以及吸附形成照射步骤，从第一反应气体供给部分向基板供给第一反应气体，以将第一反应气体吸附在基板上; 从第二反应气体供给部供给第二反应气体，使得吸附在基板上的第一反应气体与第二反应气体反应，以在基板上形成反应产物; 并向在第一反应气体供给部和第二反应气体供给部与旋转体的圆周方向分离的等离子体产生部供给含氢气体，以在转台上方产生等离子体，并将等离子体照射到 反应产物。

公开(公告)号：US07156923B2

公开(公告)日：2007-01-02

申请号：US10986282

申请日：2004-11-12

申请人： Hitoshi Kato ,  Kohei Fukushima ,  Atsushi Endo ,  Tatsuo Nishita ,  Takeshi Kumagai

发明人： Hitoshi Kato ,  Kohei Fukushima ,  Atsushi Endo ,  Tatsuo Nishita ,  Takeshi Kumagai

IPC分类号： C23C16/00 ,  C23C16/34 ,  C23C16/52 ,  H01L21/31 ,  H01L21/469

CPC分类号： H01L21/02271 ,  C23C16/345 ,  C23C16/4405 ,  C23C16/4412 ,  H01L21/0217 ,  H01L21/3185 ,  Y10S438/905

摘要： A thermal processing system (1) includes a reaction vessel (2) capable of forming a silicon nitride film on semiconductor wafers (10) through interaction between hexachlorodisilane and ammonia, and an exhaust pipe (16) connected to the reaction vessel (2). The reaction vessel 2 is heated at a temperature in the range of 500 to 900° C. and the exhaust pipe (16) is heated at 100° C. before disassembling and cleaning the exhaust pipe 16. Ammonia is supplied through a process gas supply pipe (13) into the reaction vessel (2), and the ammonia is discharged from the reaction vessel (2) into the exhaust pipe (16).

摘要翻译： 热处理系统（1）包括能够通过六氯二硅烷和氨之间的相互作用在半导体晶片（10）上形成氮化硅膜的反应容器（2）和连接到反应容器（2）的排气管（16）。 反应容器2在500-900℃范围内的温度下被加热，排气管（16）在分解和清洁排气管16之前被加热到100℃。 氨通过工艺气体供给管（13）供给到反应容器（2）中，氨从反应容器（2）排出到排气管（16）中。

公开(公告)号：US06594186B2

公开(公告)日：2003-07-15

申请号：US10171421

申请日：2002-06-12

申请人： Satoru Kodaira ,  Masaya Uehara ,  Hitoshi Kobayashi ,  Takeshi Kumagai

发明人： Satoru Kodaira ,  Masaya Uehara ,  Hitoshi Kobayashi ,  Takeshi Kumagai

IPC分类号： G11C2900

CPC分类号： G11C29/48 ,  G11C29/20

摘要： A semiconductor memory having a plurality of memory cells includes a first terminal that becomes a power supply terminal for the semiconductor memory, a second terminal that becomes a ground terminal for the semiconductor memory, a third terminal for inputting a burn-in mode signal to place the semiconductor memory in a burn-in mode and a fourth terminal for inputting an external clock signal. The semiconductor memory further includes an address signal generation section that generates an address signal for selecting each of the plurality of memory cells based on counting of the clock signal while the burn-in mode signal is input. A data signal generation section generates a data signal based on the clock signal while the burn-in mode signal is input. A data writing section writes data of the data signal in the memory cells selected by the address signal.