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公开(公告)号：US20100067580A1
公开(公告)日：2010-03-18
申请号：US12559152
申请日：2009-09-14
IPC分类号： H04N7/32
CPC分类号： H04N19/521 , H04N19/156 , H04N19/164 , H04N19/176 , H04N19/187 , H04N19/33 , H04N19/40 , H04N19/513 , H04N19/59 , H04N19/61
摘要： Systems and methods are for implementing a NSV2SV converter that converts a non-scalable video signal to a scalable video signal. In an implementation, a non-scalable video signal encoded in H.264/AVC standard is decoded and segmented into spatial data and motion data. The spatial data is resized into a desired resolution by down-sampling the spatial data. The motion data is also resized in every layer, except in the top layer, of a scalable video coding (SVC) encoder by using an appropriate measure. Further, the motion data is refined based on the resized spatial data in every layer of the SVC encoder. The refined motion data and the down-sampled spatial data are then transformed and entropy encoded in the SVC standard in every layer. The SVC encoded output from every layer is multiplexed to produce a scalable video signal.
摘要翻译： 系统和方法用于实现将不可缩放视频信号转换为可伸缩视频信号的NSV2SV转换器。 在实现中，以H.264 / AVC标准编码的不可缩放视频信号被解码并分割成空间数据和运动数据。 通过对空间数据进行下采样，空间数据被调整为期望的分辨率。 通过使用适当的测量，运动数据也可以在可分级视频编码（SVC）编码器的除了顶层之外的每一层中进行大小调整。 此外，基于SVC编码器的每层中的调整大小的空间数据来精细化运动数据。 然后将精细运动数据和下采样空间数据在SVC标准中进行变换和熵编码。 来自每个层的SVC编码的输出被复用以产生可分级的视频信号。
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2.发明申请METHOD FOR ADAPTIVE BIASING OF FULLY DIFFERENTIAL GAIN BOOSTED OPERATIONAL AMPLIFIERS 有权全面差分增益运算放大器自适应偏置的方法公开(公告)号：US20090154558A1
公开(公告)日：2009-06-18
申请号：US12275947
申请日：2008-11-21
IPC分类号： H04N7/26
CPC分类号： H04N19/40 , H04N19/115 , H04N19/149 , H04N19/196 , H04N19/61
摘要： Rate control algorithms are adapted to cover multiple encoding standards are described. A rate controller includes an input adaptation interface, a core rate controller, and an output adaptation interface. The input adaptation interface converts rate control input parameters of a target encoding standard to corresponding native control input parameters of the rate controller. The core rate controller is coupled to the output of the input adaptation interface generating output parameters conforming to its native encoding standard. The output adaptation interface is coupled to the output of the core rate controller converting the generated output parameters to equivalent rate control output parameters conforming to the target encoding standard.
摘要翻译： 速率控制算法适用于覆盖多种编码标准。 速率控制器包括输入适配接口，核心速率控制器和输出适配接口。 输入自适应接口将目标编码标准的速率控制输入参数转换为速率控制器的相应本机控制输入参数。 核心速率控制器耦合到输入自适应接口的输出，产生符合其天然编码标准的输出参数。 输出适配接口耦合到核心速率控制器的输出，将所生成的输出参数转换为符合目标编码标准的等效速率控制输出参数。
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公开(公告)号：US08711927B2
公开(公告)日：2014-04-29
申请号：US12636321
申请日：2009-12-11
IPC分类号： H04N7/26
CPC分类号： H04N19/48 , H04N19/115 , H04N19/149 , H04N19/152 , H04N19/172 , H04N19/176 , H04N19/18 , H04N19/61
摘要： An embodiment of the present disclosure relates to system comprises an encoding device. Said encoding device comprises a compression unit, a quantizer, a bit estimator, a bit rate encoder and a variable length encoder. An embodiment also is a method of encoding. Said method estimates a number of bits to encode a macroblock after compressing the data stream. Then the estimated bit encoded by a bit rate encoder and further quantized by the quantizer to get the final encoded bit stream. The number of bits required to encode a macroblock is estimated after the quantization process and before the encoding process. The macroblock bit estimator estimates the number of bits required to encode a particular macroblock depending on the quantized AC coefficients of that macroblock and the quantized AC coefficients of the neighboring frames normalized at a macroblock level.
摘要翻译： 本公开的实施例涉及一种包括编码装置的系统。 所述编码装置包括压缩单元，量化器，比特估计器，比特率编码器和可变长度编码器。 实施例也是一种编码方法。 所述方法估计在压缩数据流之后编码宏块的位数。 然后估计比特由比特率编码器编码并由量化器进一步量化以获得最终的编码比特流。 在量化处理之后和编码处理之前估计编码宏块所需的位数。 宏块比特估计器根据该宏块的量化AC系数和在宏块级标准化的相邻帧的量化AC系数来估计对特定宏块进行编码所需的比特数。
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4.发明授权System and method for transcoding data from one video standard to another video standard 有权将数据从一个视频标准转码为另一个视频标准的系统和方法公开(公告)号：US08428142B2
公开(公告)日：2013-04-23
申请号：US12042300
申请日：2008-03-04
申请人： Sumit Johar , Ravin Sachdeva
发明人： Sumit Johar , Ravin Sachdeva
IPC分类号： H04N11/04
CPC分类号： H04N19/00472 , H04N19/40 , H04N19/61
摘要： A system and method transcodes an input video bit stream having a first encoding profile into an output video bit stream having a second encoding profile. The system includes a first module and a second module. The system further includes a memory module. The first module decodes the input video bit stream for generating pixel data and macroblock specifications. The second module encodes the pixel data and the macroblock specifications for constructing the output video bit stream. The memory module includes a first buffer module and a second buffer module. The first buffer module stores the pixel data and the second buffer module stores the macroblock specifications.
摘要翻译： 系统和方法将具有第一编码简档的输入视频比特流转码成具有第二编码简档的输出视频比特流。 该系统包括第一模块和第二模块。 该系统还包括存储器模块。 第一模块解码用于产生像素数据和宏块规格的输入视频比特流。 第二模块对构成输出视频比特流的像素数据和宏块规格进行编码。 存储器模块包括第一缓冲器模块和第二缓冲器模块。 第一缓冲模块存储像素数据，第二缓存模块存储宏块规格。
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5.发明授权System for entropy decoding of H.264 video for real time HDTV applications 有权用于实时HDTV应用的H.264视频的熵解码系统公开(公告)号：US09001882B2
公开(公告)日：2015-04-07
申请号：US13165015
申请日：2011-06-21
申请人： Ravin Sachdeva , Sumit Johar , Daniele Alfonso
发明人： Ravin Sachdeva , Sumit Johar , Daniele Alfonso
摘要： An embodiment relates to a decoder for decoding CABAC encoded video data in real time for HDTV applications. The decoder comprises a binary arithmetic decoder block for converting an input bit stream into a bin string, a context memory for storing a plurality of context values, and a plurality of finite state machines. Each of the finite state machines is adapted for decoding a particular one of the H.264 syntax elements by providing the binary arithmetic decoder block with an index of the relevant context value within the context memory and by converting the resulting bin stream into a value of the current syntax element. In this manner, a performance of one bin per cycle may be achieved.
摘要翻译： 实施例涉及用于HDTV应用实时解码CABAC编码视频数据的解码器。 解码器包括用于将输入比特流转换成bin字符串的二进制算术解码器块，用于存储多个上下文值的上下文存储器以及多个有限状态机。 每个有限状态机适于通过向二进制算术解码器块提供上下文存储器内的相关上下文值的索引来解码H.264语法元素中的特定一个，并且通过将所得到的bin流转换为 当前语法元素。 以这种方式，可以实现每个循环一个箱的性能。
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公开(公告)号：US08395991B2
公开(公告)日：2013-03-12
申请号：US12559152
申请日：2009-09-14
IPC分类号： H04J3/14
CPC分类号： H04N19/521 , H04N19/156 , H04N19/164 , H04N19/176 , H04N19/187 , H04N19/33 , H04N19/40 , H04N19/513 , H04N19/59 , H04N19/61
摘要： Systems and methods are for implementing a NSV2SV converter that converts a non-scalable video signal to a scalable video signal. In an implementation, a non-scalable video signal encoded in H.264/AVC standard is decoded and segmented into spatial data and motion data. The spatial data is resized into a desired resolution by down-sampling the spatial data. The motion data is also resized in every layer, except in the top layer, of a scalable video coding (SVC) encoder by using an appropriate measure. Further, the motion data is refined based on the resized spatial data in every layer of the SVC encoder. The refined motion data and the down-sampled spatial data are then transformed and entropy encoded in the SVC standard in every layer. The SVC encoded output from every layer is multiplexed to produce a scalable video signal.
摘要翻译： 系统和方法用于实现将不可缩放视频信号转换为可伸缩视频信号的NSV2SV转换器。 在实现中，以H.264 / AVC标准编码的不可缩放视频信号被解码并分割成空间数据和运动数据。 通过对空间数据进行下采样，空间数据被调整为期望的分辨率。 通过使用适当的测量，运动数据也可以在可分级视频编码（SVC）编码器的除了顶层之外的每一层中进行大小调整。 此外，基于SVC编码器的每层中的调整大小的空间数据来精细化运动数据。 然后将精细运动数据和下采样空间数据在SVC标准中进行变换和熵编码。 来自每个层的SVC编码的输出被复用以产生可分级的视频信号。
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7.发明申请SYSTEM FOR ENTROPY DECODING OF H.264 VIDEO FOR REAL TIME HDTV APPLICATIONS 有权用于实时HDTV应用的H.264视频的篡改解码系统公开(公告)号：US20110310958A1
公开(公告)日：2011-12-22
申请号：US13165015
申请日：2011-06-21
申请人： Ravin SACHDEVA , Sumit JOHAR , Daniele ALFONSO
发明人： Ravin SACHDEVA , Sumit JOHAR , Daniele ALFONSO
IPC分类号： H04N7/26
摘要： An embodiment relates to a decoder for decoding CABAC encoded video data in real time for HDTV applications. The decoder comprises a binary arithmetic decoder block for converting an input bit stream into a bin string, a context memory for storing a plurality of context values, and a plurality of finite state machines. Each of the finite state machines is adapted for decoding a particular one of the H.264 syntax elements by providing the binary arithmetic decoder block with an index of the relevant context value within the context memory and by converting the resulting bin stream into a value of the current syntax element. In this manner, a performance of one bin per cycle may be achieved.
摘要翻译： 实施例涉及用于HDTV应用实时解码CABAC编码视频数据的解码器。 解码器包括用于将输入比特流转换成bin字符串的二进制算术解码器块，用于存储多个上下文值的上下文存储器以及多个有限状态机。 每个有限状态机适于通过向二进制算术解码器块提供上下文存储器内的相关上下文值的索引来解码H.264语法元素中的特定一个，并且通过将所得到的bin流转换为 当前语法元素。 以这种方式，可以实现每个循环一个箱的性能。
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公开(公告)号：US08665948B2
公开(公告)日：2014-03-04
申请号：US12275947
申请日：2008-11-21
CPC分类号： H04N19/40 , H04N19/115 , H04N19/149 , H04N19/196 , H04N19/61
摘要： Rate control algorithms are adapted to cover multiple encoding standards. A rate controller includes an input adaptation interface, a core rate controller, and an output adaptation interface. The input adaptation interface converts rate control input parameters of a target encoding standard to corresponding native control input parameters of the rate controller. The core rate controller is coupled to the output of the input adaptation interface generating output parameters conforming to its native encoding standard. The output adaptation interface is coupled to the output of the core rate controller converting the generated output parameters to equivalent rate control output parameters conforming to the target encoding standard.
摘要翻译： 速率控制算法适用于覆盖多种编码标准。 速率控制器包括输入适配接口，核心速率控制器和输出适配接口。 输入自适应接口将目标编码标准的速率控制输入参数转换为速率控制器的相应本机控制输入参数。 核心速率控制器耦合到输入自适应接口的输出，产生符合其天然编码标准的输出参数。 输出适配接口耦合到核心速率控制器的输出，将所生成的输出参数转换为符合目标编码标准的等效速率控制输出参数。
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9.发明授权公开(公告)号：US08577179B2
公开(公告)日：2013-11-05
申请号：US12895629
申请日：2010-09-30
申请人： Surinder Pal Singh , Kaushik Saha , Sumit Johar
发明人： Surinder Pal Singh , Kaushik Saha , Sumit Johar
IPC分类号： G09G5/04
摘要： An image processing arrangement includes an input to receive an indicator of a power characteristic related to an image processing arrangement and an image processor to process an image based on the indicator of the power characteristic.
摘要翻译： 图像处理装置包括用于接收与图像处理装置相关的功率特性的指示符的输入和基于功率特性的指标来处理图像的图像处理器。
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公开(公告)号：US20120044226A1
公开(公告)日：2012-02-23
申请号：US12895629
申请日：2010-09-30
申请人： Surinder Pal Singh , Kaushik Saha , Sumit Johar
发明人： Surinder Pal Singh , Kaushik Saha , Sumit Johar
IPC分类号： G09G5/00
摘要： An image processing arrangement includes an input to receive an indicator of a power characteristic related to an image processing arrangement and an image processor to process an image based on the indicator of the power characteristic.
摘要翻译： 图像处理装置包括用于接收与图像处理装置相关的功率特性的指示符的输入和基于功率特性的指标来处理图像的图像处理器。
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