公开(公告)号：US5784304A

公开(公告)日：1998-07-21

申请号：US594172

申请日：1996-01-31

申请人： Shin'Ichi Koike

发明人： Shin'Ichi Koike

IPC分类号： H03H21/00 ,  H04B3/04 ,  H04B3/23 ,  G06F17/10

CPC分类号： H03H21/0012

摘要： An rms value of a sum signal series x=en+vn calculated by adding a noise series to an error signal series of a known signal series and an unknown signal series, is calculated by an rms calculator. By means of an amplitude controller, x is output as is when .linevert split.x.linevert split. is smaller than a threshold value A proportional to the rms value. When .linevert split.x.linevert split. is greater than the threshold value A, a product signal calculated by multiplying the polarity of x with the threshold value is output. Utilizing the output of the amplitude controller, respective tap weights of filter is corrected to generate be tap weights Ck.sup.(n). By this, switching control between a probability gradient LMS algorithm (LA) and a probability gradient sign algorithm (SA) can be performed smoothly. Thus, an adaptively controlled filter having an advantage of small residual error and fast convergence of LA and an advantage of satisfactory strength against disturbance, such as burst noise or so forth of SA, can be obtained.

摘要翻译： 通过将均方根计算器计算通过将已知信号序列和未知信号序列的误差信号序列相加的噪声系数计算出的和信号序列x = en + vn的均方根值。 通过振幅控制器，当+543×+ 543小于与均方根值成比例的阈值A时，x按原样输出。 当+543×+ 543大于阈值A时，输出通过将x的极性与阈值相乘而计算的乘积信号。 利用振幅控制器的输出，对滤波器的各个抽头权重进行校正，以产生抽头权重C k（n）。 由此，平滑地执行概率梯度LMS算法（LA）和概率梯度符号算法（SA）之间的切换控制。 因此，可以获得具有小的残余误差和LA的快速收敛的优点的自适应控制的滤波器，并且可以获得诸如SA的突发噪声等对于干扰的令人满意的强度的优点。

公开(公告)号：US4631721A

公开(公告)日：1986-12-23

申请号：US640917

申请日：1984-08-15

申请人： Tatsuhiro Ono ,  Shin'ichi Koike ,  Haruhiko Tsuchiya ,  Yuji Inoue

发明人： Tatsuhiro Ono ,  Shin'ichi Koike ,  Haruhiko Tsuchiya ,  Yuji Inoue

IPC分类号： H04J3/00 ,  H04L5/16 ,  H04L5/22 ,  H04L12/40 ,  H04J3/02 ,  H04J3/06

CPC分类号： H04L12/4035 ,  H04L12/40 ,  H04L5/16

摘要： In a communication system comprising a two-wire bus, bidirectional communication is carried out in a time division multiple access fashion through the two-wire bus between a plurality of terminal equipments (26) coupled to the two-wire bus and a central terminator (24) connected to one end of the two-wire bus which has the other end terminated by an active terminator (25). The central terminator transmits, to the two-wire bus, a down burst comprising a down synchronization signal and a down information signal. Each terminal equipment establishes synchronization with reference to the down synchronization signal and thereafter receives the down information signal. The active terminator sends, towards the central terminator, only an up synchronization signal produced with reference to the down synchronization signal extracted from the down burst. Each terminal equipment transmits an up information signal towards the central terminator in the form of an up burst with reference to the up synchronization signal. The up information signal may be sent back to the two-wire bus by the central terminator to carry out communication among the terminal equipments.

摘要翻译： 在包括双线总线的通信系统中，通过双线总线在耦合到双线总线的多个终端设备（26）和中央终端器（2）之间以时分多址方式执行双向通信 24），其连接到两线总线的一端，另一端由有源终端器（25）端接。 中央终端器向双线总线发送包括下行同步信号和下行信息信号的下降脉冲串。 每个终端设备参考下行同步信号建立同步，然后接收下行信息信号。 有源终端器向中央终端器发送仅参考从下降脉冲串中提取的下行同步信号产生的上升同步信号。 每个终端设备参照上行同步信号以上升脉冲的形式向中央终端发送上行信息信号。 上行信息信号可以由中央终端发送回两线总线，以便在终端设备之间进行通信。

公开(公告)号：US4472813A

公开(公告)日：1984-09-18

申请号：US362944

申请日：1982-03-29

申请人： Shin'ichi Koike ,  Eiichi Kobayashi

发明人： Shin'ichi Koike ,  Eiichi Kobayashi

IPC分类号： H04L25/497 ,  H04B1/62

CPC分类号： H04L25/497

摘要： In a transmission system of a class IV partial response code succession produced in accordance with a predetermined encoding rule, a transmitter intentionally violates the encoding rule to carry a subsidiary signal, so that an intentional violation appears in a receiver as two consecutive violation signals located in every other time slot, differing from an unintentional violation occurring during transmission. In the transmitter, an intermediate succession from a precoder is monitored by a detection circuit to detect an appearance of each predetermined pattern and to give the intentional violation to the code succession. In the receiver, a violation detector detects both of the intentional and the unintentional violations in accordance with a detecting rule to produce a violation signal sequence. The two consecutive violation signals are distinguished from the violation signal sequence by another detector. As the predetermined patterns, two and twelve patterns are usable in a binary and a quaternary system, respectively.

摘要翻译： 在根据预定编码规则产生的IV类部分响应代码继承的传输系统中，发射机故意违反编码规则来携带辅助信号，使得有意的违规出现在接收机中，因为两个连续的违反信号位于 每隔一个时隙，与传输期间发生的意外违规不同。 在发射机中，来自预编码器的中间连续性由检测电路监视，以检测每个预定模式的外观，并给出对代码继承的有意违反。 在接收机中，违规检测器根据检测规则检测有意和无意的违规，以产生违规信号序列。 两个连续的违规信号与另一个检测器的违规信号序列不同。 作为预定模式，分别在二进制和四进制系统中使用两个和十二个模式。

公开(公告)号：US3947767A

公开(公告)日：1976-03-30

申请号：US509171

申请日：1974-09-25

申请人： Shin'Ichi Koike ,  Hiroshi Fujimoto

发明人： Shin'Ichi Koike ,  Hiroshi Fujimoto

IPC分类号： H04L27/02 ,  H04L25/49 ,  H04L25/497 ,  H04B1/62

CPC分类号： H04L25/497 ,  H04L25/4919

摘要： An improved multilevel code transmission system for transmission of a data signal in the form of an N-level code signal based on a partial response shaping employs a special differential coding prior to partial response shaping on the transmitter side and, on the receiver side subsequent to partial response decoding, a differential decoding corresponding to the differential coding. The system is characterized in that each pair of input, parallel binary codes is so arranged that only the most significant bit is different from each other and the remaining bits are represented by the same binary codes, and in that only the most significant bit is affected by the differential coding and decoding.

摘要翻译： 用于基于部分响应整形以N级代码信号的形式传输数据信号的改进的多级代码传输系统在发射机侧部分响应整形之前采用特殊差分编码，并且在接收机侧之后 部分响应解码，对应于差分编码的差分解码。 该系统的特征在于，每对输入并行二进制码被布置成使得只有最高有效位彼此不同，并且剩余的位由相同的二进制代码表示，并且只有最高有效位受到影响 通过差分编码和解码。

公开(公告)号：US06223194B1

公开(公告)日：2001-04-24

申请号：US09095103

申请日：1998-06-10

申请人： Shin'ichi Koike

发明人： Shin'ichi Koike

IPC分类号： G06F1710

CPC分类号： H03H21/0012 ,  H03H2021/0078

摘要： An adaptive filter which is realized as an FIR filter employing stochastic gradient algorithm comprises a step size controller for controlling step size &agr;c(n) so as to minimize the mean squared estimation error &egr;(n) at each time n. The step size controller regards a step size &agr;c(n)opt which satisfies &dgr;&egr;(n+1)/&dgr;&agr;c(n)opt=0 at each time n as a theoretical optimum step size, and sets the step size &agr;c(n) at each time n so as to be approximately equal to the theoretical optimum step size &agr;c(n)opt. For example, when the adaptive filter employs stochastic gradient sign algorithm as the tap weight control algorithm, the step size controller provided with a leakage accumulator calculates a vector q(n) one by one according to the update equation: q(n+1)=(1−&rgr;)q(n)+&rgr;sgn(en+&ugr;n)(|en+&ugr;n|)½a(n) (&rgr;: leakage coefficient, en: an error signal sequence component, &ugr;n: an additive noise sequence component, a(n): an input signal sequence vector), and sets the step size &agr;c(n) at each time n as: &agr;c(n)=&bgr;∥q(n)∥2(&bgr;=1.07870520/trace(Ra2), Ra=E[a(n)a(n)T]). By the step size controller, both faster convergence of the adaptive filter and smaller residual mean squared estimation error after convergence can be attained.

摘要翻译： 实现为使用随机梯度算法的FIR滤波器的自适应滤波器包括步长控制器，用于控制步长alphac（n），以使每次n时的均方估计误差εi（n）最小化。 步长控制器考虑在每次n时满足Δepsi（n + 1）/ deltaalphac（n）opt = 0的步长alphac（n）opt作为理论最佳步长，并将步长alphac（n）设置在 每次n近似等于理论最佳步长αph（n）opt。 例如，当自适应滤波器采用随机梯度符号算法作为抽头权重控制算法时，具有泄漏累加器的步长控制器根据更新等式逐个计算向量q（n）：q（n + 1） =（1-rho）q（n）+ rhosgn（en +＆ugr n）（| en +＆ugr; n |）½a（n）（rho：泄漏系数，en：误差信号序列分量， 加法噪声序列分量a（n）：输入信号序列向量），并且将每个时间n的步长alphac（n）设置为：alphac（n）=β‖q（n）‖2（beta = 1.07870520 / trace（Ra2），Ra = E [a（n）a（n）T]）。 通过步长控制器，可以获得自适应滤波器更快的收敛和收敛后较小的残差均方估计误差。

公开(公告)号：US4071827A

公开(公告)日：1978-01-31

申请号：US749136

申请日：1976-12-09

申请人： Shin'ichi Koike ,  Seijiro Hayashi ,  Michio Takayama

发明人： Shin'ichi Koike ,  Seijiro Hayashi ,  Michio Takayama

IPC分类号： H04B3/06 ,  H03K5/00 ,  H04L7/00 ,  H04L7/02 ,  H04L25/03 ,  H04B1/12

CPC分类号： H04L7/0062 ,  H04L25/03038

摘要： A transversal type automatic equalizer includes circuits for differentiating the equalized signal, sampling the equalized signal under the control of a timing signal, and generating an error signal from the sampled signal. The differentiated and error signals are multiplied together and a variable phase shifter phase shifts the timing signal in response to their product to provide optimum equalization.

摘要翻译： 横向型自动均衡器包括用于微分均衡信号的电路，在定时信号的控制下采样均衡信号，并从采样信号产生误差信号。 微分和误差信号被相乘，并且可变移相器根据其乘积来移位定时信号以提供最佳均衡。

公开(公告)号：US5440583A

公开(公告)日：1995-08-08

申请号：US110989

申请日：1993-08-24

申请人： Shin'ichi Koike

发明人： Shin'ichi Koike

IPC分类号： H04B3/08 ,  H04L25/03 ,  H03H7/30 ,  H03H7/40

CPC分类号： H04L25/03057 ,  H04B3/08

摘要： An input digital signal is applied to a subtractor where the intersymbol interference component of the signal is removed by a cancelling signal and the ISI-free signal is fed to a decision circuit to produce a binary output, from which a decision error is then detected. A greater part of the cancelling signal is generated by a nonrecursive filter connected to the decision circuit and the remainder is generated by a second-order recursive filter whose tapped delay line is connected through an adder to the output of the tapped delay line of the nonrecursive filter. The tap signals of the recursive filter are respectively multiplied with first and second feedback coefficients and applied to the adder as feedback signals. The first feedback coefficient is equal to a sum of an attenuation constant of constant value (r.sub.f) and an attenuation coefficient of variable quantity (r) and the second feedback coefficient is equal to a product of the two attenuation coefficients. The variable quantity attenuation coefficient is adaptively updated by a correlation between the decision error and a signal derived from the output of the recursive filter.

摘要翻译： 输入数字信号被施加到减法器，其中通过消除信号去除信号的符号间干扰分量，并且将无ISI信号馈送到判定电路以产生二进制输出，从而检测出判定误差。 消除信号的大部分由连接到判定电路的非递归滤波器产生，其余部分由二阶递归滤波器产生，二阶递归滤波器的抽头延迟线通过加法器连接到非递归的抽头延迟线的输出端 过滤。 递归滤波器的抽头信号分别乘以第一和第二反馈系数，并作为反馈信号加到加法器。 第一反馈系数等于恒定值（rf）的衰减常数和可变量（r）的衰减系数之和，第二反馈系数等于两个衰减系数的乘积。 可变量衰减系数通过决策误差与从递归滤波器的输出得到的信号之间的相关性自适应地更新。

公开(公告)号：US5084865A

公开(公告)日：1992-01-28

申请号：US484095

申请日：1990-02-23

申请人： Shin'ichi Koike

发明人： Shin'ichi Koike

IPC分类号： H04B3/23

CPC分类号： H04B3/237 ,  H04B3/23 ,  H04B3/238

摘要： An echo canceller comprises a finite impulse response filter (6) connected to the incoming port of a hybrid (1), and a tail canceller (7) which includes an infinite impulse response filter (24; 40) having a multiplier (14; 33) for recursively multiplying an output digital symbol from the tapped-delay line (8) of the FIR filter with an attenuation coefficient R. A digital symbol from the IIR filter or one from the tapped-delay line (8) is multiplied with a tap-weight coefficient C.sub.1 and summed with the outputs of tap-weight multipliers of the FIR filter to produce a replica of an echo symbol, which is subtracted from a digital symbol y.sub.n from the outgoing port of the hybrid (1), producing a residual echo symbol e.sub.n. The coefficient C.sub.1 is derived from correlation between residual echo e.sub.n and a symbol from the tapped-delay line. In one embodiment, symbol from the tapped-delay line is further delayed (17) for a unit interval on the one hand, and multiplied (18) with coefficient R on the other, the difference between them being detected (19) and multiplied (20) with a coefficient K, which is either sgn(C.sub.1) or 1/C.sub.1, to generate a multiplied difference. Correlation is detected (22) between the difference and residual echo e.sub.n to derive the coefficient R. In a second embodiment, symbol from the tapped-delay line is further delayed (36) for a unit interval and multiplied (37) with K to produce a delayed-multiplied symbol. Correlation is detected (35) between it and residual echo e.sub.n to derive the coefficient R.

公开(公告)号：US5042026A

公开(公告)日：1991-08-20

申请号：US161808

申请日：1988-02-29

申请人： Shin'ichi Koike ,  Masaru Yamaguchi ,  Masanobu Arai ,  Takenori Ogata

发明人： Shin'ichi Koike ,  Masaru Yamaguchi ,  Masanobu Arai ,  Takenori Ogata

IPC分类号： H03H17/02 ,  H04B3/23

CPC分类号： H04B3/235 ,  H03H17/0288 ,  H04B3/238

摘要： The whole or part of a waveform is cancelled by a circuit comprising a nonrecursive filter and a recursive filter. The nonrecursive filter has a plurality of first multipliers having first tap weights for modifying symbols successively shifted along a shift register. The recursive filter is connected in a series circuit to the shift register and has a second tap weight for recursively modifying the output of the shift register. The recursively modified symbol is modified by a second multiplier having a third tap weight and combined in an adder with the symbols modified by the first tap weights to produce a replica of an undesired waveform. The replica is destructively combined in a subtractor with an incoming symbol having an undesired waveform. The output of subtractor is utilized to derive the tap weights to adaptively control the inputs to the adder.

公开(公告)号：US4786882A

公开(公告)日：1988-11-22

申请号：US923470

申请日：1986-10-27

申请人： Shin'Ichi Koike

发明人： Shin'Ichi Koike

IPC分类号： H03M5/22 ,  H04L25/49 ,  H04L27/18 ,  H03C3/00

CPC分类号： H04L25/4908

摘要： A quadriphase phase modulation system having a serial to parallel converter for converting first symbols of two-bit serial data into second symbols of two-bit parallel data, a circuit for generating waveform information in response to the second symbols, a memory for storing basic waveforms and a connection waveform and for reading out basic and connecting waveforms in response to the received waveform information. The basic waveform information is selected on the basis of the present waveform information and the connecting waveform is selected on the basis of the present waveform information and the immediately preceding waveform information. A digital to analog converter converts the basic and connecting waveforms output by the memory means into an analog signal.

摘要翻译： 一种具有串行到并行转换器的四相位相位调制系统，用于将两位串行数据的第一符号转换为二位并行数据的第二符号，用于响应于第二符号产生波形信息的电路，用于存储基本波形的存储器 以及连接波形，用于响应于所接收的波形信息读出基本波形和连接波形。 基于当前波形信息选择基本波形信息，并且基于当前波形信息和紧接在前的波形信息来选择连接波形。 数模转换器将由存储器装置输出的基本和连接波形转换为模拟信号。