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公开(公告)号：US08963290B2
公开(公告)日：2015-02-24
申请号：US13990971
申请日：2010-12-28
IPC分类号： H01L33/36 , H01L29/34 , H01L33/40 , H01L21/02 , H01L21/285 , H01L29/30 , H01L29/45 , H01L33/16 , H01L33/22 , H01L33/32 , H01S5/02 , H01S5/042 , H01S5/323 , H01S5/32 , H01L29/20
CPC分类号： H01L29/34 , H01L21/02664 , H01L21/28575 , H01L29/2003 , H01L29/30 , H01L29/452 , H01L33/16 , H01L33/22 , H01L33/32 , H01L33/40 , H01S5/0215 , H01S5/0217 , H01S5/0425 , H01S5/3202 , H01S5/32341
摘要： The purpose of the present invention is to provide a good ohmic contact for an n-type Group-III nitride semiconductor. An n-type GaN layer and a p-type GaN layer are aequentially formed on a lift-off layer (growth step). A p-side electrode is formed on the top face of the p-type GaN layer. A copper block is formed over the entire area of the top face through a cap metal. Then, the lift-off layer is removed by making a chemical treatment (lift-off step). Then, a laminate structure constituted by the n-type GaN layer, with which the surface of the N polar plane has been exposed, and the p-type GaN layer is subjected to anisotropic wet etching (surface etching step). The N-polar surface after the etching has irregularities constituted by {10-1-1} planes. Then, an n-side electrode is formed on the bottom face of the n-type GaN layer (electrode formation step).
摘要翻译： 本发明的目的是为n型III族氮化物半导体提供良好的欧姆接触。 在剥离层（生长步骤）上同时形成n型GaN层和p型GaN层。 p型电极形成在p型GaN层的顶面上。 通过盖金属在顶面的整个区域上形成铜块。 然后，通过进行化学处理（剥离步骤）去除剥离层。 然后，对由n极GaN层的表面露出的n型GaN层和p型GaN层进行各向异性湿蚀刻（表面蚀刻工序）构成的层叠结构。 蚀刻后的N极性表面具有由{10-1-1}面构成的凹凸。 然后，在n型GaN层的底面上形成n侧电极（电极形成工序）。
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2.发明申请VERTICALLY STRUCTURED GROUP III NITRIDE SEMICONDUCTOR LED CHIP AND METHOD FOR MANUFACTURING THE SAME 有权垂直结构化III族氮化物半导体LED芯片及其制造方法公开(公告)号：US20140319557A1
公开(公告)日：2014-10-30
申请号：US14117281
申请日：2011-05-12
CPC分类号： H01L33/0025 , H01L33/007 , H01L33/0075 , H01L33/0079 , H01L33/32 , H01L33/38
摘要： A method for manufacturing a vertically structured Group III nitride semiconductor LED chip includes a first step of forming a light emitting structure laminate; a second step of forming a plurality of separate light emitting structures by partially removing the light emitting structure laminate to partially expose the growth substrate; a third step of forming a conductive support, which conductive support integrally supporting the light emitting structures; a fourth step of separating the growth substrate by removing the lift-off layer; and a fifth step of dividing the conductive support between the light emitting structures thereby singulating a plurality of LED chips each having the light emitting structure. A first through-hole is formed to open in a central region of each of the light emitting structures such that at least the lift-off layer is exposed, and an etchant is supplied from the first through-hole in the fourth step.
摘要翻译： 一种用于制造垂直结构的III族氮化物半导体LED芯片的方法包括：形成发光结构层压体的第一步骤; 通过部分去除所述发光结构层压体以部分地暴露所述生长衬底来形成多个分离的发光结构的第二步骤; 形成导电支撑件的第三步骤，所述导电支撑件一体地支撑所述发光结构; 通过去除剥离层分离生长衬底的第四步骤; 以及第五步骤，在发光结构之间分隔导电支撑体，由此分离出具有发光结构的多个LED芯片。 第一通孔形成为在每个发光结构的中心区域中开口，使得至少剥离层被暴露，并且在第四步骤中从第一通孔提供蚀刻剂。
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公开(公告)号：USD711582S1
公开(公告)日：2014-08-19
申请号：US29416684
申请日：2012-03-26
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公开(公告)号：US20140015105A1
公开(公告)日：2014-01-16
申请号：US13990971
申请日：2010-12-28
CPC分类号： H01L29/34 , H01L21/02664 , H01L21/28575 , H01L29/2003 , H01L29/30 , H01L29/452 , H01L33/16 , H01L33/22 , H01L33/32 , H01L33/40 , H01S5/0215 , H01S5/0217 , H01S5/0425 , H01S5/3202 , H01S5/32341
摘要： The purpose of the present invention is to provide a good ohmic contact for an n-type Group-III nitride semiconductor. An n-type GaN layer and a p-type GaN layer are aequentially formed on a lift-off layer (growth step). A p-side electrode is formed on the top face of the p-type GaN layer. A copper block is formed over the entire area of the top face through a cap metal. Then, the lift-off layer is removed by making a chemical treatment (lift-off step). Then, a laminate structure constituted by the n-type GaN layer, with which the surface of the N polar plane has been exposed, and the p-type GaN layer is subjected to anisotropic wet etching (surface etching step). The N-polar surface after the etching has irregularities constituted by {10-1-1} planes. Then, an n-side electrode is formed on the bottom face of the n-type GaN layer (electrode formation step).
摘要翻译： 本发明的目的是为n型III族氮化物半导体提供良好的欧姆接触。 在剥离层（生长步骤）上同时形成n型GaN层和p型GaN层。 p型电极形成在p型GaN层的顶面上。 通过帽金属在顶面的整个区域上形成铜块。 然后，通过进行化学处理（剥离步骤）去除剥离层。 然后，对由n极GaN层的表面露出的n型GaN层和p型GaN层进行各向异性湿蚀刻（表面蚀刻工序）构成的层叠结构。 蚀刻后的N极性表面具有由{10-1-1}面构成的凹凸。 然后，在n型GaN层的底面上形成n侧电极（电极形成工序）。
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5.发明授权Vertically structured group III nitride semiconductor LED chip and method for manufacturing the same 有权III组氮化物半导体LED芯片及其制造方法公开(公告)号：US09502603B2
公开(公告)日：2016-11-22
申请号：US14117281
申请日：2011-05-12
CPC分类号： H01L33/0025 , H01L33/007 , H01L33/0075 , H01L33/0079 , H01L33/32 , H01L33/38
摘要： A method for manufacturing a vertically structured Group III nitride semiconductor LED chip includes a first step of forming a light emitting structure laminate; a second step of forming a plurality of separate light emitting structures by partially removing the light emitting structure laminate to partially expose the growth substrate; a third step of forming a conductive support, which conductive support integrally supporting the light emitting structures; a fourth step of separating the growth substrate by removing the lift-off layer; and a fifth step of dividing the conductive support between the light emitting structures thereby singulating a plurality of LED chips each having the light emitting structure. A first through-hole is formed to open in a central region of each of the light emitting structures such that at least the lift-off layer is exposed, and an etchant is supplied from the first through-hole in the fourth step.
摘要翻译： 一种用于制造垂直结构的III族氮化物半导体LED芯片的方法包括：形成发光结构层压体的第一步骤; 通过部分去除所述发光结构层压体以部分地暴露所述生长衬底来形成多个分离的发光结构的第二步骤; 形成导电支撑件的第三步骤，所述导电支撑件一体地支撑所述发光结构; 通过去除剥离层分离生长衬底的第四步骤; 以及第五步骤，在发光结构之间分隔导电支撑体，由此分离出具有发光结构的多个LED芯片。 第一通孔形成为在每个发光结构的中心区域中开口，使得至少剥离层被暴露，并且在第四步骤中从第一通孔提供蚀刻剂。
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公开(公告)号：US20140284770A1
公开(公告)日：2014-09-25
申请号：US14347443
申请日：2011-09-28
CPC分类号： H01L33/0075 , H01L21/02365 , H01L21/78 , H01L29/0603 , H01L33/007 , H01L33/0079 , H01L33/20
摘要： The method of manufacturing a semiconductor device according to the present invention includes: a step of forming a semiconductor laminate on a growth substrate with a lift-off layer therebetween; a step of providing grooves in a grid pattern in the semiconductor laminate, thereby forming a plurality of semiconductor structures each having a nearly quadrangular transverse cross-sectional shape; a step of forming a conductive support body; and a step of removing the lift-off layer using a chemical lift-off process, in which step, in supplying an etchant to the grooves via through-holes provided in a portion above the grooves, the lift-off layer is etched from only one side surface of each semiconductor structure.
摘要翻译： 根据本发明的制造半导体器件的方法包括：在其上具有剥离层的生长衬底上形成半导体层叠体的步骤; 在半导体层叠体中设置栅格图案的槽，由此形成多个具有近似四边形横截面形状的半导体结构; 形成导电性支撑体的工序; 以及使用化学剥离处理去除剥离层的步骤，其中通过设置在沟槽上方的通孔的沟槽向槽施加蚀刻剂，仅剥离层仅从蚀刻 每个半导体结构的一个侧表面。
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公开(公告)号：USD711581S1
公开(公告)日：2014-08-19
申请号：US29416681
申请日：2012-03-26
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8.发明申请VERTICALLY STRUCTURED GROUP III NITRIDE SEMICONDUCTOR LED CHIP AND METHOD FOR MANUFACTURING THE SAME 有权垂直结构化III族氮化物半导体LED芯片及其制造方法公开(公告)号：US20120248458A1
公开(公告)日：2012-10-04
申请号：US13503582
申请日：2009-11-05
申请人： Meoung Whan Cho , Seog Woo Lee , Pil Guk Jang , Ryuichi Toba , Tatsunori Toyota , Yoshitaka Kadowaki
发明人： Meoung Whan Cho , Seog Woo Lee , Pil Guk Jang , Ryuichi Toba , Tatsunori Toyota , Yoshitaka Kadowaki
CPC分类号： H01L33/32 , H01L33/0079 , H01L33/62 , H01L2924/0002 , H01L2933/0066 , H01L2924/00
摘要： A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitting structures; a step of lifting off the growth substrate from the plurality of light emitting structures; and a step of cutting the conductive support thereby singulating a plurality of LED chips each having the light emitting structure. The step of partially removing the light emitting laminate is performed such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon en” is a positive integer) having rounded corners.
摘要翻译： 一种用于制造垂直结构的III族氮化物半导体LED芯片的方法包括在生长衬底上形成发光层压体的步骤; 通过部分去除所述发光层压体以部分地暴露所述生长衬底来形成多个分离的发光结构的步骤; 在所述多个发光结构上形成导电支撑体的步骤; 从多个发光结构剥离生长衬底的步骤; 以及切割导电支撑件的步骤，从而将每个具有发光结构的多个LED芯片分离。 执行部分去除发光层压体的步骤，使得多个发光结构中的每一个具有圆角的顶视图形状或具有圆角的4n-gon en为正整数）。
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公开(公告)号：US09184338B2
公开(公告)日：2015-11-10
申请号：US14347443
申请日：2011-09-28
CPC分类号： H01L33/0075 , H01L21/02365 , H01L21/78 , H01L29/0603 , H01L33/007 , H01L33/0079 , H01L33/20
摘要： The method of manufacturing a semiconductor device according to the present invention includes: a step of forming a semiconductor laminate on a growth substrate with a lift-off layer therebetween; a step of providing grooves in a grid pattern in the semiconductor laminate, thereby forming a plurality of semiconductor structures each having a nearly quadrangular transverse cross-sectional shape; a step of forming a conductive support body; and a step of removing the lift-off layer using a chemical lift-off process, in which step, in supplying an etchant to the grooves via through-holes provided in a portion above the grooves, the lift-off layer is etched from only one side surface of each semiconductor structure.
摘要翻译： 根据本发明的制造半导体器件的方法包括：在其上具有剥离层的生长衬底上形成半导体层叠体的步骤; 在半导体层叠体中设置栅格图案的沟槽的步骤，由此形成多个具有近似四边形横截面形状的半导体结构; 形成导电性支撑体的工序; 以及使用化学剥离处理去除剥离层的步骤，其中通过设置在沟槽上方的通孔的沟槽向槽施加蚀刻剂，仅剥离层仅从蚀刻 每个半导体结构的一个侧表面。
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10.发明申请公开(公告)号：US20150187887A1
公开(公告)日：2015-07-02
申请号：US14412916
申请日：2012-07-04
申请人： Meoung Whan Cho , Seog Woo Lee , Pil Guk Jang , Hoe Young Yang , Jin Hee Kim , Ho Kyun Rho , Se Young Moon , Ryuichi Toba , Yoshitaka Kadowaki
发明人： Meoung Whan Cho , Seog Woo Lee , Pil Guk Jang , Hoe Young Yang , Jin Hee Kim , Ho Kyun Rho , Se Young Moon , Ryuichi Toba , Yoshitaka Kadowaki
IPC分类号： H01L29/20 , H01L29/45 , H01L21/308 , H01L21/02 , H01L21/28
CPC分类号： H01L29/2003 , H01L21/0254 , H01L21/28132 , H01L21/28158 , H01L21/3086 , H01L29/452 , H01L33/007 , H01L33/0079 , H01L33/08 , H01L33/382 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/00
摘要： Provided is a III nitride semiconductor device higher heat dissipation performance, and a method of manufacturing a III nitride semiconductor device which makes it possible to fabricate such a III nitride semiconductor device at higher yield. In a method of a III nitride semiconductor device, a semiconductor structure obtained by sequentially stacking an n-layer, an active layer, and a p-layer is formed on a growth substrate; a support body including a first support electrically connected to an n-layer to serve as an n-side electrode, a second support electrically connected to a p-layer to serve as a p-side electrode, and structures made of an insulator for insulation between first and second supports is formed on the p-layer side of the semiconductor structure; and the growth substrate is separated using a lift-off process. The first support and the second support are grown by plating.
摘要翻译： 提供了III族氮化物半导体器件较高的散热性能，以及制造III族氮化物半导体器件的方法，其可以以更高的产率制造这种III族氮化物半导体器件。 在III族氮化物半导体器件的方法中，在生长衬底上形成通过顺序堆叠n层，有源层和p层而获得的半导体结构; 支撑体，包括电连接到n层以用作n侧电极的第一支撑体，与p层电连接以用作p侧电极的第二支撑体，以及由绝缘体制成的结构 第一和第二支撑之间形成在半导体结构的p层侧上; 并且使用剥离过程分离生长衬底。 第一支撑和第二支撑通过电镀生长。
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