公开(公告)号：US09411760B2

公开(公告)日：2016-08-09

申请号：US13499516

申请日：2010-10-01

申请人： Gabriele Sartori ,  Subir Ghosh ,  William Liao

发明人： Gabriele Sartori ,  Subir Ghosh ,  William Liao

IPC分类号： G06F15/16 ,  G06F13/38

CPC分类号： G06F13/385 ,  G06F2213/3812

摘要： In a system and method for a thin-client terminal system having a local screen buffer using a serial bus, a serial bus interface device receives encoded data from a thin-client server system. The serial bus interface device decodes the encoded data according to a serial bus data format and provides the decoded data to a thin-client control system. The thin-client control system distributes the decoded data for processing to a video processing system, an audio processing system, and an input/output control system. The thin-client control system also receives input data from input devices connected to the thin-client terminal system. The input data is processed and encoded according to the serial bus data format for transmission to the thin-client server system.

摘要翻译： 在具有使用串行总线的本地屏幕缓冲器的瘦客户机终端系统的系统和方法中，串行总线接口设备从瘦客户端服务器系统接收编码数据。 串行总线接口设备根据串行总线数据格式解码编码数据，并将解码的数据提供给瘦客户端控制系统。 瘦客户端控制系统将用于处理的解码数据分配给视频处理系统，音频处理系统和输入/输出控制系统。 瘦客户端控制系统还从连接到瘦客户机终端系统的输入设备接收输入数据。 输入数据根据串行总线数据格式进行处理和编码，以传输到瘦客户端服务器系统。

公开(公告)号：US08749566B2

公开(公告)日：2014-06-10

申请号：US13301429

申请日：2011-11-21

申请人： Anita Chowdhry ,  Subir Ghosh

发明人： Anita Chowdhry ,  Subir Ghosh

IPC分类号： G06F13/22 ,  G09G5/39 ,  G09G5/393

CPC分类号： G09G5/393 ,  G06F3/14 ,  G06F3/1415 ,  G06F3/1454 ,  G09G5/026 ,  G09G5/14 ,  G09G5/397 ,  G09G2320/10 ,  G09G2340/02 ,  G09G2340/125 ,  G09G2350/00 ,  G09G2360/10 ,  G09G2360/125 ,  G09G2370/022

摘要： A video output system in a computer system reads pixel information from a frame buffer to generate a video output signal. In addition, a full-motion video may also be displayed. Reading from both the frame buffer and the full-motion video buffer when displaying the full-motion video window wastes valuable memory bandwidth. Thus, the disclosed system provides a system and methods for identifying where the video output system must read from the frame buffer and where it must read from the full-motion video buffer while minimizing the amount of area it reads from both the frame buffer and the full-motion video buffer.

摘要翻译： 计算机系统中的视频输出系统从帧缓冲器读取像素信息以产生视频输出信号。 此外，还可以显示全动态视频。 当显示全动态视频窗口时，从帧缓冲器和全动态视频缓冲器读取浪费宝贵的存储器带宽。 因此，所公开的系统提供了一种系统和方法，用于识别视频输出系统必须从帧缓冲器读取的位置以及其必须从全运动视频缓冲器读取的位置，同时最小化其从帧缓冲器和 全动态视频缓冲。

公开(公告)号：US20140139537A1

公开(公告)日：2014-05-22

申请号：US13774819

申请日：2013-02-22

申请人： Subir Ghosh ,  Anita Chowdhry ,  Sergey Kipnis

发明人： Subir Ghosh ,  Anita Chowdhry ,  Sergey Kipnis

IPC分类号： G09G5/00

CPC分类号： G09G5/001 ,  G06F3/14 ,  G06F3/1454 ,  G09G5/02 ,  G09G5/06 ,  G09G2340/02 ,  G09G2370/025

摘要： Systems and methods for an efficient display data transfer algorithm over a network are disclosed. A compressed frame buffer update transmitted from a server via a network is received by a hardware decompression engine. The hardware decompression engine identifies one or more palette entries indicated in the compressed frame buffer update and determines whether the one or more palette entries is stored in a palette cache of the hardware decompression engine. If the one or more palette entries is not stored in the palette cache, the hardware decompression engine writes the one or more palette entries from an external palette memory to the palette cache. Decompressed display data is generated based on the compressed frame buffer update using the palette cache. The decompressed display data is written to an output buffer of the hardware decompression engine.

摘要翻译： 公开了一种用于网络上的有效显示数据传输算法的系统和方法。 经由网络从服务器发送的压缩帧缓冲器更新由硬件解压缩引擎接收。 硬件解压缩引擎识别在压缩帧缓冲器更新中指示的一个或多个调色板条目，并确定一个或多个调色板条目是否存储在硬件解压缩引擎的调色板高速缓存中。 如果一个或多个调色板条目未存储在调色板高速缓存中，则硬件解压缩引擎将一个或多个调色板条目从外部调色板内存写入调色板高速缓存。 基于使用调色板高速缓存的压缩帧缓冲器更新来生成解压缩显示数据。 解压缩的显示数据被写入硬件解压缩引擎的输出缓冲器。

公开(公告)号：US08723891B2

公开(公告)日：2014-05-13

申请号：US12861217

申请日：2010-08-23

申请人： Anita Chowdhry ,  Subir Ghosh

发明人： Anita Chowdhry ,  Subir Ghosh

IPC分类号： G09G5/00 ,  G09G5/02 ,  G06T1/20 ,  G09G5/36 ,  H04N7/01

CPC分类号： H04N19/59 ,  H04N19/115 ,  H04N19/156 ,  H04N19/162 ,  H04N19/40 ,  H04N19/44 ,  H04N19/587

摘要： In a digital video processing system for processing full-motion video in computer terminal systems, two main rendering paths are created for a computer terminal system: a screen buffer path and a full-motion video path. The screen buffer path renders a desktop display from a screen buffer within the terminal system. The full-motion video path decodes a video stream and then processes the decoded video stream with a video processing pipeline to fit the video frames within a destination video window within the desktop display. The video processing pipeline performs clipping, blending, chroma resampling, resizing, and color converting of the video frames in pipelined stages with minimal memory accesses. A video adapter then combines the desktop display with the processed digital video for a final terminal display.

摘要翻译： 在用于在计算机终端系统中处理全运动视频的数字视频处理系统中，为计算机终端系统创建两个主要渲染路径：屏幕缓冲路径和全动态视频路径。 屏幕缓冲路径从终端系统内的屏幕缓冲区呈现桌面显示。 全动态视频路径解码视频流，然后用视频处理流水线处理解码的视频流，以适应桌面显示内的目的地视频窗口内的视频帧。 视频处理流水线以最小的存储器访问在流水线阶段中执行剪辑，混合，色度重采样，调整大小和颜色转换。 然后，视频适配器将桌面显示器与处理后的数字视频相结合，用于最终终端显示。

公开(公告)号：US20130016111A1

公开(公告)日：2013-01-17

申请号：US13548535

申请日：2012-07-13

申请人： Subir Ghosh

发明人： Subir Ghosh

IPC分类号： G09G5/36

CPC分类号： G06F13/00 ,  G06F3/1423 ,  G09G5/18 ,  G09G5/395 ,  G09G2350/00 ,  G09G2370/022

摘要： Graphics display adapters for driving multiple display monitors have become very popular. Graphics display adapters that drive multiple monitors can be used to provide terminal services to multiple independent terminals or be used to provide multiple displays to a single user. Generating video signals for multiple display systems puts a heavy burden on the video memory system since multiple different video signal generators may read from associated frame buffers in a shared video memory system. In one disclosed embodiment, a plurality of video memory read triggers are provided wherein at least two of which are staggered to reduce the load on the video memory system. In response to each read trigger, display data is read from a frame buffer to an associated video signal generation circuit. Each video signal generation circuit then provides a display signal to an associated display screen in a multi-screen environment.

摘要翻译： 用于驱动多个显示器的图形显示适配器变得非常受欢迎。 用于驱动多个显示器的图形显示适配器可用于向多个独立终端提供终端服务，或用于向单个用户提供多个显示。 为多个显示系统生成视频信号给视频存储系统带来沉重的负担，因为多个不同的视频信号发生器可以从共享视频存储器系统中的相关联的帧缓冲器中读取。 在一个公开的实施例中，提供了多个视频存储器读取触发器，其中至少两个交错地交错以减少视频存储器系统上的负载。 响应于每个读取触发，将显示数据从帧缓冲器读取到相关联的视频信号生成电路。 然后，每个视频信号发生电路在多屏幕环境中向相关的显示屏提供显示信号。

公开(公告)号：US20120098864A1

公开(公告)日：2012-04-26

申请号：US12908365

申请日：2010-10-20

申请人： Anita Chowdhry ,  Subir Ghosh

发明人： Anita Chowdhry ,  Subir Ghosh

IPC分类号： G09G5/36

CPC分类号： G09G5/14 ,  G09G5/393 ,  G09G5/395 ,  G09G5/397 ,  G09G2340/02 ,  G09G2340/0407 ,  G09G2350/00 ,  G09G2360/18 ,  G09G2370/022

摘要： The video output system in a computer system reads pixel information from a frame buffer to generate a video output signal. In addition, full-motion video may also be displayed in a window defined in the frame buffer. If the native resolution of the full-motion video is larger than the window defined in said frame buffer then valuable memory space and memory bandwidth is being wasted by writing said larger full-motion video in a memory system (and later reading it back) when some data from the full-motion video will be discarded. Thus, a video pre-processor is disclosed to reduce the size of the full-motion video before that full-motion video is written into a memory system. The video pre-processor will scale the full-motion video down to a size no larger than the window defined in the frame buffer.

摘要翻译： 计算机系统中的视频输出系统从帧缓冲器读取像素信息以产生视频输出信号。 此外，全动态视频也可以在帧缓冲器中定义的窗口中显示。 如果全动态视频的原始分辨率大于在所述帧缓冲器中定义的窗口，则通过将较大的全运动视频写入存储器系统（并稍后读回）来浪费宝贵的存储器空间和存储器带宽，当时 来自全动态视频的一些数据将被丢弃。 因此，公开了一种视频预处理器，用于在将全动态视频写入存储器系统之前减小全动态视频的尺寸。 视频预处理器将把全动态视频缩小至不大于帧缓冲区中定义的窗口的大小。

公开(公告)号：US20100306838A1

公开(公告)日：2010-12-02

申请号：US12474681

申请日：2009-05-29

申请人： Subir Ghosh ,  Gabriele Sartori

发明人： Subir Ghosh ,  Gabriele Sartori

IPC分类号： H04L9/32

CPC分类号： H04L9/3234 ,  H04L2209/605

摘要： A device and a method of authenticating an electronic device are described. The method may comprise transmitting a token value and a parameter value to the electronic device and selecting a private key within the electronic device using the parameter value. The token value may be processed with a method selected by the parameter value to generate a processed token. The processed token may be compared with an expected processed token and the electronic device may be authenticated if the processed token compares favorably with said expected processed token.

摘要翻译： 描述了一种认证电子设备的设备和方法。 该方法可以包括向电子设备发送令牌值和参数值，并使用参数值选择电子设备内的私钥。 可以使用由参数值选择的方法来处理令牌值，以生成已处理的令牌。 处理的令牌可以与预期处理的令牌进行比较，并且如果所处理的令牌与所述预期处理的令牌相比较，则电子设备可被认证。

公开(公告)号：US5442329A

公开(公告)日：1995-08-15

申请号：US161258

申请日：1993-12-09

申请人： Subir Ghosh ,  Luiz C. Da Silva

发明人： Subir Ghosh ,  Luiz C. Da Silva

IPC分类号： H01P1/06 ,  H01P1/16

CPC分类号： H01P1/067

摘要： The rotor of the joint includes two rectangular waveguide ports, carrying two separate signals. The stator has two corresponding rectangular waveguide ports. The ports are coupled with a circular waveguide, which comprises two relatively rotatable stub-cylinders, disposed co-axially in-line on the axis of rotation. Signal A is transmitted through the circular waveguide, across the joint, in the TM01 propagation mode, while signal B is transmitted across the joint in the TE01 mode. These circular-symmetrical modes, with mutually orthogonal field distribution, are able to cut cross-talk interference, since the mode transducers of these modes maintain good mutual isolation, even though the signals are present together in the circular waveguide, and at the same or similar frequency. The TM01 mode (signal A) is excited, and received, by means of slots formed in the end wall of the circular waveguide stubs. The port for signal A communicates with the circular waveguide through the two slots. The TE01 mode (signal B) is excited, and received, by means of four axial slots formed in the cylindrical wall of the circular waveguide. The transducer for signal B is disposed in a wrap-around relationship with the circular waveguide, and is in communication with the circular waveguide through the four slots. An E-plane junctional continuation communicates the port for signal B, via two slots, with the transducer for signal B.

摘要翻译： 接头的转子包括两个矩形波导端口，承载两个独立的信号。 定子有两个对应的矩形波导端口。 端口与圆形波导耦合，圆形波导包括两个相对可旋转的短轴，在旋转轴线上同轴地成一列设置。 在TM01传播模式下，信号A通过圆形波导穿过接头传输，而信号B在TE01模式下通过接头传输。 这些具有相互正交的场分布的圆形对称模式能够切断串扰干扰，因为这些模式的模式换能器保持良好的相互隔离，即使信号一起存在于圆形波导中，并且在同一或 频率相似 TM01模式（信号A）通过形成在圆形波导短截线的端壁中的槽被激发并被接收。 信号A的端口通过两个槽与圆形波导连通。 TE01模式（信号B）通过形成在圆形波导的圆柱形壁中的四个轴向槽被激发和接收。 用于信号B的换能器以与环形波导的环绕关系设置，并且通过四个槽与圆形波导连通。 E平面连接继续通过两个插槽与信号B的传感器通信信号B的端口。

公开(公告)号：US4680558A

公开(公告)日：1987-07-14

申请号：US776167

申请日：1985-09-05

申请人： Subir Ghosh ,  Aluizio P. Junior

发明人： Subir Ghosh ,  Aluizio P. Junior

IPC分类号： H01P5/08 ,  H01P1/16 ,  H01Q13/02

CPC分类号： H01Q13/0216

摘要： A transition device achieves transformation of the signal carrier mode of a continuous wave guide, into the hybrid mode, the corresponding mode for carrying signals in corrugated structures, by employing a tapered waveguide transition of circular cross-section having dual-depth circumferential slots in the interior boundary surface thereof. The transition device utilizes a mutual resonance property of the slots at the port which connects to a continuous waveguide to achieve satisfactory operation in two frequency bands. At the port which is connected to a corrugated horn, the quarter wavelength self resonance of the individual slots provides the desired hybrid mode under balanced hybrid condition in these two bands. A gradual transition of the electrical characteristics is achieved along the length of the transition device through an adjustment of slot dimensions. Excitation of higher order spurious modes is maintained at a low level when properly chosen cross-sectional dimensions are considered along the length of the transition device.

摘要翻译： PCT No.PCT / BR84 / 00007 Sec。 371日期：1985年9月5日 102（e）1985年9月5日PCT PCT日期：1984年12月27日PCT公布。 第WO85 / 02945号公报 日期：1985年7月4日。过渡装置实现将连续波导的信号载体模式转换为混合模式，通过采用具有圆形截面的锥形波导过渡的波纹状结构中传送信号的相应模式， 在其内部边界表面中的双深度圆周槽。 转换装置利用连接到连续波导的端口处的槽的共振特性，以实现两个频带中的令人满意的操作。 在连接到波纹喇叭口的端口处，单个插槽的四分之一波长自谐振在这两个频带的平衡混合条件下提供了所需的混合模式。 通过调整槽尺寸，沿着过渡装置的长度实现电特性的逐渐转变。 当沿着过渡装置的长度考虑适当选择的横截面尺寸时，高阶杂散模式的激励保持在低水平。

公开(公告)号：US20170193136A1

公开(公告)日：2017-07-06

申请号：US15445844

申请日：2017-02-28

申请人： Sharat C. Prasad ,  SUBIR GHOSH

发明人： Sharat C. Prasad ,  SUBIR GHOSH

IPC分类号： G06F17/50

CPC分类号： G06F17/505 ,  G06F2217/68

摘要： A chip design environment is disclosed which automates component requirements based on processes to provide a synthesized design. The system may simulate the synthesized design performance and may evaluate performance results with a learning controller to correct inefficiencies using predictive modeling based on confidence scores.