公开(公告)号：US10062639B2

公开(公告)日：2018-08-28

申请号：US14565686

申请日：2014-12-10

Applicant: STMICROELECTRONICS SDN BHD

Inventor： Cheeyang Ng

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49541 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/45015 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48245 ,  H01L2224/85439 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/14 ,  H01L2924/1711 ,  H01L2924/17738 ,  H01L2924/17747 ,  H01L2924/20641 ,  H01L2924/20642 ,  H01L2924/20643 ,  H01L2924/20644 ,  H01L2924/20645 ,  H01L2924/207

Abstract: An integrated circuit (IC) device includes an IC die and a plurality of leads. Each lead includes an unplated proximal end including a first material, and an unplated distal end including the first material. A plated bond wire portion extends between the proximal and distal ends and includes the first material and a plating of a second material thereon. A plurality of bond wires extend between the IC die and the plated bond wire portions of the leads. An encapsulation material surrounds the IC die and bond wires so that the unplated proximal end and plated bond wire portion of each lead are covered by the encapsulation material.

公开(公告)号：US20160172273A1

公开(公告)日：2016-06-16

申请号：US14565686

申请日：2014-12-10

Applicant: STMICROELECTRONICS SDN BHD

Inventor： Cheeyang NG

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49541 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48245 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/14 ,  H01L2924/1711 ,  H01L2924/17738 ,  H01L2924/17747 ,  H01L2924/20641 ,  H01L2924/20642 ,  H01L2924/20643 ,  H01L2924/20644 ,  H01L2924/20645 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An integrated circuit (IC) device includes an IC die and a plurality of leads. Each lead includes an unplated proximal end including a first material, and an unplated distal end including the first material. A plated bond wire portion extends between the proximal and distal ends and includes the first material and a plating of a second material thereon. A plurality of bond wires extend between the IC die and the plated bond wire portions of the leads. An encapsulation material surrounds the IC die and bond wires so that the unplated proximal end and plated bond wire portion of each lead are covered by the encapsulation material.

Abstract translation: 集成电路（IC）装置包括IC管芯和多个引线。 每个引线包括包括第一材料的未镀层近端和包括第一材料的未镀层远端。 电镀接合线部分在近端和远端之间延伸并且包括第一材料和其上的第二材料的镀覆。 多个接合线在IC管芯和引线的电镀接合线部分之间延伸。 封装材料围绕IC管芯和接合线，使得每个引线的未镀层的近端和电镀接合线部分被封装材料覆盖。

公开(公告)号：US11862540B2

公开(公告)日：2024-01-02

申请号：US17165492

申请日：2021-02-02

Applicant: STMicroelectronics SDN BHD

Inventor： Yh Heng

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/49551 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3107

Abstract: A frame includes leadframe units arranged in a matrix. Each leadframe unit has a die pad and tie bars connected to and extending from the die pad. Each tie bar includes an internal tie bar portion and an external tie bar portion. The internal tie bar portion of at least one tie bar includes a cut separating a part of the internal tie bar portion from the external tie bar portion. An out-of-plane bend in that part forms a mold flow control structure.

公开(公告)号：US20030020457A1

公开(公告)日：2003-01-30

申请号：US10188284

申请日：2002-07-01

Applicant: STMICROELECTRONICS SDN BHD

Inventor： Lee Boon Seng ,  Tan Kek Yong

IPC: G01R001/00

CPC classification number: G01R31/2887

Abstract: A test handler apparatus, having a treatment area; a testing station in the treatment area; and an output unit connected to an output of the treatment area. An input unit picks singulated or stripped packages and unloads them on carrier boats in a loading zone; a conveyor mechanism transfers the carrier boats from the loading zone through the treatment area to the testing station and from the testing station to the output unit. In practice, the carrier boat forms a universal carrier which is able to contain multiple singulated or strip packages for the purpose of testing. Placing packages onto carriers with standardized dimension allows handler equipment to accommodate the packages in singulated or strip condition.

Abstract translation: 具有处理区域的测试处理装置; 治疗区内的检测站; 以及连接到处理区域的输出的输出单元。 输入单元选择单个或剥离的包装，并在装载区域的载体船上卸载它们; 输送机构将承载船从装载区域通过处理区域传送到测试站，并从测试站传送到输出单元。 在实践中，承载船形成通用载体，其能够包含用于测试目的的多个单个或带状包装。 将包装放置在具有标准尺寸的载体上，使处理设备能够在单独或剥离条件下容纳包装。

公开(公告)号：US11887921B2

公开(公告)日：2024-01-30

申请号：US17412007

申请日：2021-08-25

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics SDN BHD

Inventor： Andrea Albertinetti ,  Marifi Corregidor Cagud

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/2732 ,  H01L2224/29019 ,  H01L2224/83192

Abstract: A warped semiconductor die is attached onto a substrate such as a leadframe by dispensing a first mass of die attach material onto an area of the substrate followed by dispensing a second mass of die attach material so that the second mass of die attach material provides a raised formation of die attach material. For instance, the second mass may be deposited centrally of the first mass. The semiconductor die is placed onto the first and second mass of die attach material with its concave/convex shape matching the distribution of the die attach material thus effectively countering undesired entrapment of air.

公开(公告)号：US20220068788A1

公开(公告)日：2022-03-03

申请号：US17412007

申请日：2021-08-25

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics SDN BHD

Inventor： Andrea ALBERTINETTI ,  Marifi Corregidor CAGUD

IPC: H01L23/498 ,  H01L23/00

Abstract: A warped semiconductor die is attached onto a substrate such as a leadframe by dispensing a first mass of die attach material onto an area of the substrate followed by dispensing a second mass of die attach material so that the second mass of die attach material provides a raised formation of die attach material. For instance, the second mass may be deposited centrally of the first mass. The semiconductor die is placed onto the first and second mass of die attach material with its concave/convex shape matching the distribution of the die attach material thus effectively countering undesired entrapment of air.

公开(公告)号：US20240120267A1

公开(公告)日：2024-04-11

申请号：US18390544

申请日：2023-12-20

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics SDN BHD

Inventor： Andrea ALBERTINETTI ,  Marifi Corregidor CAGUD

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L24/27 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/2732 ,  H01L2224/29019 ,  H01L2224/83192

Abstract: A warped semiconductor die is attached onto a substrate such as a leadframe by dispensing a first mass of die attach material onto an area of the substrate followed by dispensing a second mass of die attach material so that the second mass of die attach material provides a raised formation of die attach material. For instance, the second mass may be deposited centrally of the first mass. The semiconductor die is placed onto the first and second mass of die attach material with its concave/convex shape matching the distribution of the die attach material thus effectively countering undesired entrapment of air.

公开(公告)号：US20210280502A1

公开(公告)日：2021-09-09

申请号：US17165492

申请日：2021-02-02

Applicant: STMicroelectronics SDN BHD

Inventor： Yh HENG

IPC: H01L23/495 ,  H01L21/56

Abstract: A frame includes leadframe units arranged in a matrix. Each leadframe unit has a die pad and tie bars connected to and extending from the die pad. Each tie bar includes an internal tie bar portion and an external tie bar portion. The internal tie bar portion of at least one tie bar includes a cut separating a part of the internal tie bar portion from the external tie bar portion. An out-of-plane bend in that part forms a mold flow control structure.

公开(公告)号：US10699990B2

公开(公告)日：2020-06-30

申请号：US16058045

申请日：2018-08-08

Applicant: STMICROELECTRONICS SDN BHD

Inventor： Cheeyang Ng

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31

Abstract: An integrated circuit (IC) device includes an IC die and a plurality of leads. Each lead includes an unplated proximal end including a first material, and an unplated distal end including the first material. A plated bond wire portion extends between the proximal and distal ends and includes the first material and a plating of a second material thereon. A plurality of bond wires extend between the IC die and the plated bond wire portions of the leads. An encapsulation material surrounds the IC die and bond wires so that the unplated proximal end and plated bond wire portion of each lead are covered by the encapsulation material.

公开(公告)号：US20180350728A1

公开(公告)日：2018-12-06

申请号：US16058045

申请日：2018-08-08

Applicant: STMICROELECTRONICS SDN BHD

Inventor： Cheeyang Ng

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00

Abstract: An integrated circuit (IC) device includes an IC die and a plurality of leads. Each lead includes an unplated proximal end including a first material, and an unplated distal end including the first material. A plated bond wire portion extends between the proximal and distal ends and includes the first material and a plating of a second material thereon. A plurality of bond wires extend between the IC die and the plated bond wire portions of the leads. An encapsulation material surrounds the IC die and bond wires so that the unplated proximal end and plated bond wire portion of each lead are covered by the encapsulation material.