Integrated circuit device with plating on lead interconnection point and method of forming the device

    公开(公告)号:US10699990B2

    公开(公告)日:2020-06-30

    申请号:US16058045

    申请日:2018-08-08

    Inventor: Cheeyang Ng

    Abstract: An integrated circuit (IC) device includes an IC die and a plurality of leads. Each lead includes an unplated proximal end including a first material, and an unplated distal end including the first material. A plated bond wire portion extends between the proximal and distal ends and includes the first material and a plating of a second material thereon. A plurality of bond wires extend between the IC die and the plated bond wire portions of the leads. An encapsulation material surrounds the IC die and bond wires so that the unplated proximal end and plated bond wire portion of each lead are covered by the encapsulation material.

    Integrated Circuit Device with Plating on Lead Interconnection Point and Method of Forming the Device

    公开(公告)号:US20180350728A1

    公开(公告)日:2018-12-06

    申请号:US16058045

    申请日:2018-08-08

    Inventor: Cheeyang Ng

    Abstract: An integrated circuit (IC) device includes an IC die and a plurality of leads. Each lead includes an unplated proximal end including a first material, and an unplated distal end including the first material. A plated bond wire portion extends between the proximal and distal ends and includes the first material and a plating of a second material thereon. A plurality of bond wires extend between the IC die and the plated bond wire portions of the leads. An encapsulation material surrounds the IC die and bond wires so that the unplated proximal end and plated bond wire portion of each lead are covered by the encapsulation material.

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