Early global observation point for a uniprocessor system
    2.
    发明申请
    Early global observation point for a uniprocessor system 审中-公开
    早期全球观察点的单处理器系统

    公开(公告)号:US20070073977A1

    公开(公告)日:2007-03-29

    申请号:US11241363

    申请日:2005-09-29

    IPC分类号: G06F13/28

    CPC分类号: G06F12/0835

    摘要: In one embodiment, the present invention includes a method for performing an operation in a processor of a uniprocessor system, initiating a write transaction to send a result of the operation to a memory of the uniprocessor system, and issuing a global observation point for the write transaction to the processor before the result is written into the memory. In some embodiments, the global observation point may be issued earlier than if the processor were in a multiprocessor system. Other embodiments are described and claimed.

    摘要翻译: 在一个实施例中,本发明包括一种用于在单处理器系统的处理器中执行操作的方法,发起写入事务以将操作结果发送到单处理器系统的存储器,以及发出用于写入的全局观察点 事务处理器之前,将结果写入内存。 在一些实施例中,全局观测点可以比处理器处于多处理器系统中的情况更早发布。 描述和要求保护其他实施例。

    Communication bus power state management
    4.
    发明授权
    Communication bus power state management 有权
    通信总线电源状态管理

    公开(公告)号:US07529953B1

    公开(公告)日:2009-05-05

    申请号:US11446661

    申请日:2006-06-05

    IPC分类号: G06F1/26

    摘要: Methods and apparatus to manage communication bus power states are described. In one embodiment, an apparatus comprises a bus including a master node and at least a first slave node, logic to transmit a first power state change request from the master node to the first slave node, logic to receive the first power state change request in the first slave node, and logic to designate the first slave node as the master node when the first slave node denies the first power state change request.

    摘要翻译: 描述了管理通信总线电源状态的方法和装置。 在一个实施例中,一种装置包括总线,其包括主节点和至少第一从节点,用于将第一功率状态改变请求从主节点发送到第一从节点的逻辑,以接收第一功率状态改变请求的逻辑 第一从节点,以及当第一从节点拒绝第一功率状态改变请求时将第一从节点指定为主节点的逻辑。

    NoDMA cache
    5.
    发明申请
    NoDMA cache 有权
    NoDMA缓存

    公开(公告)号:US20080040566A1

    公开(公告)日:2008-02-14

    申请号:US11973209

    申请日:2007-10-05

    IPC分类号: G06F12/14

    摘要: A NoDMA cache including a super page field. The super page field indicates when a set of pages contain protected information. The NoDMA cache is used by a computer system to deny I/O device access to protected information in system memory.

    摘要翻译: 包含超级页面字段的NoDMA缓存。 超级页面字段指示一组页面何时包含受保护的信息。 计算机系统使用NoDMA缓存来拒绝I / O设备访问系统内存中受保护的信息。

    Apparatus and method for reduced power consumption communications over a physical interconnect
    6.
    发明申请
    Apparatus and method for reduced power consumption communications over a physical interconnect 有权
    通过物理互连降低功耗通信的装置和方法

    公开(公告)号:US20070226596A1

    公开(公告)日:2007-09-27

    申请号:US11387407

    申请日:2006-03-23

    IPC分类号: H03M13/00

    摘要: A system and method for reduced power consumption communications over a physical interconnect is described. In an embodiment, an input/output circuit includes a port to receive a transmission unit via an interconnect, a combining module coupled to the port to append at least one of a first and a second indicator to the transmission unit, a first adder module to generate the first indicator, indicating that the transmission unit is a starting transmission unit of a set of related transmission units, a second adder module to generate the second indicator, indicating that the starting transmission unit of the set of related transmission units has already been received, and logic to determine at least one of the start and end boundaries of the set of related transmission units.

    摘要翻译: 描述了通过物理互连降低功耗通信的系统和方法。 在一个实施例中,输入/输出电路包括经由互连接收传输单元的端口,耦合到端口的组合模块,以将第一和第二指示符中的至少一个附加到传输单元;第一加法器模块, 产生第一指示符,指示发送单元是一组相关发送单元的起始发送单元,生成第二指示符的第二加法器模块,指示已经接收到该组相关发送单元的起始发送单元 以及用于确定所述一组相关传输单元的开始和结束边界中的至少一个的逻辑。

    Active address table
    7.
    发明申请
    Active address table 审中-公开
    活动地址表

    公开(公告)号:US20070078879A1

    公开(公告)日:2007-04-05

    申请号:US11240977

    申请日:2005-09-30

    IPC分类号: G06F7/00

    CPC分类号: G06F12/0831 G06F12/0813

    摘要: A structure referred to as an Active Address Table (AAT) may be used for cache coherence conflict resolution. The AAT may function to detect conflicting coherent requests to the same address and may ensure that each requesting entity receives a copy of the requested cache line in a cache line state-maintaining manner.

    摘要翻译: 称为活动地址表(AAT)的结构可用于高速缓存一致冲突解决。 AAT可以用于检测对相同地址的冲突相干请求,并且可以确保每个请求实体以高速缓存行状态维护方式接收所请求的高速缓存行的副本。