摘要:
Methods and apparatus to operate various logic blocks of an integrated circuit (IC) at independent voltages are described. In one embodiment, supply of power to one or more domains in an IC is adjusted based on an indication that power consumption by components of the corresponding domain is to be modified. Other embodiments are also described.
摘要:
A method and an apparatus to regulate voltage supply have been disclosed. In one embodiment, the apparatus includes a power converter block to generate an output voltage from an input voltage and a voltage regulator controller coupled to the power converter block to input at least one time-modulated signal to the power converter block, the at least one time-modulated signal having a duty cycle, the voltage regulator controller including a counter having an increment value substantially proportional to the input voltage, wherein the counter is used to adjust the duty cycle of the at least one time-modulated signal. Other embodiments have been claimed and described.
摘要:
Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores
摘要:
A voltage regulator is described for microelectronic devices using dual edge pulse width modulated control signal. In one example a first digital duty cycle value is received from a voltage controller and a pulse width modulated waveform is generated in response to the first duty cycle value, the waveform comprising a plurality of pulses with a modulated width. The waveform is applied to a voltage generator to generate a supply of power at a voltage determined by the duty cycle of the waveform. A second digital duty cycle value is received from the controller, and the leading edge of a subsequent pulse of the waveform is advanced if the second digital duty cycle value is greater than the first digital duty cycle. The trailing edge of the subsequent pulse of the waveform is advanced if the second digital duty cycle value is less than the first digital duty cycle value
摘要:
In one embodiment, there is provided a method comprising determining a target operating point for an electronic device, the target operating point including a target operating frequency and a target operating voltage; and dynamically changing a current operating point for the electronic device including a current operating frequency and a current operating voltage by non-contemporaneously changing the current operating frequency to the target operating frequency and a current operating voltage to the target operating voltage, wherein during the changing the electronic device is in an active state.
摘要:
Enabling pulse clocks are configurably generated for a selected one of a first and a second signaling mode, employing a configurable enabling pulse clock generator configurable to so generate the enabling pulse clocks.
摘要:
The invention relates to flexible compounds that are made of a thermoplastic elastomer and a filler having increased thermal conductivity, and to flexible heat-conducting tubes produced on the basis thereof that are especially useful as heating or cooling tubes. The inventive mixtures have a thermal conductivity in the range of from 0.5 to 2 W/mK.
摘要:
The thermoplast-based glass/plastic compounds according to the invention contain a low melting point sulfophosphate glass having the following composition: 4 to 10% Li2O; 4 to 10% Na2O; 4 to 8% K2O; 1 to 2% CaO; 35 to 37% ZnO; 0 to 3% La2O3; 19 to 22% P2O5 and 19 to 22% SO3, a high-performance thermoplast, an organic additive and/or a mineral filling material and optionally also carbon black and/or a sterically hindered phosphite or phenol.
摘要:
A prefetching control system provided for a processor. The prefetching queue may include an arbiter, a cache queue and a prefetch queue. The arbiter issues requests including read requests. Responsive to a read request, the cache queue issues a control signal. The prefetch queue receives the control signal and an address associated with the read request. When the received address is a member of a pattern of read requests from sequential memory locations, the prefetch queue issues a prefetch request to the arbiter.
摘要:
Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.