Method and apparatus for performing tangent space lighting and bump mapping in a deferred shading graphics processor
    1.
    发明授权
    Method and apparatus for performing tangent space lighting and bump mapping in a deferred shading graphics processor 有权
    在延迟着色图形处理器中执行切线空间照明和凹凸贴图的方法和装置

    公开(公告)号:US06771264B1

    公开(公告)日:2004-08-03

    申请号:US09213990

    申请日:1999-12-17

    IPC分类号: G06T1560

    摘要: A system and method for performing tangent space lighting in a deferred shading graphics processor (DSGP) encompasses blocks of the DSGP that preprocess data and a Phong shader that executes only after all fragments have been preprocessed. A preprocessor block receives texture maps specified in a variety of formats and converts those texture maps to a common format for use by the Phong shader. The preprocessor blocks provide the Phong shader with interpolated surface basis vectors (vs, vt, n), a vector Tb that represents in tangen/object space the texture/bump data from the texture maps, light data, material data, eye coordinates and other information used by the Phong shader to perform the lighting and bump mapping computations. The data from the preprocessor is provided for each fragment for which lighting effects need to be computed. The Phong shader computes the color of a fragment using the information provided by the preprocessor. The Phong shader performs all lighting computations in eye space, which requires it first to transform bump data from tangent space to eye space. In one embodiment the Phong hardware does this by multiplying a matrix M whose columns comprise eye space basis vectors (bs, bt, n) derived from the surface basis vectors (vs, vt, n) and the vector Tb of bump map data. The eye space basis vectors are derived by the DSGP preprocessor so that the multiplication (M×Tb) gives the perturbed surface normal N′ in eye space, reflecting the bump effects. The perturbed surface normal N′ is subsequently used in the lighting computations.

    摘要翻译: 用于在延迟着色图形处理器(DSGP)中执行切线空间照明的系统和方法包括预处理数据的DSGP的块和仅在所有片段被预处理之后才执行的Phong着色器。 预处理器块接收以各种格式指定的纹理贴图,并将这些纹理贴图转换为普通格式供Phong着色器使用。 预处理器块为Phong着色器提供了内插表面基向量(vs,vt,n),一个向量Tb,它在切向/对象空间中表示纹理贴图中的纹理/凹凸数据,光数据,材料数据,眼睛坐标等 Phong着色器使用的信息执行照明和凹凸贴图计算。 为需要计算照明效果的每个片段提供来自预处理器的数据。 Phong着色器使用预处理器提供的信息计算片段的颜色。 Phong着色器执行眼睛空间中的所有照明计算,这需要它首先将凹凸数据从切线空间转换为眼睛空间。 在一个实施例中,Phong硬件通过乘以其列包括从表面基矢量(vs,vt,n)导出的凹凸贴图数据的矢量Tb的基准矢量(bs,bt,n)的矩阵M来实现。 通过DSGP预处理器导出眼空间基矢量,使得乘法(MxTb)给出了眼空间中的扰动表面法线N',反映了碰撞效应。 扰动表面法线N'随后用于照明计算。

    Method and apparatus for performing conservative hidden surface removal in a graphics processor with deferred shading
    4.
    发明授权
    Method and apparatus for performing conservative hidden surface removal in a graphics processor with deferred shading 有权
    在具有延迟着色的图形处理器中执行保守的隐藏表面去除的方法和装置

    公开(公告)号:US06476807B1

    公开(公告)日:2002-11-05

    申请号:US09378391

    申请日:1999-08-20

    IPC分类号: G06T1540

    摘要: Structure, apparatus, and method for performing conservative hidden surface removal in a graphics processor. Culling is divided into two steps, a magnitude comparison content addressable memory cull operation (MCCAM Cull), and a subpixel cull operation. The MCCAM Cull discards primitives that are hidden completely by previously processed geometry. The Subpixel Cull takes the remaining primitives (which are partly or entirely visible), and determines the visible fragments. In one embodiment the method of performing hidden surface removal includes: selecting a current primitive comprising a plurality of stamps; comparing stamps to stamps from previously evaluated primitives; selecting a first stamp as a currently potentially visible stamp (CPVS) based on a relationship of depth states of samples in the first stamp with depth states of samples of previously evaluated stamps; comparing the CPVS to a second stamp; discarding the second stamp when no part of the second stamp would affect a final graphics display image based on the stamps that have been evaluated; discarding the CPVS and making the second stamp the CPVS, when the second stamp hides the CPVS; dispatching the CPVS and making the second stamp the CPVS when both the second stamp and the CPVS are at least partially visible in the final graphics display image; and dispatching the second stamp and the CPVS when the visibility of the second stamp and the CPVS depends on parameters evaluated later in the computer graphics pipeline.

    摘要翻译: 用于在图形处理器中执行保守的隐藏表面去除的结构,装置和方法。 剔除分为两个步骤,幅度比较内容可寻址存储器剔除操作(MCCAM Cull)和子像素剔除操作。 MCCAM Cull将丢弃由先前处理过的几何完全隐藏的原语。 子像素Cull获取剩余的基元(部分或全部可见),并确定可见碎片。 在一个实施例中,执行隐藏表面去除的方法包括:选择包括多个邮票的当前图元; 将邮票与先前评估的图案的邮票进行比较; 基于所述第一印记中的样本的深度状态与先前评估的标记的样本的深度状态的关系,选择第一印记作为当前潜在可见印记(CPVS); 将CPVS与第二个邮票进行比较; 当第二印章的任何部分都不会影响基于所评估的邮票的最终图形显示图像时,丢弃第二印记; 丢弃CPVS,并将第二个邮票隐藏CPVS; 在最终图形显示图像中至少部分地可见第二印记和CPVS时,分派CPVS并使第二印记CPVS; 并且当第二印章和CPVS的可视性取决于计算机图形管线中稍后评估的参数时,分派第二印记和CPVS。

    Method and apparatus for separate mark and wait instructions for
processors having multiple memory ports
    6.
    发明授权
    Method and apparatus for separate mark and wait instructions for processors having multiple memory ports 失效
    用于具有多个存储器端口的处理器的单独标记和等待指令的方法和装置

    公开(公告)号:US5381536A

    公开(公告)日:1995-01-10

    申请号:US249084

    申请日:1994-05-25

    摘要: The present invention provides a method and apparatus for handling memory hazards in processors having multiple memory ports wherein the operation of marking of the memory requests that may be related to a memory hazard is separated from the operation of waiting for the memory hazard to clear. The separation of the operation of marking of memory hazards from the operation of waiting for memory hazards to clear allows a compiler to schedule other instructions, as well as other memory operations not directed to the memory location involved in the memory hazard sequence, during the time between the operations of marking and waiting for the memory hazard to clear. The waiting period ends once it is clear that the marked memory requests will execute in the order in which they were issued.

    摘要翻译: 本发明提供一种用于处理具有多个存储器端口的处理器中的存储器危险的方法和装置,其中可能与存储器危险有关的存储器请求的标记操作与等待存储器危险清除的操作分离。 将记忆危害的标记操作与等待记忆危害的操作分开清除允许编译器在时间间隔内调度其他指令以及其他指令,而不是指向存储器危险序列中涉及的存储器位置的其他存储器操作 在标记操作和等待记忆危害之间清除。 等待期结束,一旦清楚的是,标记的内存请求将按照发出的顺序执行。

    Apparatus and method for fragment operations in a 3D-graphics pipeline
    10.
    发明授权
    Apparatus and method for fragment operations in a 3D-graphics pipeline 有权
    3D图形管道中的碎片操作的装置和方法

    公开(公告)号:US06614444B1

    公开(公告)日:2003-09-02

    申请号:US09372137

    申请日:1999-08-20

    IPC分类号: G09G500

    摘要: Apparatus and methods for rendering 3D graphics images. The apparatus include a port for receiving commands from a graphics application, an output for sending a rendered image to a display and a fragment-operations pipeline, coupled to the port and to the output, the pipeline including a stage for performing a fragment operation on a fragment on a per-pixel basis, as well as a stage for performing a fragment operation on the fragment on a per-sample basis. The stage for performing on a per-pixel basis is one of the following: a scissor-test stage, a stipple-test stage, an alpha-test stage or a colorest stage, and the stage for performing on a per-sample basis is one of the following: a Z-test stage, a blending stage or a dithering stage. The apparatus programmatically selects whether to perform a stencil test on a per-pixel or a per-sample basis and performs the stencil test on the selected basis. The apparatus also programmatically selects pixel samples for per-sample operations, where the sample selections differ with different instances of the same per-sample operation. The apparatus also programmatically selects a set of subdivisions of a pixel as samples for use in the per-sample fragment operation, programmatically assigns different weights to at least two samples in the set and performs the per-sample fragments operation on the fragment using the programmatically selected and differently weighted samples.

    摘要翻译: 用于渲染3D图形图像的装置和方法。 该装置包括用于从图形应用程序接收命令的端口,用于将呈现的图像发送到显示器的输出端和耦合到端口和输出端的分段操作流水线,流水线包括用于执行片段操作的级 基于每个像素的片段,以及在每个样本的基础上对片段执行片段操作的阶段。 基于每像素执行的阶段是以下之一:剪刀测试阶段,点测试阶段,α测试阶段或阶段阶段,以及每个采样基础执行的阶段是 以下之一:Z测试阶段,混合阶段或抖动阶段。 该设备以编程方式选择是在每个像素还是每个样本的基础上执行模板测试,并在所选择的基础上执行模板测试。 该设备还以编程方式选择每采样操作的像素采样,其中样本选择与相同每采样操作的不同实例不同。 该装置还以编程方式选择一组像素的细分作为在每个样本片段操作中使用的样本,以编程方式向集合中的至少两个样本分配不同的权重,并使用编程方式对该片段执行每个样本片段的操作 选择和不同加权的样本。