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    Process for manufacturing a contact barrier
    1.
    发明授权
    Process for manufacturing a contact barrier 失效
    制造接触屏障的方法

    公开(公告)号：US06180521B2

    公开(公告)日：2001-01-30

    申请号：US09225598

    申请日：1999-01-06

    Applicant: Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

    Inventor： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

    IPC: H01L2128

    CPC classification number: H01L21/76846 ,  H01L21/28518 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76864

    Abstract: A process for forming a conductive contact having a flat interface. A layer containing niobium and titanium is deposited on a silicon substrate and the resulting structure is annealed in a nitrogen-containing atmosphere at about 500° C. to about 700° C. By this process, a flatter interface between silicide and silicon, which is less likely to cause junction leakage, is formed on annealing. The step of annealing also produces a more uniform bilayer, which is a better barrier against tungsten encroachment during subsequent tungsten deposition. Larger silicide grains are also formed so that fewer grain boundaries are produced, reducing metal diffusion in grain boundaries. The process can be used to form contacts for very small devices and shallow junctions, such as are required for current and future semiconductor devices.

    Abstract translation: 一种用于形成具有平坦界面的导电触头的工艺。 将含有铌和钛的层沉积在硅衬底上，所得结构在约500℃至约700℃的含氮气氛中退火。通过该过程，硅化物和硅之间的平坦界面是 在退火时形成不太可能导致结漏电。 退火步骤还产生更均匀的双层，这是在随后的钨沉积期间防止钨侵蚀的更好的屏障。 还形成更大的硅化物晶粒，使得产生更少的晶界，减少晶界中的金属扩散。 该过程可用于形成非常小的器件和浅结的接触，例如当前和未来的半导体器件所需要的。

    Process for manufacturing a contact barrier
    3.
    发明授权
    Process for manufacturing a contact barrier 失效
    制造接触屏障的方法

    公开(公告)号：US06509265B1

    公开(公告)日：2003-01-21

    申请号：US09666240

    申请日：2000-09-21

    Applicant: Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

    Inventor： Patrick W. DeHaven ,  Anthony G. Domenicucci ,  Lynne M. Gignac ,  Glen L. Miles ,  Prabhat Tiwari ,  Yun-Yu Wang ,  Horatio S. Wildman ,  Kwong Hon Wong

    IPC: H01L214763

    CPC classification number: H01L21/76846 ,  H01L21/28518 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76864

    Abstract: A process for forming a conductive contact having a flat interface. A layer containing niobium and titanium is deposited on a silicon substrate and the resulting structure is annealed in a nitrogen-containing atmosphere at about 500° C. to about 700° C. By this process, a flatter interface between silicide and silicon, which is less likely to cause junction leakage, is formed on annealing. The step of annealing also produces a more uniform bilayer, which is a better barrier against tungsten encroachment during subsequent tungsten deposition. Larger silicide grains are also formed so that fewer grain boundaries are produced, reducing metal diffusion in grain boundaries. The process can be used to form contacts for very small devices and shallow junctions, such as are required for current and future semiconductor devices.

    Abstract translation: 一种用于形成具有平坦界面的导电触头的工艺。 将含有铌和钛的层沉积在硅衬底上，所得结构在约500℃至约700℃的含氮气氛中退火。通过该过程，硅化物和硅之间的平坦界面是 在退火时形成不太可能导致结漏电。 退火步骤还产生更均匀的双层，这是在随后的钨沉积期间防止钨侵蚀的更好的屏障。 还形成更大的硅化物晶粒，使得产生更少的晶界，减少晶界中的金属扩散。 该过程可用于形成非常小的器件和浅结的接触，例如当前和未来的半导体器件所需要的。

    Integrated cobalt silicide process for semiconductor devices
    5.
    发明授权
    Integrated cobalt silicide process for semiconductor devices 有权
    用于半导体器件的集成硅化钴工艺

    公开(公告)号：US06793735B2

    公开(公告)日：2004-09-21

    申请号：US09748965

    申请日：2000-12-27

    Applicant: Marc W. Cantell ,  Jerome B. Lasky ,  Ronald J. Line ,  William J. Murphy ,  Kirk D. Peterson ,  Prabhat Tiwari

    Inventor： Marc W. Cantell ,  Jerome B. Lasky ,  Ronald J. Line ,  William J. Murphy ,  Kirk D. Peterson ,  Prabhat Tiwari

    IPC: C23C1600

    CPC classification number: H01L21/28518 ,  Y10S414/139 ,  Y10S438/906 ,  Y10S438/908

    Abstract: A method and apparatus are provided for forming a silicide on a semiconductor substrate by integrating under a constant vacuum the processes of removing an oxide from a surface of a semiconductor substrate and depositing a metal on the cleaned surface without exposing the cleaned surface to air. The method and apparatus of the present invention eliminates the exposure of the cleaned substrate to air between the oxide removal and metal deposition steps. This in-situ cleaning of the silicon substrate prior to cobalt deposition provides a cleaner silicon substrate surface, resulting in enhanced formation of cobalt silicide when the cobalt layer is annealed.

    Abstract translation: 提供一种方法和装置，用于通过在恒定真空下整合从半导体衬底的表面去除氧化物并在清洁的表面上沉积金属而不将清洁的表面暴露于空气的过程来在半导体衬底上形成硅化物。 本发明的方法和装置消除了在氧化物去除和金属沉积步骤之间清洁的衬底对空气的暴露。 在钴沉积之前对硅衬底的原位清洁提供了更清洁的硅衬底表面，当钴层退火时，导致硅化钴的形成增强。

    Method for depositing cobalt
    7.
    发明授权
    Method for depositing cobalt 失效
    钴沉积方法

    公开(公告)号：US6117771A

    公开(公告)日：2000-09-12

    申请号：US032194

    申请日：1998-02-27

    Applicant: William J. Murphy ,  Prabhat Tiwari

    Inventor： William J. Murphy ,  Prabhat Tiwari

    IPC: C23C14/14 ,  C23C14/16 ,  C23C14/34 ,  C23C14/58 ,  H01L21/285 ,  H01L21/44 ,  B05D5/12 ,  C23C14/00

    CPC classification number: C23C14/345 ,  C23C14/165 ,  H01L21/28518

    Abstract: A method and apparatus are provided for forming cobalt on a silicon substrate containing native silicon oxide on the surface thereof wherein a modified vapor sputtering device is used. The vapor sputtering device is modified by providing an electrical circuit to ground whereby the wafer disposed in the device is electrically connected to the ground circuit. The ground circuit preferably contains a resistor therein to control wafer voltage and current flow from the wafer to ground. It has been found that providing a current flow from the wafer to ground and particularly in a ground circuit containing a resistor, provides an in-situ simultaneous cleaning of native oxide on the silicon surface and deposition of cobalt on cleaned silicon. The deposited cobalt containing substrate may then be readily annealed to form cobalt silicide evenly and uniformly across the desired regions of the wafer surface. A cobalt coated silicon substrate and an annealed cobalt silicide coated silicon substrate made using the method and apparatus of the invention are also provided as well as electronic components made using the cobalt coated silicon substrate.

    Abstract translation: 提供了一种用于在其表面上含有天然氧化硅的硅衬底上形成钴的方法和装置，其中使用改进的蒸气溅射装置。 通过向地面提供电路来修改蒸汽溅射装置，由此设置在装置中的晶片电连接到接地电路。 接地电路优选地包含电阻器以控制晶片电压和从晶片到地的电流。 已经发现，提供从晶片到地面的电流，特别是在包含电阻器的接地电路中的电流提供了在硅表面上的原生氧化物的原位同时清洁以及在清洁的硅上沉积钴。 然后可以将沉积的含钴基材容易地退火以在晶片表面的所需区域上均匀均匀地形成硅化钴。 还提供了使用本发明的方法和装置制造的涂有钴的硅衬底和经退火的硅化钴包覆的硅衬底以及使用涂有钴的硅衬底制成的电子部件。

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