公开(公告)号：US20130189825A1

公开(公告)日：2013-07-25

申请号：US13555356

申请日：2012-07-23

Applicant: Yannick LE TIEC ,  Laurent GRENOUILLET ,  Maud VINET

Inventor： Yannick LE TIEC ,  Laurent GRENOUILLET ,  Maud VINET

IPC: H01L21/76

CPC classification number: H01L21/76 ,  H01L21/31111 ,  H01L21/31155 ,  H01L21/76237 ,  H01L21/76283

Abstract: A method for producing one or plural trenches in a device comprising a substrate of the semiconductor on insulator type formed by a semiconductive support layer, an insulating layer resting on the support layer and a semiconductive layer resting on said insulating layer, the method comprising steps of: a) localised doping of a given portion of said insulating layer through an opening in a masking layer resting on the fine semiconductive layer, b) selective removal of said given doped area at the bottom of said opening.

Abstract translation: 一种在包括由半导体支撑层形成的绝缘体上半导体基板的基板和搁置在所述绝缘层上的绝缘层和置于所述绝缘层上的半导电层的器件中制造一个或多个沟槽的方法，所述方法包括以下步骤： ：a）通过位于精细半导体层上的掩模层中的开口局部掺杂所述绝缘层的给定部分，b）选择性地去除所述开口底部的所述给定掺杂区域。

公开(公告)号：US09070709B2

公开(公告)日：2015-06-30

申请号：US14119395

申请日：2011-06-09

Applicant: Nicolas Posseme ,  Laurent Grenouillet ,  Yannick Le Tiec ,  Nicolas Loubet ,  Maud Vinet

Inventor： Nicolas Posseme ,  Laurent Grenouillet ,  Yannick Le Tiec ,  Nicolas Loubet ,  Maud Vinet

IPC: H01L29/66 ,  H01L21/8234 ,  H01L21/84 ,  H01L21/265

CPC classification number: H01L29/66477 ,  H01L21/2652 ,  H01L21/26586 ,  H01L21/823418 ,  H01L21/84 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66772

Abstract: The substrate successively includes a support substrate, an electrically insulating layer, a semiconductor material layer, and a gate pattern. The semiconductor material layer and gate pattern are covered by a covering layer. A first doping impurity is implanted in the semiconductor material layer through the covering layer so as to place the thickness of maximum concentration of the first doping impurity in the first layer. The covering layer is partly eliminated so as to form lateral spacers leaving source/drain electrodes free.

Abstract translation: 基板依次包括支撑基板，电绝缘层，半导体材料层和栅极图案。 半导体材料层和栅极图案被覆盖层覆盖。 第一掺杂杂质通过覆盖层注入到半导体材料层中，以将第一掺杂杂质的最大浓度的厚度置于第一层中。 覆盖层被部分地消除，以形成离开源极/漏电极的横向间隔物。

公开(公告)号：US08735259B2

公开(公告)日：2014-05-27

申请号：US13555356

申请日：2012-07-23

Applicant: Yannick Le Tiec ,  Laurent Grenouillet ,  Maud Vinet

Inventor： Yannick Le Tiec ,  Laurent Grenouillet ,  Maud Vinet

IPC: H01L21/76

CPC classification number: H01L21/76 ,  H01L21/31111 ,  H01L21/31155 ,  H01L21/76237 ,  H01L21/76283

Abstract: A method for producing one or plural trenches in a device comprising a substrate of the semiconductor on insulator type formed by a semiconductive support layer, an insulating layer resting on the support layer and a semiconductive layer resting on said insulating layer, the method comprising steps of: a) localised doping of a given portion of said insulating layer through an opening in a masking layer resting on the fine semiconductive layer, b) selective removal of said given doped area at the bottom of said opening.

Abstract translation: 一种在包括由半导体支撑层形成的绝缘体上半导体基板的基板和搁置在所述绝缘层上的绝缘层和置于所述绝缘层上的半导电层的器件中制造一个或多个沟槽的方法，所述方法包括以下步骤： ：a）通过位于精细半导体层上的掩模层中的开口局部掺杂所述绝缘层的给定部分，b）选择性地去除所述开口底部的所述给定掺杂区域。

公开(公告)号：US08722499B2

公开(公告)日：2014-05-13

申请号：US13357061

申请日：2012-01-24

Applicant: Maud Vinet ,  Laurent Grenouillet ,  Yannick Le Tiec ,  Nicolas Posseme

Inventor： Maud Vinet ,  Laurent Grenouillet ,  Yannick Le Tiec ,  Nicolas Posseme

IPC: H01L21/336

CPC classification number: H01L29/78603 ,  H01L29/0649 ,  H01L29/66772 ,  H01L29/78648

Abstract: The field effect device is formed on a substrate of semiconductor on insulator type provided with a support substrate separated from a semiconductor film by an electrically insulating layer. The source and drain electrodes are formed in the semiconductor film on each side of the gate electrode. The electrically insulating layer comprises a first area having a first electric capacitance value between the semiconductor film and the support substrate facing the gate electrode. The electrically insulating layer comprises second and third areas having a higher electric capacitance value than the first value between the semiconductor film and the support substrate facing the source and drain electrodes.

Abstract translation: 场效应器件形成在具有通过电绝缘层与半导体膜分离的支撑衬底的绝缘体半导体衬底上。 源极和漏极形成在栅电极的每一侧的半导体膜中。 电绝缘层包括在半导体膜和支撑衬底之间具有面向栅电极的第一电容值的第一区域。 电绝缘层包括具有比半导体膜和支撑衬底面对源电极和漏电极的第一值更高的电容值的第二和第三区域。

公开(公告)号：US20140087524A1

公开(公告)日：2014-03-27

申请号：US14119395

申请日：2011-06-09

Applicant: Nicolas Posseme ,  Laurent Grenouillet ,  Yannick Le Tiec ,  Nicolas Loubet ,  Maud Vinet

Inventor： Nicolas Posseme ,  Laurent Grenouillet ,  Yannick Le Tiec ,  Nicolas Loubet ,  Maud Vinet

IPC: H01L29/66

CPC classification number: H01L29/66477 ,  H01L21/2652 ,  H01L21/26586 ,  H01L21/823418 ,  H01L21/84 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66772

Abstract: The substrate successively includes a support substrate, an electrically insulating layer, a semiconductor material layer, and a gate pattern. The semiconductor material layer and gate pattern are covered by a covering layer. A first doping impurity is implanted in the semiconductor material layer through the covering layer so as to place the thickness of maximum concentration of the first doping impurity in the first layer. The covering layer is partly eliminated so as to form lateral spacers leaving source/drain electrodes free.

Abstract translation: 基板依次包括支撑基板，电绝缘层，半导体材料层和栅极图案。 半导体材料层和栅极图案被覆盖层覆盖。 第一掺杂杂质通过覆盖层注入到半导体材料层中，以将第一掺杂杂质的最大浓度的厚度置于第一层中。 覆盖层被部分地消除，以形成离开源极/漏电极的横向间隔物。

公开(公告)号：US20120256262A1

公开(公告)日：2012-10-11

申请号：US13439356

申请日：2012-04-04

Applicant: Maud VINET ,  Laurent GRENOUILLET ,  Yannick LE TIEC ,  Nicolas POSSEME

Inventor： Maud VINET ,  Laurent GRENOUILLET ,  Yannick LE TIEC ,  Nicolas POSSEME

IPC: H01L29/772 ,  H01L21/768

CPC classification number: H01L29/78648 ,  H01L21/743 ,  H01L21/76283

Abstract: The field effect transistor comprises a substrate successively comprising an electrically conducting support substrate, an electrically insulating layer and a semiconductor material layer. The counter-electrode is formed in a first portion of the support substrate facing the semi-conductor material layer. The insulating pattern surrounds the semi-conductor material layer to delineate a first active area and it penetrates partially into the support layer to delineate the first portion. An electrically conducting contact passes through the insulating pattern from a first lateral surface in contact with the counter-electrode through to a second surface. The contact is electrically connected to the counter-electrode.

Abstract translation: 场效应晶体管包括依次包括导电支撑衬底，电绝缘层和半导体材料层的衬底。 对置电极形成在支撑基板的面向半导体材料层的第一部分中。 绝缘图案围绕半导体材料层以描绘第一有源区域并且其部分地穿透到支撑层中以描绘第一部分。 导电接触通过绝缘图案从与对电极接触的第一侧表面穿过第二表面。 触点电连接到对电极。

公开(公告)号：US08994142B2

公开(公告)日：2015-03-31

申请号：US13439356

申请日：2012-04-04

Applicant: Maud Vinet ,  Laurent Grenouillet ,  Yannick Le Tiec ,  Nicolas Posseme

Inventor： Maud Vinet ,  Laurent Grenouillet ,  Yannick Le Tiec ,  Nicolas Posseme

IPC: H01L21/70 ,  H01L27/12 ,  H01L21/44 ,  H01L29/786 ,  H01L21/74 ,  H01L21/762

CPC classification number: H01L29/78648 ,  H01L21/743 ,  H01L21/76283

Abstract: The field effect transistor comprises a substrate successively comprising an electrically conducting support substrate, an electrically insulating layer and a semiconductor material layer. The counter-electrode is formed in a first portion of the support substrate facing the semi-conductor material layer. The insulating pattern surrounds the semi-conductor material layer to delineate a first active area and it penetrates partially into the support layer to delineate the first portion. An electrically conducting contact passes through the insulating pattern from a first lateral surface in contact with the counter-electrode through to a second surface. The contact is electrically connected to the counter-electrode.

Abstract translation: 场效应晶体管包括依次包括导电支撑衬底，电绝缘层和半导体材料层的衬底。 对置电极形成在支撑基板的面向半导体材料层的第一部分中。 绝缘图案围绕半导体材料层以描绘第一有源区域并且其部分地穿透到支撑层中以描绘第一部分。 导电接触通过绝缘图案从与对电极接触的第一侧表面穿过第二表面。 触点电连接到对电极。

公开(公告)号：US08472493B2

公开(公告)日：2013-06-25

申请号：US12974544

申请日：2010-12-21

Applicant: Tiphaine Dupont ,  Laurent Grenouillet

Inventor： Tiphaine Dupont ,  Laurent Grenouillet

IPC: H01S3/08 ,  H01S5/00

CPC classification number: H01S5/1032 ,  H01S5/021 ,  H01S5/1035 ,  H01S5/1071 ,  H01S5/12 ,  H01S5/3235

Abstract: A method for introducing light into a waveguide formed on the upper surface of a microelectronics substrate, by means of a distributed feedback laser device formed by the association of an SOI-type structure having a portion forming said waveguide, of a stack of III-V semiconductor gain materials partially covering the waveguide, and of an optical grating, wherein the grating step is selected so that the optical power of the laser beam circulates in a loop from the III-V stack to the waveguide.

Abstract translation: 一种通过由具有形成所述波导的部分的SOI型结构形成的分布式反馈激光装置将光引入形成在微电子基板的上表面上的波导的方法， 部分覆盖波导的半导体增益材料和光栅，其中选择光栅步骤，使得激光束的光功率在从III-V叠层到波导的环路中循环。

公开(公告)号：US20120187488A1

公开(公告)日：2012-07-26

申请号：US13352784

申请日：2012-01-18

Applicant: Laurent GRENOUILLET ,  Maud VINET

Inventor： Laurent GRENOUILLET ,  Maud VINET

IPC: H01L29/772 ,  H01L21/336

CPC classification number: H01L29/78603 ,  H01L21/26586 ,  H01L29/66772 ,  H01L29/78648

Abstract: A field effect device comprises a substrate of semiconductor on insulator type successively provided with a support substrate, an electrically insulating layer and a semiconductor material film. First and second source/drain electrodes are formed in the semiconductor material layer. A conduction channel is formed in the semiconductor material layer and separates the first and second source/drain electrodes. A counter-electrode is formed in the support substrate and faces the first and second source/drain electrodes and the conduction channel. The counter-electrode is formed by a doped area of the support substrate having a first doping impurity concentration which decreases from an interface between the electrically insulating layer and the support substrate.

Abstract translation: 场效应器件包括连续设置有支撑衬底的绝缘体半导体衬底，电绝缘层和半导体材料膜。 第一和第二源极/漏极形成在半导体材料层中。 在半导体材料层中形成导电沟道，并分离第一和第二源极/漏极。 在支撑基板上形成对置电极并面对第一和第二源/漏电极和导电沟道。 对电极由支撑衬底的掺杂区域形成，其具有从电绝缘层和支撑衬底之间的界面减小的第一掺杂杂质浓度。

公开(公告)号：US20110150024A1

公开(公告)日：2011-06-23

申请号：US12974544

申请日：2010-12-21

Applicant: Tiphaine Dupont ,  Laurent Grenouillet

Inventor： Tiphaine Dupont ,  Laurent Grenouillet

IPC: H01S5/125

CPC classification number: H01S5/1032 ,  H01S5/021 ,  H01S5/1035 ,  H01S5/1071 ,  H01S5/12 ,  H01S5/3235

Abstract: A method for introducing light into a waveguide formed on the upper surface of a microelectronics substrate, by means of a distributed feedback laser device formed by the association of an SOI-type structure having a portion forming said waveguide, of a stack of III-V semiconductor gain materials partially covering the waveguide, and of an optical grating, wherein the grating step is selected so that the optical power of the laser beam circulates in a loop from the III-V stack to the waveguide.

Abstract translation: 一种通过由具有形成所述波导的部分的SOI型结构形成的分布式反馈激光装置将光引入形成在微电子基板的上表面上的波导的方法， 部分覆盖波导的半导体增益材料和光栅，其中选择光栅步骤，使得激光束的光功率在从III-V叠层到波导的环路中循环。