公开(公告)号：US08666076B2

公开(公告)日：2014-03-04

申请号：US13446430

申请日：2012-04-13

Applicant: Hung-Nan Ye ,  Kuo-Chen Wang ,  Rong-Hong Jan

Inventor： Hung-Nan Ye ,  Kuo-Chen Wang ,  Rong-Hong Jan

IPC: H04L29/06

CPC classification number: H04L9/3066 ,  G06F7/725 ,  H04L2209/80

Abstract: A method of elliptic curve cryptography (ECC) using the enhanced window-based mutual opposite form (EW-MOF) on scalar multiplication. First, an elliptic curve and a base point on the elliptic curve are selected. Next, essential pre-computed points for a selected window size are calculated. Then, a private key is randomly generated and the mutual opposite form (MOF) is used to convert the private key's binary representation into a signed binary representation. Finally, a public key is calculated by using the enhanced window (EW) method. By greatly reducing the number of essential pre-computed points, the EW-MOF reduces average key generation time (including pre-computation time).

Abstract translation: 一种使用增强型窗口相互形式（EW-MOF）对标量乘法进行椭圆曲线密码术（ECC）的方法。 首先，选择椭圆曲线和椭圆曲线上的基点。 接下来，计算所选窗口大小的必要的预先计算的点。 然后，随机生成私钥，并使用相互相反的形式（MOF）将私钥的二进制表示转换为带符号的二进制表示。 最后，通过使用增强窗口（EW）方法计算公钥。 EW-MOF通过大大减少基本预先计算的点数，减少平均密钥生成时间（包括预计算时间）。

公开(公告)号：US20130049110A1

公开(公告)日：2013-02-28

申请号：US13215981

申请日：2011-08-23

Applicant: Kuo Chen Wang ,  Sriraj Manavalan ,  Wei Ming Liao

Inventor： Kuo Chen Wang ,  Sriraj Manavalan ,  Wei Ming Liao

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L27/10876 ,  H01L27/10808 ,  H01L27/10823 ,  H01L29/66666 ,  H01L29/7827

Abstract: A vertical transistor device includes a line of active area adjacent a line of dielectric isolation. A buried data/sense line obliquely angles relative to the line of active area and the line of dielectric isolation. A pair of gate lines is outward of the buried data/sense line and obliquely angle relative to the line of active area and the line of dielectric isolation. A vertical transistor channel region is within the active area between the pair of gate lines. An outer source/drain region is in the active area above the channel region and an inner source/drain region is in the active area below the channel region. The inner source/drain region is electrically coupled to the buried data/sense line. Other devices and structures are contemplated, as are methods of forming a plurality of vertical transistor devices.

公开(公告)号：US20110220980A1

公开(公告)日：2011-09-15

申请号：US12721404

申请日：2010-03-10

Applicant: Kunal Parekh ,  David Hwang ,  Wen Kuei Huang ,  Kuo Chen Wang ,  Ching Kai Lin

Inventor： Kunal Parekh ,  David Hwang ,  Wen Kuei Huang ,  Kuo Chen Wang ,  Ching Kai Lin

IPC: H01L27/108 ,  H01L21/336

CPC classification number: G11C5/06 ,  G11C5/025 ,  G11C11/405 ,  H01L27/1052 ,  H01L27/108 ,  H01L27/10879 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/785

Abstract: A memory array having memory cells and methods of forming the same. The memory array may have a buried digit line formed in a first horizontal planar volume, a word line formed in a second horizontal planar volume above the first horizontal planar volume and storage devices formed on top of the vertical access devices, such as finFETs, in a third horizontal planar volume above the second horizontal planar volume. The memory array may have a 4F2 architecture, wherein each memory cell includes two vertical access devices, each coupled to a single storage device.

Abstract translation: 具有存储单元的存储器阵列及其形成方法。 存储器阵列可以具有形成在第一水平平面体积中的掩埋数字线，形成在第一水平平面体积上方的第二水平平面体积中的字线和形成在垂直存取装置（例如finFET）的顶部上的存储装置， 在第二水平平面体积之上的第三水平平面体积。 存储器阵列可以具有4F2架构，其中每个存储器单元包括两个垂直存取设备，每个垂直存取设备耦合到单个存储设备。

公开(公告)号：US06846618B2

公开(公告)日：2005-01-25

申请号：US10215295

申请日：2002-08-08

Applicant: Yi-Yu Hsu ,  Kuo-Chen Wang ,  Yao-Ting Shao

Inventor： Yi-Yu Hsu ,  Kuo-Chen Wang ,  Yao-Ting Shao

IPC: G03F7/40 ,  G03F7/00 ,  G03F7/20 ,  H01L21/027 ,  H01L21/3065 ,  G03F7/26

CPC classification number: G03F7/70558 ,  G03F7/0035 ,  G03F7/70425 ,  G03F7/70625

Abstract: The present invention uses a double exposure and double etching method to improve critical dimension uniformity. A coating layer is formed on a wafer that includes a first area and a second area. The first area and the second area are separately patterned with different processing conditions. By means of this two-stage patterning, the CD uniformity between wafer center and wafer edge is successfully improved over the conventional single-stage patterning process. The fabrication yield is thus enhanced.

Abstract translation: 本发明使用双重曝光和双重蚀刻方法来改善临界尺寸均匀性。 在包括第一区域和第二区域的晶片上形成涂层。 第一区域和第二区域分别用不同的加工条件图案化。 通过这种两级图案化，晶片中心和晶片边缘之间的CD均匀性比传统的单级图案化工艺成功地得到改进。 从而提高了制造产量。

公开(公告)号：US6076569A

公开(公告)日：2000-06-20

申请号：US193513

申请日：1998-11-17

Applicant: Hung-Lung Ma ,  Hsien-Jung Hsu ,  Kuo-Chen Wang ,  Kuei-Hsi Lai

Inventor： Hung-Lung Ma ,  Hsien-Jung Hsu ,  Kuo-Chen Wang ,  Kuei-Hsi Lai

IPC: B05C11/08 ,  F16K15/14 ,  B65B1/04

CPC classification number: F16K15/147 ,  B05C11/08

Abstract: A cup rinse with a valvular ring according to the invention is disclosed. The valvular ring has a plurality of valves in the center thereof. When an inlet tube is inserted through the valvular ring, the valves are forced to open thereby to allow a chemical liquid to flow into the cup resin via the inlet tube. Inversely when the inlet tube is completely pulled out of the valvular ring, the valves are tightly closed without a chemical liquid leakage. Accordingly, the cup rinse of the invention can prevent peripheral precision instruments, such as a motor, from damage by a leaky chemical liquid. Thus, the cup rinse of the invention cannot cause any unnecessary cost consumption.

Abstract translation: 公开了根据本发明的用阀瓣冲洗的杯子。 瓣环在其中心具有多个阀。 当入口管插入阀瓣环时，阀被迫打开，从而允许化学液体通过入口管流入杯形树脂。 相反，当入口管完全拉出阀瓣环时，阀门被紧密关闭而没有化学液体泄漏。 因此，本发明的杯子冲洗可以防止诸如电动机的周边精密仪器被泄漏的化学液体损坏。 因此，本发明的杯子冲洗不能造成任何不必要的成本消耗。

公开(公告)号：US08523205B2

公开(公告)日：2013-09-03

申请号：US13173095

申请日：2011-06-30

Applicant: Yung-Ta Hsu ,  Kuo-Chen Wang

Inventor： Yung-Ta Hsu ,  Kuo-Chen Wang

IPC: A63C17/01

CPC classification number: A63C17/014 ,  A63C17/0033 ,  A63C17/012 ,  A63C2203/42

Abstract: A swing skateboard includes a board body, a front roller unit and a rear roller unit. The front roller unit has a front roller fork rotatably disposed under a bottom face of the board body, and a front roller rotatably mounted on the front roller fork. The rear roller unit has a rear roller shaft mounted under the bottom face of the board body, and two rear rollers respectively rotatably disposed at two ends of the rear roller shaft. A user can wiggle his/her body to tilt the board body of the skateboard and laterally swing the front roller unit so as to control and move the skateboard forward.

Abstract translation: 摇摆滑板包括板体，前辊单元和后辊单元。 前辊单元具有可旋转地设置在板主体的底面下方的前轮叉和可旋转地安装在前滚子叉上的前滚子。 后辊单元具有安装在板主体的底面下方的后辊轴和分别可旋转地设置在后辊轴的两端的两个后辊。 用户可以摆动他/她的身体来倾斜滑板的板体，并横向摆动前辊单元，以便向前控制和移动滑板。

公开(公告)号：US20130001910A1

公开(公告)日：2013-01-03

申请号：US13173095

申请日：2011-06-30

Applicant: Yung-Ta HSU ,  Kuo-Chen WANG

Inventor： Yung-Ta HSU ,  Kuo-Chen WANG

IPC: B62M1/00

CPC classification number: A63C17/014 ,  A63C17/0033 ,  A63C17/012 ,  A63C2203/42

Abstract: A swing skateboard includes a board body, a front roller unit and a rear roller unit. The front roller unit has a front roller fork rotatably disposed under a bottom face of the board body, and a front roller rotatably mounted on the front roller fork. The rear roller unit has a rear roller shaft mounted under the bottom face of the board body, and two rear rollers respectively rotatably disposed at two ends of the rear roller shaft. A user can wiggle his/her body to tilt the board body of the skateboard and laterally swing the front roller unit so as to control and move the skateboard forward.

Abstract translation: 摇摆滑板包括板体，前辊单元和后辊单元。 前辊单元具有可旋转地设置在板主体的底面下方的前轮叉和可旋转地安装在前滚子叉上的前滚子。 后辊单元具有安装在板主体的底面下方的后辊轴和分别可旋转地设置在后辊轴的两端的两个后辊。 用户可以摆动他/她的身体来倾斜滑板的板体，并横向摆动前辊单元，以便向前控制和移动滑板。

公开(公告)号：US6015096A

公开(公告)日：2000-01-18

申请号：US181100

申请日：1998-10-28

Applicant: Kuo-Feng Huang ,  Kuo-Chen Wang ,  Hsien-Jung Hsu ,  Hung-Lung Ma

Inventor： Kuo-Feng Huang ,  Kuo-Chen Wang ,  Hsien-Jung Hsu ,  Hung-Lung Ma

IPC: F16K37/00 ,  B67D5/08

CPC classification number: F16K37/0016 ,  Y10T137/8175 ,  Y10T137/8309

Abstract: A speed controller with scales according to the invention is used to adjust the amount of an air flow thereby to control the amount of a chemical liquid sprayed. The speed controller includes a housing, a controller body and a transparent tube. The controller body is partly inserted in the housing and has a rotary button located at one end thereof and outside the housing. The rotary button has a slot and an indicator thereon, wherein the indicator is located at one end of the slot. The transparent tube, having a vertical scale on the side thereof and a circular scale on the top circumference thereof, encloses the rotary button. In the invention, the position of the rotary button can be determined by reading the vertical scale and the circular scale so as to precisely control the amount of a chemical liquid sprayed, thereby increasing yield and improving engineering analysis.

Abstract translation: 使用根据本发明的具有鳞片的速度控制器来调节空气流量从而控制喷射的化学液体的量。 速度控制器包括壳体，控制器主体和透明管。 控制器主体部分地插入壳体中，并且具有位于其一端和壳体外部的旋转按钮。 旋转按钮在其上具有狭槽和指示器，其中指示器位于狭槽的一端。 在其一侧具有垂直刻度的透明管和其顶部圆周上的圆形鳞片包围旋转按钮。 在本发明中，可以通过读取垂直刻度和圆形刻度来确定旋转按钮的位置，以精确地控制喷射的化学液体的量，从而提高产量并改进工程分析。

公开(公告)号：US08691680B2

公开(公告)日：2014-04-08

申请号：US13182450

申请日：2011-07-14

Applicant: Kuo-Chen Wang

Inventor： Kuo-Chen Wang

IPC: H01L21/4763

CPC classification number: H01L27/10882 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10891

Abstract: A method for fabricating a memory array includes providing a semiconductor substrate having thereon a plurality of line-shaped active areas and intermittent line-shaped trench isolation regions between the plurality of line-shaped active areas, which extend along a first direction; forming buried word lines extending along a second direction in the semiconductor substrate, the buried word lines intersecting with the line-shaped active areas and the intermittent line-shaped trench isolation regions, wherein the second direction is not perpendicular to the first direction; forming buried digit lines extending along a third direction in the semiconductor substrate, wherein the third direction is substantially perpendicular to the second direction; and forming storage nodes at storage node sites between the buried digit lines.

Abstract translation: 一种用于制造存储器阵列的方法，包括提供其上具有多个线状有源区域的半导体衬底和沿着第一方向延伸的多个线状有源区域之间的间断的线状沟槽隔离区域; 在所述半导体衬底中形成沿第二方向延伸的掩埋字线，所述掩埋字线与所述线状有源区域和所述间歇线状沟槽隔离区域相交，其中所述第二方向不垂直于所述第一方向; 在所述半导体衬底中形成沿着第三方向延伸的掩埋数字线，其中所述第三方向基本上垂直于所述第二方向; 并在掩埋的数字线之间的存储节点处形成存储节点。

公开(公告)号：US20130015551A1

公开(公告)日：2013-01-17

申请号：US13182450

申请日：2011-07-14

Applicant: Kuo-Chen Wang

Inventor： Kuo-Chen Wang

IPC: H01L21/768 ,  H01L27/10

CPC classification number: H01L27/10882 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10891

Abstract: A method for fabricating a memory array includes providing a semiconductor substrate having thereon a plurality of line-shaped active areas and intermittent line-shaped trench isolation regions between the plurality of line-shaped active areas, which extend along a first direction; forming buried word lines extending along a second direction in the semiconductor substrate, the buried word lines intersecting with the line-shaped active areas and the intermittent line-shaped trench isolation regions, wherein the second direction is not perpendicular to the first direction; forming buried digit lines extending along a third direction in the semiconductor substrate, wherein the third direction is substantially perpendicular to the second direction; and forming storage nodes at storage node sites between the buried digit lines.

Abstract translation: 一种用于制造存储器阵列的方法，包括提供其上具有多个线状有源区域的半导体衬底和沿着第一方向延伸的多个线状有源区域之间的间断的线状沟槽隔离区域; 在所述半导体衬底中形成沿第二方向延伸的掩埋字线，所述掩埋字线与所述线状有源区域和所述间歇线状沟槽隔离区域相交，其中所述第二方向不垂直于所述第一方向; 在所述半导体衬底中形成沿着第三方向延伸的掩埋数字线，其中所述第三方向基本上垂直于所述第二方向; 并在掩埋的数字线之间的存储节点处形成存储节点。