公开(公告)号：US20090155969A1

公开(公告)日：2009-06-18

申请号：US11954802

申请日：2007-12-12

Applicant: ASHIMA B. CHAKRAVARTI ,  ZHIJIONG LUO ,  RENEE TONG MO ,  SHREESH NARASIMHA ,  KATSUNORI ONISHI

Inventor： ASHIMA B. CHAKRAVARTI ,  ZHIJIONG LUO ,  RENEE TONG MO ,  SHREESH NARASIMHA ,  KATSUNORI ONISHI

IPC: H01L21/336

CPC classification number: H01L21/823807 ,  H01L21/02233 ,  H01L21/02252 ,  H01L21/31658 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848

Abstract: A method of making a semiconductor device includes forming a transistor structure having one of an embedded epitaxial stressed material in a source and drain region and a stressed channel and well, subjecting the transistor structure to plasma oxidation, and removing spacer material from the transistor structure.

Abstract translation: 制造半导体器件的方法包括形成在源极和漏极区域中具有嵌入式外延应力材料之一的晶体管结构以及应力沟道和阱，使晶体管结构等离子体氧化，并从晶体管结构中去除间隔物材料。

公开(公告)号：US6021018A

公开(公告)日：2000-02-01

申请号：US8174

申请日：1998-01-16

Applicant: Kunio Sawai ,  Hiroshi Hamahata ,  Shigeru Kaneko ,  Katsunori Onishi

Inventor： Kunio Sawai ,  Hiroshi Hamahata ,  Shigeru Kaneko ,  Katsunori Onishi

IPC: G11B15/675 ,  G11B5/008

CPC classification number: G11B15/67547

Abstract: A loading mechanism in a video cassette deck comprising a cassette moving mechanism 100 for moving a cassette receiving portion 200 between an initial location and a running location. The cassette moving mechanism 100 has a slide arm 120 horizontally slidably attached on one of a pair of wall portions 110 provided on both left and right sides of the cassette receiving portion 200, a driving portion for sliding the slide arm 120, a cassette driving gear 130 which is rotatably supported on the wall portion 110 to which the slide arm 120 is attached and which is connected to the cassette receiving portion 200 through a groove portion 112 formed in the wall portion 110, and a door arm 140 for transmitting the motion of the slide arm 120 to a door. The cassette loading mechanism is designed so that the door is opened before the cassette receiving portion 200 is moved when the cassette receiving portion 200 in the running location is moved into the initial location.

Abstract translation: 视频盒式磁带机中的装载机构，包括用于在初始位置和行驶位置之间移动磁带盒接收部分200的磁带盒移动机构100。 盒式移动机构100具有水平可滑动地安装在设置在盒接收部200的左右两侧的一对壁部110中的一个上的滑动臂120，用于滑动滑动臂120的驱动部，盒驱动齿轮 130，其被可旋转地支撑在安装有滑动臂120的壁部110上，并且通过形成在壁部110中的槽部112连接到盒接收部200;以及门臂140， 滑动臂120到门。 磁带盒装载机构设计成使得当行驶位置中的磁带盒接收部分200移动到初始位置时，在盒接收部分200移动之前门被打开。

公开(公告)号：US20110199885A1

公开(公告)日：2011-08-18

申请号：US13025685

申请日：2011-02-11

Applicant: Katsunori ONISHI ,  Kazumasa Nasu ,  Kazutoshi Takemi

Inventor： Katsunori ONISHI ,  Kazumasa Nasu ,  Kazutoshi Takemi

IPC: G11B33/02 ,  G11B7/135

CPC classification number: G11B17/056

Abstract: In this disk unit, a tray has an air intake opening formed to extend from an upstream side in a rotational direction of a disk rotated by a rotating portion toward an optical pickup and to extend inward from outside a receiving region from the upstream side toward a downstream side in the rotational direction for incorporating air into the side a receiving surface of the tray from the side of the back surface thereof.

Abstract translation: 在该盘单元中，托盘具有进气口，该进气口形成为从沿旋转部朝向光学拾取器旋转的盘的旋转方向的上游侧延伸并从接收区域的外侧向上方延伸到 在旋转方向的下游侧，用于将空气从其背面的侧面引入托盘的接收表面的侧面。

公开(公告)号：US07767579B2

公开(公告)日：2010-08-03

申请号：US11954802

申请日：2007-12-12

Applicant: Ashima B Chakravarti ,  Zhijiong Luo ,  Renee Tong Mo ,  Shreesh Narasimha ,  Katsunori Onishi

Inventor： Ashima B Chakravarti ,  Zhijiong Luo ,  Renee Tong Mo ,  Shreesh Narasimha ,  Katsunori Onishi

IPC: H01L21/44 ,  H01L21/31 ,  H01L21/469

CPC classification number: H01L21/823807 ,  H01L21/02233 ,  H01L21/02252 ,  H01L21/31658 ,  H01L21/823814 ,  H01L21/823864 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848

Abstract: A method of making a semiconductor device includes forming a transistor structure having one of an embedded epitaxial stressed material in a source and drain region and a stressed channel and well, subjecting the transistor structure to plasma oxidation, and removing spacer material from the transistor structure.

Abstract translation: 制造半导体器件的方法包括形成在源极和漏极区域中具有嵌入式外延应力材料之一的晶体管结构以及受应力的沟道和阱，对晶体管结构进行等离子体氧化，以及从晶体管结构去除间隔物材料。

公开(公告)号：US20080191243A1

公开(公告)日：2008-08-14

申请号：US11672599

申请日：2007-02-08

Applicant: Yaocheng Liu ,  Shreesh Narasimha ,  Katsunori Onishi ,  Kern Rim

Inventor： Yaocheng Liu ,  Shreesh Narasimha ,  Katsunori Onishi ,  Kern Rim

IPC: H01L27/092 ,  H01L29/778 ,  H01L21/8238 ,  H01L21/336

CPC classification number: H01L27/1203 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/28247 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/84 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66636 ,  H01L29/7843 ,  H01L29/7848

Abstract: Disclosed are embodiments of an n-FET structure with silicon carbon S/D regions completely contained inside amorphization regions and with a carbon-free gate electrode. Containing carbon within the amorphization regions, ensures that all of the carbon is substitutional following re-crystallization to maximize the tensile stress imparted on channel region. The gate stack is capped during carbon implantation so the risk of carbon entering the gate stack and degrading the conductivity of the gate polysilicon and/or damaging the gate oxide is essentially eliminated. Thus, the carbon implant regions can be formed deeper. Deeper S/D carbon implants which are completely amorphized and then re-crystallized provide greater tensile stress on the n-FET channel region to further optimize electron mobility. Additionally, the gate electrode is uncapped during the n-type dopant process, so the n-type dopant dose in the gate electrode can be at least great as the dose in the S/D regions.

Abstract translation: 公开了具有完全包含在非晶化区域内和具有无碳栅电极的硅碳S / D区域的n-FET结构的实施方案。 在非晶化区域内含有碳，确保在再结晶后所有碳都是取代的，以最大限度地增加通道区域上施加的拉伸应力。 在碳注入期间，栅极堆叠被封盖，从而基本上消除了碳进入栅极堆叠并降低栅极多晶硅的导电性和/或损坏栅极氧化物的风险。 因此，可以更深地形成碳注入区域。 完全非晶化然后再结晶的深S / D碳植入物在n-FET沟道区域上提供更大的拉伸应力，以进一步优化电子迁移率。 此外，在n型掺杂剂处理期间，栅电极未被封装，因此栅电极中的n型掺杂剂剂量可以至少大于S / D区域中的剂量。

公开(公告)号：US06057979A

公开(公告)日：2000-05-02

申请号：US964254

申请日：1997-11-04

Applicant: Kunio Sawai ,  Hiroshi Hamahata ,  Shigeru Kaneko ,  Katsunori Onishi

Inventor： Kunio Sawai ,  Hiroshi Hamahata ,  Shigeru Kaneko ,  Katsunori Onishi

IPC: G11B15/675 ,  G11B15/00

CPC classification number: G11B15/67547

Abstract: A magnetic tape apparatus having a bearer formed so as to be reciprocatable in the front-rear direction between a cassette insertion position and a cassette mount position on a chassis for inserting a tape cassette, and a rotating cam provided on the chassis for driving the bearer through an interlocking mechanism with a clutch. In the magnetic tape apparatus, the clutch is turned off to release the interlocking mechanism between the bearer and the rotating cam when the bearer is advanced from the cassette mount position to the cassette insertion position, while the clutch is turned on to establish the interlock between the bearer and the rotating cam when the bearer is retreated from the cassette insertion position to the cassette mount position.

Abstract translation: 一种磁带装置，其具有形成为能够在前后方向上在盒插入位置和用于插入带盒的底盘上的盒安装位置之间往复运动的承载件，以及设置在底盘上用于驱动承载件的旋转凸轮 通过与离合器的联锁机构。 在磁带装置中，当承载体从盒安装位置前进到盒插入位置时，离合器被关闭以释放承载件和旋转凸轮之间的互锁机构，同时离合器打开以建立互锁 当承载件从盒插入位置退回到盒安装位置时，承载件和旋转凸轮。

公开(公告)号：US07932144B2

公开(公告)日：2011-04-26

申请号：US12685027

申请日：2010-01-11

Applicant: Yaocheng Liu ,  Shreesh Narasimha ,  Katsunori Onishi ,  Kern Rim

Inventor： Yaocheng Liu ,  Shreesh Narasimha ,  Katsunori Onishi ,  Kern Rim

IPC: H01L21/8234

CPC classification number: H01L27/1203 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/28247 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/84 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66636 ,  H01L29/7843 ,  H01L29/7848

Abstract: Disclosed are embodiments of an n-FET structure with silicon carbon S/D regions completely contained inside amorphization regions and with a carbon-free gate electrode. Containing carbon within the amorphization regions, ensures that all of the carbon is substitutional following re-crystallization to maximize the tensile stress imparted on channel region. The gate stack is capped during carbon implantation so the risk of carbon entering the gate stack and degrading the conductivity of the gate polysilicon and/or damaging the gate oxide is essentially eliminated. Thus, the carbon implant regions can be formed deeper. Deeper S/D carbon implants which are completely amorphized and then re-crystallized provide greater tensile stress on the n-FET channel region to further optimize electron mobility. Additionally, the gate electrode is uncapped during the n-type dopant process, so the n-type dopant dose in the gate electrode can be at least great as the dose in the S/D regions.

Abstract translation: 公开了具有完全包含在非晶化区域内和具有无碳栅电极的硅碳S / D区域的n-FET结构的实施方案。 在非晶化区域内含有碳，确保在再结晶后所有碳都是取代的，以最大限度地增加通道区域上施加的拉伸应力。 在碳注入期间，栅极堆叠被封盖，从而基本上消除了碳进入栅极堆叠并降低栅极多晶硅的导电性和/或损坏栅极氧化物的风险。 因此，可以更深地形成碳注入区域。 完全非晶化然后再结晶的深S / D碳植入物在n-FET沟道区域上提供更大的拉伸应力，以进一步优化电子迁移率。 此外，在n型掺杂剂处理期间，栅电极未被封装，因此栅电极中的n型掺杂剂剂量可以至少大于S / D区域中的剂量。

公开(公告)号：US07610590B2

公开(公告)日：2009-10-27

申请号：US11593507

申请日：2006-11-07

Applicant: Kazumasa Nasu ,  Katsunori Onishi ,  Takayuki Murakami ,  Katsuo Ichinohe ,  Yasuhiro Nishina ,  Shinya Yamaguchi ,  Nobuyuki Okazaki ,  Ryuuji Hayashi

Inventor： Kazumasa Nasu ,  Katsunori Onishi ,  Takayuki Murakami ,  Katsuo Ichinohe ,  Yasuhiro Nishina ,  Shinya Yamaguchi ,  Nobuyuki Okazaki ,  Ryuuji Hayashi

IPC: G11B17/03

CPC classification number: G11B17/056

Abstract: There are provided a disc tray, a traverse unit, and a main chassis unit. The main chassis unit has a main chassis, which has, as observed when the traverse unit is in a stand-by position, a latch portion that engages with a projection portion of a sub rack and a stopper member that restricts the movement of the cam slider. The stopper member has a rotary shaft in the shape of a circular column, a lever portion which the projection portion makes contact, and a lock portion that makes contact with the cam slider and thereby restricts the sliding movement of the cam slider.

Abstract translation: 提供了光盘托盘，横动单元和主机箱单元。 主底盘单元具有主底盘，当横移单元处于待机位置时，其具有与副齿条的突出部分接合的闩锁部分和限制凸轮的移动的止动构件 滑块 止动构件具有圆柱形的旋转轴，突出部接触的杆部和与凸轮滑块接触的锁定部，从而限制凸轮滑块的滑动。

公开(公告)号：US20050118764A1

公开(公告)日：2005-06-02

申请号：US10724483

申请日：2003-11-28

Applicant: Anthony Chou ,  Michael Chudzik ,  Toshiharu Furukawa ,  Oleg Gluschenkov ,  Paul Kirsch ,  Byoung Lee ,  Katsunori Onishi ,  Heemyoung Park ,  Kristen Scheer ,  Akihisa Sekiguchi

Inventor： Anthony Chou ,  Michael Chudzik ,  Toshiharu Furukawa ,  Oleg Gluschenkov ,  Paul Kirsch ,  Byoung Lee ,  Katsunori Onishi ,  Heemyoung Park ,  Kristen Scheer ,  Akihisa Sekiguchi

IPC: H01L21/8234 ,  H01L21/8238 ,  H01L21/00 ,  H01L21/3205 ,  H01L21/336 ,  H01L21/84

CPC classification number: H01L21/823462 ,  H01L21/823857

Abstract: Gate oxides having different thicknesses are formed on a semiconductor substrate by forming a first gate oxide on the top surface of the substrate, forming a sacrificial hard mask over a selected area of the first gate oxide; and then forming a second gate oxide. A first poly layer may be formed on the first gate oxide, under the hard mask. After the hard mask is removed, a second poly layer may be formed over the second gate oxide and over the first poly layer. This enables the use of high-k dielectric materials, and the first gate oxide can be thinner than the second gate oxide.

Abstract translation: 通过在衬底的顶表面上形成第一栅极氧化物，在半导体衬底上形成具有不同厚度的栅极氧化物，在第一栅极氧化物的选定区域上形成牺牲性硬掩模; 然后形成第二栅极氧化物。 可以在硬掩模下的第一栅极氧化物上形成第一多晶硅层。 在去除硬掩模之后，可以在第二栅极氧化物之上和第一多晶硅层上形成第二多晶硅层。 这使得能够使用高k电介质材料，并且第一栅极氧化物可以比第二栅极氧化物薄。

公开(公告)号：US07781239B2

公开(公告)日：2010-08-24

申请号：US11972125

申请日：2008-01-10

Applicant: Ishtiaq Ahsan ,  Andrew Alexander McKnight ,  Katsunori Onishi ,  Keith Howard Tabakman

Inventor： Ishtiaq Ahsan ,  Andrew Alexander McKnight ,  Katsunori Onishi ,  Keith Howard Tabakman

IPC: G01R31/26

CPC classification number: G01R31/2884

Abstract: A semiconductor defect type determination method and structure. The method includes providing a semiconductor wafer comprising a first field effect transistor (FET) comprising a first type of structure and a second FET comprising a second different type of structure. A first procedure is performed to determine if a first current flow exists between a first conductive layer formed on the first FET and a second conductive layer formed on the first FET. A second procedure is performed to determine if a second current flow exists between a third conductive layer formed the second FET and a fourth conductive layer formed on the second FET. A determination is made from combining results of the first procedure and results of the second procedure that the first FET and the second FET each comprise a specified type of defect.

Abstract translation: 半导体缺陷型确定方法和结构。 该方法包括提供半导体晶片，其包括包含第一类型结构的第一场效应晶体管（FET）和包括第二不同类型结构的第二FET。 执行第一过程以确定在第一FET上形成的第一导电层和形成在第一FET上的第二导电层之间是否存在第一电流。 执行第二过程以确定在形成第二FET的第三导电层和形成在第二FET上的第四导电层之间是否存在第二电流。 通过组合第一过程的结果和第二过程的结果确定第一FET和第二FET各自包含指定类型的缺陷。