Machine and process for continuous, sequential, deposition of semiconductor solar absorbers having variable semiconductor composition deposited in multiple sublayers
    2.
    发明授权
    Machine and process for continuous, sequential, deposition of semiconductor solar absorbers having variable semiconductor composition deposited in multiple sublayers 有权
    具有沉积在多个子层中的具有可变半导体组成的半导体太阳能吸收体的连续,顺序,沉积的机器和工艺

    公开(公告)号:US08648253B1

    公开(公告)日:2014-02-11

    申请号:US12899446

    申请日:2010-10-06

    摘要: A method of manufacture of I-III-VI-absorber photovoltaic cells involves sequential deposition of films comprising one or more of silver and copper, with one or more of aluminum indium and gallium, and one or more of sulfur, selenium, and tellurium, as compounds in multiple thin sublayers to form a composite absorber layer. In an embodiment, the method is adapted to roll-to-roll processing of photovoltaic cells. In an embodiment, the method is adapted to preparation of a CIGS absorber layer having graded composition through the layer of substitutions such as tellurium near the base contact and silver near the heterojunction partner layer, or through gradations in indium and gallium content. In a particular embodiment, the graded composition is enriched in gallium at a base of the layer, and silver at the top of the layer. In an embodiment, each sublayer is deposited by co-evaporation of copper, indium, gallium, and selenium, which react in-situ to form CIGS.

    摘要翻译: 制备I-III-VI吸收剂光伏电池的方法包括将包含银和铜中的一种或多种的膜与铝铟和镓中的一种或多种以及硫,硒和碲中的一种或多种顺序沉积, 作为多个薄亚层中的化合物以形成复合吸收层。 在一个实施例中,该方法适用于光伏电池的卷对卷处理。 在一个实施方案中,该方法适用于制备具有渐变组成的CIGS吸收层,该组合物通过诸如位于基底接触面附近的碲和在异质结伙伴层附近的银,或者通过铟和镓含量的分级来进行。 在一个具体的实施方案中,分级组合物在层的底部富集镓,并且在层的顶部富集银。 在一个实施方案中,每个子层通过铜,铟,镓和硒的共蒸发沉积,铜,铟,镓和硒原位反应形成CIGS。

    Apparatus and method for hybrid photovoltaic device having multiple, stacked, heterogeneous, semiconductor junctions

    公开(公告)号:US08426725B2

    公开(公告)日:2013-04-23

    申请号:US12967005

    申请日:2010-12-13

    IPC分类号: H01L31/00

    摘要: A photovoltaic (PV) device has at least one lower PV cell on a substrate, the cell having a metallic back contact, and a I-III-VI absorber, and a transparent conductor layer. An upper PV cell is adhered to the lower PV cell, electrically in series to form a stack. The upper PV cell has III-V absorber and junction layers, the cells are adhered by transparent conductive adhesive having filler of conductive nanostructures or low temperature solder. The upper PV cell has no substrate. An embodiment has at least one shape of patterned conductor making contact to both a top of the upper and a back contact of the lower cells to couple them together in series. In an embodiment, a shape of patterned conductor draws current from excess area of the lower cell to the upper cell, in an alternative embodiment shapes of patterned conductor couples I-III-VI cells not underlying upper cells in series strings, a string being in parallel with at least one stack. In an embodiment, the bonding agent is a polymeric adhesive containing conductive nanostructures. In an embodiment the III-V absorber is grown on single crystal, substrate. A method for forming the device is described.

    Apparatus and Method for Hybrid Photovoltaic Device Having Multiple, Stacked, Heterogeneous, Semiconductor Junctions
    4.
    发明申请
    Apparatus and Method for Hybrid Photovoltaic Device Having Multiple, Stacked, Heterogeneous, Semiconductor Junctions 有权
    具有多个,堆叠,非均匀的半导体结的混合光伏器件的装置和方法

    公开(公告)号:US20120145231A1

    公开(公告)日:2012-06-14

    申请号:US12967005

    申请日:2010-12-13

    IPC分类号: H01L31/06 H01L31/0352

    摘要: A photovoltaic (PV) device has at least one lower PV cell on a substrate, the cell having a metallic back contact, and a absorber, and a transparent conductor layer. An upper PV cell is adhered to the lower PV cell, electrically in series to form a stack. The upper PV cell has III-V absorber and junction layers, the cells are adhered by transparent conductive adhesive having filler of conductive nanostructures or low temperature solder. The upper PV cell has no substrate. An embodiment has at least one shape of patterned conductor making contact to both a top of the upper and a back contact of the lower cells to couple them together in series. In an embodiment, a shape of patterned conductor draws current from excess area of the lower cell to the upper cell, in an alternative embodiment shapes of patterned conductor couples I-III-VI cells not underlying upper cells in series strings, a string being in parallel with at least one stack. In an embodiment, the bonding agent is a polymeric adhesive containing conductive nanostructures. In an embodiment the III-V absorber is grown on single crystal, substrate. A method for forming the device is described.

    摘要翻译: 光伏(PV)器件在衬底上具有至少一个下部PV电池,该电池具有金属背接触,以及吸收体和透明导体层。 上部PV电池被电连接到下部PV电池,以形成堆叠。 上PV电池具有III-V吸收层和接合层,电池通过具有导电纳米结构或低温焊料填料的透明导电粘合剂粘合。 上部PV电池没有基板。 一个实施例具有图案化导体的至少一种形状,其与下电池的上部和下部接触的顶部接触,以将它们串联在一起。 在一个实施例中,图案化导体的形状从下电池的多余区域吸取电流到上电池,在替代实施例中,图案化导体的形状将I-III-VI电池不连接在串联串中的上电池下方, 与至少一个堆叠平行。 在一个实施方案中,粘合剂是含有导电纳米结构的聚合物粘合剂。 在一个实施方案中,III-V吸收剂在单晶衬底上生长。 描述了用于形成装置的方法。

    Low cost protective coating and method for a die-on-board electronic
assembly
    5.
    发明授权
    Low cost protective coating and method for a die-on-board electronic assembly 失效
    低成本保护涂层和板上电子组件的方法

    公开(公告)号:US5959247A

    公开(公告)日:1999-09-28

    申请号:US898565

    申请日:1997-07-22

    摘要: An electronic circuit assembly includes a printed circuit board having a plurality of conductors formed thereon. An integrated circuit die is mounted directly on and bonded to the circuit board. A plurality of microleads extend between the integrated circuit die and conductors and are ultrasonically bonded to the die and conductors. A protective coating deposited on the circuit board encapsulates the circuit die and microleads. Methods for depositing the coating include flow and cure, immersion and plasma spray techniques.

    摘要翻译: 电子电路组件包括其上形成有多个导体的印刷电路板。 集成电路管芯直接安装在电路板上并结合到电路板上。 多个微针在集成电路管芯和导体之间延伸,并被超声波接合到管芯和导体。 沉积在电路板上的保护涂层封装了电路管芯和微孔。 沉积涂层的方法包括流动和固化,浸渍和等离子喷涂技术。

    Shape memory alloy fastener
    8.
    发明授权
    Shape memory alloy fastener 失效
    形状记忆合金紧固件

    公开(公告)号:US5120175A

    公开(公告)日:1992-06-09

    申请号:US730222

    申请日:1991-07-15

    IPC分类号: F16B1/00 F16B19/06 F27D1/14

    摘要: A fastener having an elongated shank formed of a shape memory alloy, a head at the upper end of the shank, and an annular segment at the lower end of said shank having a deformed cross-sectional shape suitable for insertion into an opening extending through adjacent workpieces. The annular segment has a frusto-conical trained shape that is larger than this opening. The annular segment radially flares from the deformed shape to an approximation of the trained shape when heated above a critical transformation temperature, thereby securing the fastener in place with respect to the workpieces. Alternatively, a sleeve made of a different material (e.g. aluminum) extending over a portion or the entire length of the fastener can be added for improved deformational characteristics, by providing the same frusto-conical shape through axial contraction of the shank.

    摘要翻译: 一种紧固件,其具有由形状记忆合金形成的细长柄,在柄的上端处的头部,以及在所述柄的下端处的环形部分,其具有变形的横截面形状,其适于插入延伸穿过相邻 工件。 环形段具有大于该开口的截头圆锥形训练形状。 当加热到临界转变温度以上时,环形部分从变形的形状径向展开为训练形状的近似,从而将紧固件固定在相对于工件的适当位置。 或者,通过在柄的轴向收缩中提供相同的截头圆锥形状,可以添加由在紧固件的一部分或整个长度上延伸的不同材料(例如铝)的套筒以提高变形特性。