摘要:
Disclosed is a liquid crystal panel driving circuit of display stabilization, including: a plurality of output buffers buffering data voltage and supplying or cutting off the buffered data voltage to or from each of the plurality of data lines; an output MUX switch receiving outputs from two adjacent output buffers of the plurality of output buffers and transferring one of the two outputs to the plurality of data lines; a garbage switch connecting each of the plurality of data lines to a ground terminal; and a power on sensor or a power off sensor generating a power on or off reset signal in response to a turn on/off of a power supply voltage, wherein the output MUX switch is turned-off and the charge share switch and the garbage switch are turned-on, in response to the power on reset signal or the power off reset signal.
摘要:
Disclosed is a source driver integrated circuit with an improved slew rate by disposing a switching unit, which operates as a resistance component during display driving, before the feedback line of an output buffer. According to the source driver integrated circuit with an improved slew rate, a switching unit, which operates as a resistance component when a signal is transferred, is disposed in the feedback loop of an output buffer, so that the resistance component is not shown to a panel load, thereby improving the slew rate of an output signal. In addition, the improved slew rate makes it possible to easily implement an image through a display.
摘要:
A gamma voltage generator includes an RGB common gamma voltage generation section configured to generate RGB common gamma voltages using corresponding gamma reference voltages among a plurality of gamma reference voltages; and at least two of an RG gamma voltage generation section configured to generate RG gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages, an R gamma voltage generation section configured to generate R gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages, a G gamma voltage generation section configured to generate G gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages, and a B gamma voltage generation section configured to generate B gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages.
摘要:
A display panel driving circuit includes: N number of buffers (N is an integer no less than 1) configured to buffer data voltages and enable or disable supply of buffered signals in response to a charge sharing control signal; and N number of output multiplexers each configured to receive outputs of two adjacent buffers among outputs of the N number of buffers and transfer the output of one buffer or the outputs of the two buffers to a corresponding one of data lines in response to the charge sharing control signal.
摘要:
A pad layout structure of a driver IC chip to be mounted to a liquid crystal display panel. The pad layout structure includes power pad sections placed at respective four corners of the driver IC chip and each having a first power pad for supplying first power to the driver IC chip, a second power pad for supplying second power to the driver IC chip, a third power pad for supplying third power to the driver IC chip and a fourth power pad for supplying fourth power to the driver IC chip.
摘要:
An touch screen liquid crystal display device includes a panel driving circuit including a gate driving block, a data driving block, and a signal control block and a liquid crystal module that stores data in data pixels through a data pixel line, to which the data pixels are connected, in response to a data signal applied from the data driving block, and reads data through a read pixel line to which read pixels are connected. The read pixels are connected to the data pixels through a share line.
摘要:
Provided are a method of arranging gamma buffers capable of decreasing a Kelvin of a source driver included in a flat panel display and minimizing a temperature deviation between source drivers, and the flat panel display applying the method. The method of arranging a plurality of gamma buffers which are arranged in one or more source drivers to output corresponding gamma voltages, includes a step of calculating power consumptions of the gamma buffers, wherein the method further comprises one or more steps of: changing tab points of the gamma buffers by using the calculated power consumptions of the gamma buffers; and changing positions of the gamma buffers by using the calculated power consumptions of the gamma buffers.
摘要:
A semiconductor memory device according to the present invention includes a write pulse width timing compensating part that controls a write pulse width timing. The semiconductor memory controls the point of disabling a write control drive signal by directly producing a write enable signal or delaying the write enable signal based on a level of a power supply voltage to compensate the write pulse width timing. The write pulse width timing compensating part receives the poser supply level and the write enable signal and outputs a compensated write control drive signal. A generating part receives the write control drive signal from the write pulse width timing compensating part, a selection signal, and a decoder signal and generates a control signal. A data input part writes input data to a selected cell upon application of data and the control signal from the generating part.
摘要:
Disclosed are a driving circuit of a display apparatus and a driving chip, which shuts off the output of image data, in a display apparatus in which a plurality of driving chips is connected to each other in a daisy chain method to correspond to a single display panel, when serial communication of the driving chips is not completed successfully, or when any one of the driving chips is not operated normally, thereby preventing an abnormal screen from being displayed.
摘要:
An LCD driving circuit includes a first buffer configured to have a terminal for a first voltage, a terminal for a second voltage and a terminal for an intermediate voltage between the first voltage and the second voltage, and be driven in a range from the first voltage to the intermediate voltage; and a second buffer configured to have a terminal for the first voltage, a terminal for the second voltage and a terminal for the intermediate voltage, and be driven in a range from the intermediate voltage to the second voltage. The terminal for the intermediate voltage of the first buffer and the terminal for the intermediate voltage of the second buffer are connected with each other, and the first voltage is a highest voltage, the second voltage is a lowest voltage, and the intermediate voltage is in a range from the first voltage to the second voltage.