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37 条记录 (耗时 0.028 秒)

    Compact model for device/circuit/chip leakage current (IDDQ) calculation including process induced uplift factors
    1.
    发明授权
    Compact model for device/circuit/chip leakage current (IDDQ) calculation including process induced uplift factors 失效
    紧凑型器件/电路/芯片泄漏电流（IDDQ）计算，包括工艺引起的隆起因素

    公开(公告)号：US08626480B2

    公开(公告)日：2014-01-07

    申请号：US12574440

    申请日：2009-10-06

    申请人： Paul Chang ,  Jie Deng ,  Terrence B. Hook ,  Sim Y. Loo ,  Anda C. Mocuta ,  Jae-Eun Park ,  Kern Rim ,  Xiaojun Yu

    发明人： Paul Chang ,  Jie Deng ,  Terrence B. Hook ,  Sim Y. Loo ,  Anda C. Mocuta ,  Jae-Eun Park ,  Kern Rim ,  Xiaojun Yu

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5081 ,  G01R31/2848 ,  G01R31/3008 ,  G06F17/5009 ,  G06F17/5022 ,  G06F17/5036

    摘要： A system, method and computer program product for implementing a quiescent current leakage specific model into semiconductor device design and circuit design flows. The leakage model covers all device geometries with wide temperature and voltage ranges and, without the need for stacking factor calculations nor spread sheet based IDDQ calculations. The leakage model for IDDQ calculation incorporates further parasitic and proximity effects. The leakage model implements leakage calculations at different levels of testing, e.g., from a single device to a full chip design, and are integrated within one single model. The leakage model implements leakage calculations at different levels of testing with the leverage of a single switch setting. The implementation is via a hardware definition language code or object oriented code that can be compiled and operated using a netlist of interest, e.g., for conducting a performance analysis.

    摘要翻译： 一种用于将静态电流泄漏特定模型实现为半导体器件设计和电路设计流程的系统，方法和计算机程序产品。 泄漏模型涵盖宽温度和电压范围的所有器件几何，并且不需要堆叠因子计算，也不需要基于平板的IDDQ计算。 IDDQ计算的泄漏模型包含进一步的寄生和邻近效应。 泄漏模型在不同的测试水平下实施泄漏计算，例如从单个设备到全芯片设计，并且集成在一个单一的模型中。 泄漏模型通过单个开关设置的杠杆来实现不同测试级别的泄漏计算。 该实现是通过硬件定义语言代码或面向对象的代码，其可以使用感兴趣的网表来编译和操作，例如用于进行性能分析。

    Radio frequency testing apparatus
    2.
    发明授权
    Radio frequency testing apparatus 有权
    射频检测仪

    公开(公告)号：US08513963B2

    公开(公告)日：2013-08-20

    申请号：US13188474

    申请日：2011-07-22

    申请人： He-Ping Chen ,  Jun-Jie Deng

    发明人： He-Ping Chen ,  Jun-Jie Deng

    IPC分类号： G01R31/00

    CPC分类号： H04B17/16

    摘要： A radio frequency (RF) testing apparatus, for testing device under test (DUT) comprising a receiving antenna, includes a pair of transmitting antennas transmitting wireless communication signals to the receiving antenna, a shielding box, a first filter and a second filter. The shielding box includes a transmitting box, a receiving box for receiving the DUT, a connecting box connecting between the transmitting box and the receiving box and a pair of transmitting antennas fixed on the transmitting box and suspending towards the connecting box. The connecting box includes a microwave absorption medium on the connecting box and communicates with the receiving box. The first filter is mounted on the connecting box and the transmitting box to electrically connect with the transmitting antenna. The second filter is mounted on the receiving box to electrically connect with the DUT.

    摘要翻译： 一种用于包括接收天线的被测设备（DUT）的射频（RF）测试装置，包括向接收天线发射无线通信信号的一对发射天线，屏蔽盒，第一滤波器和第二滤波器。 屏蔽箱包括发送箱，用于接收DUT的接收箱，连接在发送箱和接收盒之间的连接盒和固定在发送箱上并朝向连接盒悬挂的一对发送天线。 连接箱包括在接线盒上的微波吸收介质，并与接收盒通信。 第一个滤波器安装在连接盒和发射箱上，以与发射天线电连接。 第二个过滤器安装在接收盒上以与DUT电连接。

    Process For the Preparation of Polynuclear Ferric Hydroxide-Saccaride Complexes
    5.
    发明申请
    Process For the Preparation of Polynuclear Ferric Hydroxide-Saccaride Complexes 有权
    多核氢氧化铁 - Saccaride配合物的制备方法

    公开(公告)号：US20080176941A1

    公开(公告)日：2008-07-24

    申请号：US11911449

    申请日：2006-04-12

    申请人： Jinmai Xiao ,  Jie Deng ,  Jinhua Feng ,  Bo Xiao

    发明人： Jinmai Xiao ,  Jie Deng ,  Jinhua Feng ,  Bo Xiao

    IPC分类号： A61K31/295

    CPC分类号： C07H23/00

    摘要： The invention discloses a process for preparing a polynuclear ferric hydroxide-saccharide complex, including: adding an aqueous solution of an alkaline substance drop-wise into an aqueous solution of iron salt at a temperature of 5-20° C. until pH 6-8, collecting the polynuclear ferric hydroxide from the reaction mixture by a conventional method; reacting the polynuclear ferric hydroxide with a saccharide in a solution of an alkaline substance for 10-40 hours at 106-125° C. under pH 10-12, resulting in a crude product having an isoelectric point of 4.4-5.3 and a weight average molecular weight of 20,000-100,000 Daltons, and then harvesting the polynuclear ferric hydroxide-saccharide complex from the crude product. The process can precisely control the molecular weight of the polynuclear ferric hydroxide-saccharide complex without an effect on the other characteristics of the product, for example its saccharide content or isoelectric point etc. Furthermore, it is very simple and readily applicable in industry.

    摘要翻译： 本发明公开了一种制备多核铁氢氧化物 - 糖复合物的方法，其包括：将碱性物质的水溶液滴加到铁盐水溶液中，温度为5-20℃直至pH6-8 ，通过常规方法从反应混合物中收集多核铁氢氧化物; 使多核铁氢氧化物与糖类在碱性物质的溶液中在106-125℃下在pH 10-12下反应10-40小时，得到等电点为4.4-5.3的粗产物，重均分子量 分子量为20,000-100,000道尔顿，然后从粗产物中收获多核铁氢氧化物 - 糖复合物。 该方法可以精确地控制多核铁氢氧化物 - 糖复合物的分子量，而不影响产品的其他特性，例如其糖含量或等电点等。此外，它非常简单且易于应用于工业中。

    Frame switch with serial data processing
    7.
    发明授权
    Frame switch with serial data processing 失效
    具有串行数据处理的帧切换

    公开(公告)号：US6005863A

    公开(公告)日：1999-12-21

    申请号：US846708

    申请日：1997-04-30

    申请人： Jay Jie Deng ,  Lian S. Xie ,  Jun Yu

    发明人： Jay Jie Deng ,  Lian S. Xie ,  Jun Yu

    IPC分类号： H04L12/56

    CPC分类号： H04L49/351 ,  H04L49/101 ,  H04L49/254

    摘要： A data frame switching apparatus has number data ports and a port traffic management unit for each port. Each port traffic management unit includes a physical layer unit for receiving and transmitting data frames, a serial shift register for temporarily storing a portion of each received data frame in serial data format, and a port controller for extracting each data frame's source and destination address from the portion of the data frame stored in the serial shift register. A crossbar switch connects any specified one of the data ports that is receiving a data frame to another one of the data ports so as to transmit the received data frame to a corresponding destination. A global traffic manager and lookup engine map the destination address of each received data frame to a corresponding destination port, determine the availability of the destination port, and when the destination port if available, send setup signals to the switch so as to connect the data port on which the data frame is being received to the destination port.

    摘要翻译： 数据帧切换装置具有数字数据端口和每个端口的端口流量管理单元。 每个端口流量管理单元包括用于接收和发送数据帧的物理层单元，用于以串行数据格式临时存储每个接收到的数据帧的一部分的串行移位寄存器，以及用于从每个数据帧的源和目的地址提取每个数据帧的源和目的地址的端口控制器 数据帧的部分存储在串行移位寄存器中。 交叉开关将正在接收数据帧的任何指定的一个数据端口连接到另一个数据端口，以将接收到的数据帧发送到相应的目的地。 全局流量管理器和查找引擎将每个接收到的数据帧的目标地址映射到相应的目标端口，确定目标端口的可用性，以及当目标端口（如果可用）时）向交换机发送设置信号以连接数据 将数据帧接收到目标端口的端口。

    Non-servo clock and data recovery circuit and method
    8.
    发明授权
    Non-servo clock and data recovery circuit and method 失效
    非伺服时钟和数据恢复电路及方法

    公开(公告)号：US5864250A

    公开(公告)日：1999-01-26

    申请号：US814930

    申请日：1997-03-12

    申请人： Jay Jie Deng

    发明人： Jay Jie Deng

    IPC分类号： H04L7/027 ,  H04L7/02

    CPC分类号： H04L7/027

    摘要： A clock and data recovery circuit has an input port for receiving a data signal representing a sequence of data values, a pulse generator, a clock generator and a data storage element. The pulse generator generates a pulse whenever a data value change is detected in the received data signal. The clock generator generates a clock signal having an associated frequency and phase. The clock generator receives each pulse produced by the pulse generator so as to synchronize the clock signal's phase with data value changes on the input port. The data storage element stores data values in the data signal at times dictated by the generated clock signal. The data values stored by the data storage element is the recovered data signal and the generated clock signal is the recovered clock signal. The pulse generator and clock signal generator interoperate so as to bound jitter in the recovered clock signal caused by any jitter in the received data signal so that the data values in the received data signal are stored during a data capture time window whose phase position is automatically compensated for the any jitter in the received data signal.

    摘要翻译： 时钟和数据恢复电路具有用于接收表示数据值序列的数据信号的输入端口，脉冲发生器，时钟发生器和数据存储元件。 每当在接收的数据信号中检测到数据值变化时，脉冲发生器产生脉冲。 时钟发生器产生具有相关频率和相位的时钟信号。 时钟发生器接收由脉冲发生器产生的每个脉冲，以使时钟信号的相位与输入端口上的数据值变化同步。 数据存储单元将数据信号在由生成的时钟信号指定的时间内存储。 由数据存储元件存储的数据值是恢复的数据信号，并且生成的时钟信号是恢复的时钟信号。 脉冲发生器和时钟信号发生器互操作，以便在收到的数据信号中由任何抖动引起的恢复时钟信号中产生抖动，从而在相位位置自动的数据捕获时间窗口期间存储接收数据信号中的数据值 补偿接收到的数据信号中的任何抖动。