Harness for euphonium musical instrument

    公开(公告)号:USD1044923S1

    公开(公告)日:2024-10-01

    申请号:US29821501

    申请日:2021-12-30

    Abstract: FIG. 1 is a top, plan view of a harness for euphonium musical instrument showing our new design;
    FIG. 2 is a bottom plan view thereof;
    FIG. 3 is a left side elevational view thereof;
    FIG. 4 is an end elevational view thereof;
    FIG. 5 is a front, perspective view of a harness for euphonium musical instrument, the design being shown in use;
    FIG. 6 is a rear perspective view thereof;
    FIG. 7 is a right side perspective view thereof; and,
    FIG. 8 is a left side perspective view thereof.
    In FIGS. 1-3 of the drawings, the wavy break lines are for ease of illustration only.
    In FIGS. 5-8 of the drawings, the broken lines representing a human form and a musical instrument illustrate the design in use and form no part of the claim.

    SOI radio frequency switch with enhanced electrical isolation
    5.
    发明授权
    SOI radio frequency switch with enhanced electrical isolation 有权
    SOI射频开关具有增强的电气隔离

    公开(公告)号:US08866226B2

    公开(公告)日:2014-10-21

    申请号:US13345871

    申请日:2012-01-09

    CPC classification number: H01L21/84 H01L21/76264 H01L27/1203

    Abstract: At least one conductive via structure is formed from an interconnect-level metal line through a middle-of-line (MOL) dielectric layer, a shallow trench isolation structure in a top semiconductor layer, and a buried insulator layer to a bottom semiconductor layer. The shallow trench isolation structure laterally abuts at least two field effect transistors that function as a radio frequency (RF) switch. The at least one conductive via structure and the at interconnect-level metal line may provide a low resistance electrical path from the induced charge layer in a bottom semiconductor layer to electrical ground, discharging the electrical charge in the induced charge layer. The discharge of the charge in the induced charge layer thus reduces capacitive coupling between the semiconductor devices and the bottom semiconductor layer, and thus secondary coupling between components electrically disconnected by the RF switch is reduced.

    Abstract translation: 至少一个导电通孔结构由通过中间线(MOL)电介质层的互连级金属线,顶部半导体层中的浅沟槽隔离结构和到半导体层的掩埋绝缘体层形成。 浅沟槽隔离结构横向邻接用作射频(RF)开关的至少两个场效应晶体管。 所述至少一个导电通孔结构和所述互连级金属线可以提供从底部半导体层中的感应电荷层到电接地的低电阻电路径,从而对感应电荷层中的电荷进行放电。 感应电荷层中的电荷的放电因此减小了半导体器件与底部半导体层之间的电容耦合,因此降低了由RF开关电断开的部件之间的二次耦合。

    High resistivity silicon-on-insulator substrate and method of forming
    6.
    发明授权
    High resistivity silicon-on-insulator substrate and method of forming 有权
    高电阻率硅绝缘体基板及其成型方法

    公开(公告)号:US08741739B2

    公开(公告)日:2014-06-03

    申请号:US13342697

    申请日:2012-01-03

    CPC classification number: H01L29/16 H01L21/76254

    Abstract: A semiconductor structure and a method of forming the same. In one embodiment, a method of forming a silicon-on-insulator (SOI) wafer substrate includes: providing a handle substrate; forming a high resistivity material layer over the handle substrate, the high resistivity material layer including one of an amorphous silicon carbide (SiC), a polycrystalline SiC, an amorphous diamond, or a polycrystalline diamond; forming an insulator layer over the high resistivity material layer; and bonding a donor wafer to a top surface of the insulator layer to form the SOI wafer substrate.

    Abstract translation: 半导体结构及其形成方法。 在一个实施例中,形成绝缘体上硅(SOI)晶片衬底的方法包括:提供处理衬底; 在所述手柄衬底上形成高电阻率材料层,所述高电阻率材料层包括非晶碳化硅(SiC),多晶SiC,无定形金刚石或多晶金刚石中的一种; 在所述高电阻率材料层上形成绝缘体层; 并将施主晶片接合到绝缘体层的顶表面以形成SOI晶片衬底。

    Heterojunction bipolar transistors and methods of manufacture
    7.
    发明授权
    Heterojunction bipolar transistors and methods of manufacture 有权
    异质结双极晶体管及其制造方法

    公开(公告)号:US08692288B2

    公开(公告)日:2014-04-08

    申请号:US13529625

    申请日:2012-06-21

    CPC classification number: H01L29/7378

    Abstract: Semiconductor structures and methods of manufacture semiconductors are provided which relate to heterojunction bipolar transistors. The structure includes two devices connected by metal wires on a same wiring level. The metal wire of a first of the two devices is formed by selectively forming a metal cap layer on copper wiring structures.

    Abstract translation: 提供半导体结构和制造半导体的方法涉及异质结双极晶体管。 该结构包括通过金属线在同一布线层上连接的两个器件。 两个器件中的第一个的金属线通过在铜布线结构上选择性地形成金属覆盖层而形成。

    Catadioptric imaging system for broad band microscopy
    8.
    发明授权
    Catadioptric imaging system for broad band microscopy 有权
    反射折射成像系统用于宽带显微镜

    公开(公告)号:US08675276B2

    公开(公告)日:2014-03-18

    申请号:US10646073

    申请日:2003-08-22

    Abstract: A system and method for inspection is disclosed. The design includes an objective employed for use with light energy having a wavelength in various ranges, including approximately 266 to 1000 nm, 157 nm through infrared, and other ranges. The objective includes a focusing lens group having at least one focusing lens configured to receive light, a field lens oriented to receive focused light energy from said focusing lens group and provide intermediate light energy, and a Mangin mirror arrangement positioned to receive the intermediate light energy from the field lens and form controlled light energy. Each focusing lens has a reduced diameter, such as a diameter of less than approximately 100 mm, and a maximum corrected field size of approximately 0.15 mm. An immersion substance, such as oil, water, or silicone gel, may be employed prior to passing controlled light energy to the specimen inspected.

    Abstract translation: 公开了一种用于检查的系统和方法。 该设计包括用于具有波长在各种范围内的光能的目标,包括大约266至1000nm,157nm至红外线等范围。 该目的包括:聚焦透镜组,其具有被配置为接收光的至少一个聚焦透镜;定向成从所述聚焦透镜组接收聚焦光能并提供中间光能的场透镜;以及定位成接收中间光能 从现场镜头和形成受控的光能。 每个聚焦透镜具有减小的直径,例如小于约100mm的直径,以及大约0.15mm的最大校正场尺寸。 在将受控的光能通过检验的样品之前,可以使用浸入物质,例如油,水或硅胶。

    Heterojunction bipolar transistors and methods of manufacture
    9.
    发明授权
    Heterojunction bipolar transistors and methods of manufacture 有权
    异质结双极晶体管及其制造方法

    公开(公告)号:US08633106B2

    公开(公告)日:2014-01-21

    申请号:US13438508

    申请日:2012-04-03

    CPC classification number: H01L29/7378

    Abstract: Semiconductor structures and methods of manufacture semiconductors are provided which relate to heterojunction bipolar transistors. The method includes forming two devices connected by metal wires on a same wiring level. The metal wire of a first of the two devices is formed by selectively forming a metal cap layer on copper wiring structures.

    Abstract translation: 提供半导体结构和制造半导体的方法涉及异质结双极晶体管。 该方法包括在相同布线层上形成由金属线连接的两个器件。 两个器件中的第一个的金属线通过在铜布线结构上选择性地形成金属覆盖层而形成。

    THERMAL RELEASE MECHANISM FOR DOWNHOLE TOOLS
    10.
    发明申请
    THERMAL RELEASE MECHANISM FOR DOWNHOLE TOOLS 有权
    用于井下工具的热释放机构

    公开(公告)号:US20130312982A1

    公开(公告)日:2013-11-28

    申请号:US13481099

    申请日:2012-05-25

    CPC classification number: E21B23/00

    Abstract: A release mechanism for use in setting a downhole tool comprises two connectors releasably connected to one other. One of the connectors includes a material having a coefficient of thermal expansion that is different from a material included in the second connector. The difference in the coefficients of thermal expansion causes one of the connectors to expand greater than the other connector when heat is applied to one or both of the connectors. As a result of the greater expansion of one of the connectors, the connectors release from each other. Upon release, an actuator within the downhole tool is permitted to move and cause actuation or setting of the downhole tool.

    Abstract translation: 用于设置井下工具的释放机构包括可释放地彼此连接的两个连接件。 一个连接器包括具有与第二连接器中包括的材料不同的热膨胀系数的材料。 当对一个或两个连接器施加热量时,热膨胀系数的差异导致连接器中的一个膨胀比另一个连接器大。 由于连接器之一的更大的膨胀,连接器彼此脱离。 在释放时,井下工具内的致动器被允许移动并引起井下工具的致动或设定。

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