公开(公告)号：US20150365942A1

公开(公告)日：2015-12-17

申请号：US14763209

申请日：2013-12-26

Applicant: INTEL IP CORPORATION ,  Intel IP Corporation

Inventor： HUANING NIU ,  DEBDEEP CHATTERJEE ,  GANG XIONG ,  QINGHUA LI ,  HUJUN YIN

IPC: H04W72/04 ,  H04W74/00 ,  H04W74/08 ,  H04W76/02 ,  H04W74/04

CPC classification number: H04W8/005 ,  H04L12/4633 ,  H04L27/2614 ,  H04L45/30 ,  H04L47/11 ,  H04L47/12 ,  H04L61/2514 ,  H04L61/2525 ,  H04L61/2539 ,  H04L61/2564 ,  H04L61/2575 ,  H04L61/2592 ,  H04L61/6077 ,  H04W4/70 ,  H04W4/80 ,  H04W24/02 ,  H04W24/06 ,  H04W28/02 ,  H04W28/0289 ,  H04W28/08 ,  H04W28/12 ,  H04W36/0088 ,  H04W36/30 ,  H04W40/02 ,  H04W40/244 ,  H04W48/08 ,  H04W48/14 ,  H04W48/16 ,  H04W48/18 ,  H04W52/0216 ,  H04W52/028 ,  H04W72/005 ,  H04W72/02 ,  H04W72/0413 ,  H04W72/042 ,  H04W72/0446 ,  H04W74/002 ,  H04W74/02 ,  H04W74/04 ,  H04W74/08 ,  H04W76/14 ,  H04W76/23 ,  H04W76/27 ,  H04W76/28 ,  H04W84/12 ,  H04W88/06 ,  Y02D70/00 ,  Y02D70/1222 ,  Y02D70/1224 ,  Y02D70/1226 ,  Y02D70/1242 ,  Y02D70/1262 ,  Y02D70/1264 ,  Y02D70/142 ,  Y02D70/144 ,  Y02D70/146 ,  Y02D70/21 ,  Y02D70/22 ,  Y02D70/23

Abstract: In one embodiment, the present disclosure provides an evolved Node B (eNB) that includes a device-to-device (D2D) module configured to allocate at least one D2D discovery region including at least one periodic discovery zone, the at least one periodic discovery zone including a first plurality of resource blocks in frequency and a second plurality of subframes in time, the D2D module further configured to configure a User Equipment (UE) to utilize the at least one D2D discovery region for transmitting a discovery packet.

Abstract translation: 在一个实施例中，本公开提供了演进节点B（eNB），其包括被配置为分配至少一个D2D发现区域的设备到设备（D2D）模块，该D2D发现区域包括至少一个周期性发现区域，所述至少一个周期性发现 所述D2D模块还被配置为配置用户设备（UE）以利用所述至少一个D2D发现区域来发送发现分组，所述区域包括频率上的第一多个资源块和第二多个子帧。

公开(公告)号：US11812361B2

公开(公告)日：2023-11-07

申请号：US17195376

申请日：2021-03-08

Applicant: Intel Corporation ,  Intel IP Corporation

Inventor： Ido Ouzieli ,  Emily Qi ,  Stanislav Gens ,  Robert Stacey ,  Izoslav Tchigevsky

IPC: H04W4/00 ,  H04W40/24 ,  H04L9/40 ,  H04W12/106 ,  H04W12/108 ,  H04W12/122 ,  H04W84/12

CPC classification number: H04W40/244 ,  H04L63/1466 ,  H04W12/106 ,  H04W12/108 ,  H04W12/122 ,  H04W84/12

Abstract: This disclosure describes systems, methods, and devices related to using protected beacon frames in wireless communications. A device may determine a beacon management element of a beacon frame body and may determine an integrity group key identifier of the beacon management element, wherein the integrity group key identifier is associated with a basic service set (BSS). The device may determine, based on the integrity group key identifier, a management integrity check (MIC) field of the beacon management element. The device may generate a beacon frame including the beacon frame body. The device may send the beacon frame.

公开(公告)号：US11757994B2

公开(公告)日：2023-09-12

申请号：US15714480

申请日：2017-09-25

Applicant: Intel IP Corporation

Inventor： Leonardo Gomes Baltar ,  Dario Sabella ,  Ingolf Karls ,  Honglei Miao ,  Kilian Roth ,  Markus Dominik Mueck

IPC: H04L67/12 ,  H04L43/08 ,  H04L67/303 ,  H04W4/40 ,  H04L67/567

CPC classification number: H04L67/12 ,  H04L43/08 ,  H04L67/303 ,  H04W4/40 ,  H04L67/567

Abstract: Various techniques for collective perception messaging are disclosed herein. In an example, a machine receives, from a source device, a signal value for provision to a sink device, the signal value corresponding to a measurement of an environmental value. The machine accesses, from a storage device, an error term for the signal value. The machine accesses, from the storage device, a source reliability term for the source device. The machine accesses, from the storage device, a source-sink relation term based on the source device and the sink device. The machine determines a distribution for the environmental value based on the error term, the source reliability term, and the source-sink relation term. The machine determines, based on the distribution for the environmental value, whether the signal value is reliable.

公开(公告)号：US20230276325A1

公开(公告)日：2023-08-31

申请号：US16977000

申请日：2017-08-11

Applicant: INTEL IP CORPORATION

Inventor： Wenting Chang ,  Shirish Nagaraj ,  Bishwarup Mondal ,  Yuan Zhu ,  Yushu Zhang

IPC: H04W36/08 ,  H04W72/23 ,  H04W36/00

CPC classification number: H04W36/085 ,  H04W72/23 ,  H04W36/0064

Abstract: The first circuitry may be operable to establish a first UE Receive (Rx) beam as being for reception of data from a first eNB. The second circuitry may be operable to process a transmission including Downlink Control Information (DCI), wherein the DCI carries an eNB cell-switching indicator. The first circuitry may also be operable to establish a second UE Rx beam as being for reception of data from a second eNB based on the eNB cell-switching indicator.

公开(公告)号：US11664328B2

公开(公告)日：2023-05-30

申请号：US17488067

申请日：2021-09-28

Applicant: Intel IP Corporation

Inventor： Rizwan Fazil

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/10

CPC classification number: H01L23/552 ,  H01L23/10 ,  H01L23/562 ,  H01L2924/3025 ,  H01L2924/3511

Abstract: An integrated circuit package shield comprising a frame comprising two or more segments, the segments to interlock with one another along a substrate and the segments comprising electrically conductive material to electrically couple to the substrate; and a lid to cover the frame, the lid comprising a conductive material to electrically couple to the substrate.

公开(公告)号：US11490331B2

公开(公告)日：2022-11-01

申请号：US16995504

申请日：2020-08-17

Applicant: Intel IP Corporation

Inventor： Laurent Cariou ,  Yaron Alpert ,  Oren Kaidar ,  Leor Rom

IPC: H04W52/02

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to facilitate target wake time management between access points and devices. An example station based apparatus to facilitate target wake time operations between an access point and the station includes a data manager to determine at least one of a quantity of uplink data to be sent by the station or a quantity of downlink data to be received by the station, a connection manager to schedule a connection of the station to a device different than the access point, and a target wake time negotiator in communication with a component interface to at least one of receive a signal from or distribute a signal to the access point, the signal to modify a service period of the target wake time based on at least one of the quantity of uplink data, the quantity of downlink data, or the scheduled connection.

公开(公告)号：US11437971B2

公开(公告)日：2022-09-06

申请号：US16976084

申请日：2018-06-27

Applicant: Intel IP Corporation

Inventor： Chuanzhao Yu ,  Maximilian Eschbaumer

IPC: H03H7/38 ,  H03F1/56 ,  H03F3/195 ,  H03F3/24 ,  H03H7/09 ,  H03H7/01

Abstract: Embodiments relate to a transformer-based impedance matching network that may dynamically change its characteristic impedance by engaging different inductor branches on a primary side and optionally, on the secondary side. A primary side transformer circuit includes a primary inductor (311) and secondary inductor (321) configured to provide impedance matching over a first frequency band. One or more additional inductor branches (314A, 314B, are switchably coupled to either or both of the primary and secondary inductors to modify the impedance matching characteristics over additional operating frequencies. One or more LC filter branches (321, 322, 326, 327, 336, 330) can be included at the output of the secondary side to filter harmonic frequencies in each of the operating frequency bands.

公开(公告)号：US11356999B2

公开(公告)日：2022-06-07

申请号：US17041493

申请日：2018-06-30

Applicant: Intel IP Corporation

Inventor： Xiaojun Ma ,  Zhibin Yu

IPC: H04W72/04 ,  H04W24/10 ,  H04W72/14 ,  H04L5/00

Abstract: Provided herein are a method and an apparatus for blind detection of Physical Downlink Control Channel (PDCCH) and Physical Downlink Shared Channel (PDSCH) using UE-specific reference signals. In an embodiment, the disclosure provides an apparatus for a UE, comprising circuitry configured to: measure a UE-specific Demodulation Reference Signal (DMRS) associated with a PDCCH; compute a first measurement metric M1 based on the UE-specific DMRS associated with the PDCCH before decoding the PDCCH; decode the PDCCH based on the first measurement metric M1; and decode PDSCH based on the decoded PDCCH. The disclosure may further, based on the corresponding PDCCH DMRS and/or PDSCH DMRS, determine if a PDSCH grant in a decoded PDCCH is valid or not, detect a repeated PDSCH grant in a slot, and detect cross-slot DMRS phase continuity between continuous slots.

公开(公告)号：US11323162B2

公开(公告)日：2022-05-03

申请号：US16525618

申请日：2019-07-30

Applicant: Intel IP Corporation

Inventor： Denis Gudovskiy ,  Karthik Rajagopalan ,  Rizwan Ghaffar ,  Chuxiang Li

IPC: H04B7/0456 ,  H04L5/00 ,  H04L25/02 ,  H04L25/03 ,  H04W24/02 ,  H04B7/0413 ,  H04L27/26

Abstract: What is disclosed is a method for wireless communication comprising receiving a wireless communication via a receiver of the mobile communication device, deriving a demodulation reference signal from a first plurality of symbols of the wireless communication; creating a channel estimation matrix using the demodulation reference signal; inverting the channel estimation matrix to obtain a channel pseudo-inverse matrix; deriving a tracking reference signal from a second plurality of symbols of the wireless communication; calculating a phase shift for one or more additional symbols based on the tracking reference signal; determining a corrected channel pseudo-inverse matrix for the one or more additional symbols by adjusting the channel pseudo-inverse matrix according to the calculated phase shift; and controlling the receiver to accomplish data detection using the corrected channel pseudo-inverse matrix on one or more orthogonal frequency division multiplexing subcarriers.

公开(公告)号：US11290065B2

公开(公告)日：2022-03-29

申请号：US16650882

申请日：2017-12-29

Applicant: Intel IP Corporation

Inventor： Ali Azam ,  Ashoke Ravi ,  Bassam Khamaisi ,  Ofir Degani

IPC: H03F1/02 ,  H03F3/00 ,  H03F3/19 ,  H03F3/217 ,  H03M1/08

Abstract: A switched capacitor digital power amplifier (DPA) or a digital-to-analog converter (DAC) is disclosed. The DPA/DAC includes a plurality of switched capacitor cells connected in parallel. Each switched capacitor cell includes a capacitor and a switch. The switch selectively drives the capacitor in response to an input digital codeword. The switched capacitor cells are divided into sub-arrays and a series capacitor is inserted in series between two adjacent sub-arrays of switched capacitor cells. All the sub-arrays of switched capacitor cells may be in a unary-coded structure. Alternatively, at least one of the sub-arrays may be in a C-2C structure and at least one another sub-array may be in a unary-coded structure. The switch in the switched capacitor cells is driven by a local oscillator signal, and a phase correction buffer may be added for adjusting a delay of the local oscillator signal supplied to sub-arrays of switched capacitor cells.