Semiconductor device layout method and layout program
    1.
    发明授权
    Semiconductor device layout method and layout program 失效
    半导体器件布局方法和布局方案

    公开(公告)号:US07665053B2

    公开(公告)日:2010-02-16

    申请号:US11892533

    申请日:2007-08-23

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5068 G06F2217/62

    摘要: It is an aspect of the embodiments discussed herein to provide a semiconductor device layout method and a semiconductor device layout program that enable the minimum necessary decoupling capacitances to be placed efficiently according to a circuit configuration, placement positions, operation timings, and clock tree of functional circuits.

    摘要翻译: 本文讨论的实施例的一个方面是提供半导体器件布局方法和半导体器件布局程序,其使得能够根据功能的电路配置,放置位置,操作时序和时钟树来有效地放置最小必需的去耦电容 电路。

    FLEXIBLE POLYURETHANE FOAM FOR TIRES, NOISE REDUCING DEVICE AND TIRE
    2.
    发明申请
    FLEXIBLE POLYURETHANE FOAM FOR TIRES, NOISE REDUCING DEVICE AND TIRE 审中-公开
    用于轮胎的柔性聚氨酯泡沫,减少噪音的装置和轮胎

    公开(公告)号:US20090053492A1

    公开(公告)日:2009-02-26

    申请号:US12093183

    申请日:2006-11-17

    IPC分类号: E04B1/74

    CPC分类号: B60C19/002 Y10T428/24992

    摘要: The present invention is to provide a flexible polyurethane foam for tires that can effectively suppress damages, such as chips and cracks, and deformation, such as compression (permanent set in fatigue), even when attached to an inner face of a tire by using a band member.A flexible polyurethane foam for tires 5 which is attached to a gap between a tire and a wheel rim, wherein a density is in the range from 7 to 40 kg/m3 and a tear strength (N/cm) per unit density (kg/m3) is 0.30 or more, a noise reducing device with the flexible polyurethane foam for tires 5 fixed to a ring-shaped band member, and a tire 10 with the noise reducing device attached thereto.

    摘要翻译: 本发明提供一种用于轮胎的柔性聚氨酯泡沫体,其能够有效地抑制诸如碎片和裂纹的损伤,以及例如压缩(永久性设定在疲劳中)的变形,即使通过使用 乐队成员。 一种用于轮胎5的柔性聚氨酯泡沫,其附着在轮胎和轮辋之间的间隙,其中密度在7至40kg / m 3范围内,每单位密度的撕裂强度(N / cm)(kg / m3)为0.30以上,具有用于轮胎5的柔性聚氨酯泡沫固定到环形带构件的降噪装置,以及安装有降噪装置的轮胎10。

    Pharmaceutical preparation
    5.
    发明申请
    Pharmaceutical preparation 有权
    药物制剂

    公开(公告)号:US20090061007A1

    公开(公告)日:2009-03-05

    申请号:US11812459

    申请日:2007-06-19

    IPC分类号: A61K9/14 A61K31/7088

    摘要: A pharmaceutical preparation comprises nano-level particles (nanospheres) of a biocompatible polymer having, as held on their surfaces, an NFκB decoy capable of binding to NFκB to inhibit its activity. With penetration of the nanoparticles inside cells, the NFκB decoy may be delivered to an affected site and the NFκB decoy may be released from the surfaces of the nanoparticles and may be thereby efficiently and specifically introduced into the affected site.

    摘要翻译: 药物制剂包含生物相容性聚合物的纳米级颗粒(纳米球),其具有在其表面上保持能够结合NFkappaB以抑制其活性的NFkappaB诱饵。 通过纳米颗粒在细胞内的渗透,NFkappaB诱饵可以被递送到受影响的部位,并且可以从纳米颗粒的表面释放NFkappaB诱饵,并且因此可以有效且特异地引入受影响的部位。

    Packet transfer apparatus which generates access reject command during a DMA transfer
    6.
    发明授权
    Packet transfer apparatus which generates access reject command during a DMA transfer 有权
    在DMA传输期间产生访问拒绝命令的分组传送装置

    公开(公告)号:US06700887B1

    公开(公告)日:2004-03-02

    申请号:US09496185

    申请日:2000-02-02

    IPC分类号: H04L1256

    摘要: A packet transfer apparatus for transferring data packets between devices connected to a bus includes a receiving circuit connected to the bus for receiving a packet from the bus and a transmit circuit, also connected to the bus, for forming and placing a transmit packet on the bus. A header identification circuit, connected to the receiving circuit, detects a packet header of the received packet and determines if the packet header indicates a DMA transfer operation. A first buffer is provided for storing the packet data when the packet header indicates a DMA transfer and a second buffer is provided for storing the packet data when the packet header does not indicate a DMA transfer. A memory is connected to the first buffer and stores the packet data it receives from the first buffer. The memory also transfers stored data to the first buffer. A DMA controller is provided to control a DMA operation between the memory and the first buffer. A processor handles non-DMA operations and is free to perform such operations while a DMA operation is being performed. That is, when a DMA operation is being carried out by the memory and the first buffer, the processor is able to respond to a request from an external device using the transmit circuit.

    摘要翻译: 用于在连接到总线的设备之间传送数据分组的分组传送装置包括连接到总线的接收电路,用于从总线接收分组,以及连接到总线的发送电路,用于在总线上形成和放置发送分组 。 连接到接收电路的报头识别电路检测接收到的分组的分组报头,并确定分组报头是否指示DMA传送操作。 提供第一缓冲器,用于当分组报头指示DMA传输时存储分组数据,并且当分组头部未指示DMA传送时提供用于存储分组数据的第二缓冲器。 存储器连接到第一缓冲器并且存储从第一缓冲器接收到的分组数据。 存储器还将存储的数据传送到第一缓冲器。 提供DMA控制器来控制存储器和第一缓冲器之间的DMA操作。 一个处理器处理非DMA操作,并且在执行DMA操作时可以自由执行这些操作。 也就是说,当由存储器和第一缓冲器执行DMA操作时,处理器能够使用发送电路来响应来自外部设备的请求。

    Semiconductor device layout method and layout program
    8.
    发明申请
    Semiconductor device layout method and layout program 失效
    半导体器件布局方法和布局方案

    公开(公告)号:US20080052657A1

    公开(公告)日:2008-02-28

    申请号:US11892533

    申请日:2007-08-23

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5068 G06F2217/62

    摘要: It is an aspect of the embodiments discussed herein to provide a semiconductor device layout method and a semiconductor device layout program that enable the minimum necessary decoupling capacitances to be placed efficiently according to a circuit configuration, placement positions, operation timings, and clock tree of functional circuits.

    摘要翻译: 本文讨论的实施例的一个方面是提供半导体器件布局方法和半导体器件布局程序,其使得能够根据功能的电路配置,放置位置,操作时序和时钟树来有效地放置最小必需的去耦电容 电路。

    Interface device and interface device control method
    10.
    发明申请
    Interface device and interface device control method 有权
    接口设备和接口设备控制方法

    公开(公告)号:US20050117511A1

    公开(公告)日:2005-06-02

    申请号:US10725587

    申请日:2003-12-03

    摘要: An interface device and interface device control method that switches a transmission rate to enable high-speed transmission when necessary. In devices (nodes) provided with an interface device, a transmission rate control circuit decreases the frequency of a clock signal to only enable low-speed transmission operations during low-speed transmission and when a transfer operation is not being performed. A node requiring switching to a high-speed transmission rate negotiates with each node included in a route to a transfer destination and reads the device information stored in the register to confirm whether or not each node has a transmission capacity applicable for high-speed transmission. Then, when the transmission capacity is applicable for high-speed transmission, the transmission rate control circuit increases the frequency of the clock signal to change the operating speed of its node and each of the nodes requiring the switching of the transmission rate to high-speed transmission.

    摘要翻译: 一种接口设备和接口设备控制方法,用于在必要时切换传输速率以实现高速传输。 在设置有接口装置的设备(节点)中,传输速率控制电路降低时钟信号的频率,以便仅在低速传输期间以及当不执行传送操作时才能进行低​​速传输操作。 需要切换到高速传输速率的节点与包括在到传送目的地的路由中的每个节点协商,并读取存储在寄存器中的设备信息,以确认每个节点是否具有适用于高速传输的传输容量。 然后,当传输容量适用于高速传输时,传输速率控制电路增加时钟信号的频率,以改变其节点的操作速度,并且每个节点需要将传输速率切换到高速 传输。