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公开(公告)号:US20100238153A1
公开(公告)日:2010-09-23
申请号:US12709254
申请日:2010-02-19
IPC分类号: G06F3/038
CPC分类号: H03F3/345 , G09G2310/027 , G09G2310/0297 , H03F3/45179
摘要: A circuit that obtains a more accurate, output voltage from a plurality of input voltages is provided. A two-input single-output circuit includes a current source transistor allowing a predetermined current to flow, a cascode transistor section including two MOS transistors that are cascode-connected to the drain side of the current source transistor and have the same characteristics, a differential pair section having a first differential pair formed of a first input-side transistor and a first output-side transistor whose source lines are shared and a second differential pair formed of a second input-side transistor and a second output-side transistor whose source lines are shared, and a current mirror circuit section. Drain lines of the transistors of the cascade transistor section are respectively connected to the source lines of the first and second differential pairs.
摘要翻译: 提供从多个输入电压获得更精确的输出电压的电路。 双输入单输出电路包括允许预定电流流动的电流源晶体管,共源共栅晶体管部分,其包括共源共栅式连接到电流源晶体管的漏极侧并具有相同特性的两个MOS晶体管,差分 所述第一差分对具有由第一输入侧晶体管和源极线共享的第一输出侧晶体管和由第二输入侧晶体管和第二输出侧晶体管形成的第二差分对形成的第一差分对, 被共享,并且是电流镜电路部分。 级联晶体管部分的晶体管的漏极线分别连接到第一和第二差分对的源极线。
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公开(公告)号:US08576214B2
公开(公告)日:2013-11-05
申请号:US12709254
申请日:2010-02-19
CPC分类号: H03F3/345 , G09G2310/027 , G09G2310/0297 , H03F3/45179
摘要: A circuit that obtains a more accurate, output voltage from a plurality of input voltages is provided. A two-input single-output circuit includes a current source transistor allowing a predetermined current to flow, a cascode transistor section including two MOS transistors that are cascode-connected to the drain side of the current source transistor and have the same characteristics, a differential pair section having a first differential pair formed of a first input-side transistor and a first output-side transistor whose source lines are shared and a second differential pair formed of a second input-side transistor and a second output-side transistor whose source lines are shared, and a current mirror circuit section. Drain lines of the transistors of the cascade transistor section are respectively connected to the source lines of the first and second differential pairs.
摘要翻译: 提供从多个输入电压获得更精确的输出电压的电路。 双输入单输出电路包括允许预定电流流动的电流源晶体管,共源共栅晶体管部分,其包括共源共栅式连接到电流源晶体管的漏极侧并具有相同特性的两个MOS晶体管,差分 所述第一差分对具有由第一输入侧晶体管和源极线共享的第一输出侧晶体管和由第二输入侧晶体管和第二输出侧晶体管形成的第二差分对形成的第一差分对, 被共享,并且是电流镜电路部分。 级联晶体管部分的晶体管的漏极线分别连接到第一和第二差分对的源极线。
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公开(公告)号:US07968357B2
公开(公告)日:2011-06-28
申请号:US12662961
申请日:2010-05-13
IPC分类号: H01L21/00
CPC分类号: G02F1/133345 , G02F1/133305 , G02F1/133504 , G02F1/133555 , G02F1/134363 , G02F1/136213 , G02F1/136227 , G02F1/1368 , G02F2001/13685 , H01L27/124 , H01L27/1248 , H01L29/78675
摘要: The present invention provides a liquid crystal display device having a large holding capacitance in the inside of a pixel. A liquid crystal display device includes a first substrate, a second substrate arranged to face the first substrate in an opposed manner, and liquid crystal sandwiched between the first substrate and the second substrate. The first substrate includes a video signal line, a pixel electrode, a thin film transistor having a first electrode thereof connected to the video signal line and a second electrode thereof connected to the pixel electrode, a first silicon nitride film formed above the second electrode, an organic insulation film formed above the first silicon nitride film, a capacitance electrode formed above the organic insulation film, and a second silicon nitride film formed above the capacitance electrode and below the pixel electrode. The second silicon nitride film is a film which is formed at a temperature lower than a forming temperature of the first silicon nitride film. The first silicon nitride film and the second silicon nitride film form a contact hole therein by etching both of the first silicon nitride film and the second silicon nitride film collectively by dry etching. The second electrode and the pixel electrode are connected to each other via the contact hole. A potential different from a potential applied to the pixel electrode is applied to the capacitance electrode, and a holding capacitance is formed by the pixel electrode, the second silicon nitride film and the capacitance electrode.
摘要翻译: 本发明提供一种在像素内部具有大的保持电容的液晶显示装置。 液晶显示装置包括第一基板,以相对的方式与第一基板相对地布置的第二基板和夹在第一基板和第二基板之间的液晶。 第一基板包括视频信号线,像素电极,具有连接到视频信号线的第一电极的薄膜晶体管和连接到像素电极的第二电极,形成在第二电极上方的第一氮化硅膜, 形成在第一氮化硅膜上方的有机绝缘膜,形成在有机绝缘膜上方的电容电极和形成在电容电极上方和像素电极下方的第二氮化硅膜。 第二氮化硅膜是在低于第一氮化硅膜的形成温度的温度下形成的膜。 第一氮化硅膜和第二氮化硅膜通过干法蚀刻同时蚀刻第一氮化硅膜和第二氮化硅膜两者而形成接触孔。 第二电极和像素电极经由接触孔相互连接。 将施加到像素电极的电位不同的电位施加到电容电极,并且由像素电极,第二氮化硅膜和电容电极形成保持电容。
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公开(公告)号:US08513701B2
公开(公告)日:2013-08-20
申请号:US13568672
申请日:2012-08-07
IPC分类号: H01L33/00
CPC分类号: G02F1/133345 , G02F1/133305 , G02F1/133504 , G02F1/133555 , G02F1/134363 , G02F1/136213 , G02F1/136227 , G02F1/1368 , G02F2001/13685 , H01L27/124 , H01L27/1248 , H01L29/78675
摘要: A LCD device having a large pixel holding capacitance includes opposedly facing first and second substrates, and liquid crystal between them. The first substrate includes a video signal line, a pixel electrode, a thin film transistor having a first electrode connected to the video signal line and a second electrode connected to the pixel electrode, a first silicon nitride film formed above the second electrode, an organic insulation film above the first silicon nitride film, a capacitance electrode above the organic insulation film, and a second silicon nitride film above the capacitance electrode and below the pixel electrode. A contact hole etched in both the first and second silicon nitride films connects the second electrode and the pixel electrode to each other. A holding capacitance is formed by the pixel electrode, the second silicon nitride film and the capacitance electrode.
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5.
公开(公告)号:US20110310074A1
公开(公告)日:2011-12-22
申请号:US13164811
申请日:2011-06-21
CPC分类号: G09G3/3648 , G09G3/3674 , G09G2310/0286 , G09G2310/066 , G09G2330/025 , G11C19/184 , G11C19/28
摘要: A bidirectional shift register outputs pulses from a plurality of cascaded unit register circuits in a shift order which is one of a forward direction and a reverse direction. A λth stage of unit register circuit (38) has two set terminals connected to respective outputs of (λ−1)th and (λ+1)th stages and two reset terminals connected to respective outputs of (λ+2)th and (λ−2)th stages. The unit register circuit (38) sets, when a pulse is input to any one of the set terminals, a reference point N1 to an H level, and, when a pulse is input to any one of the reset terminals, N1 to an L level. The order of phase change of clock signals is reversed according to the direction of a shift, and whether a start trigger signal is applied to a top stage or a bottom stage is switched.
摘要翻译: 双向移位寄存器以多个级联单元寄存器电路以正向和反向之一的移位顺序输出脉冲。 单元寄存器电路(38)的第λ级具有连接到(λ-1)和(λ+ 1)级的相应输出的两个设定端子和连接到(λ+ 2)的各个输出的两个复位端子和( λ-2)级。 当单位寄存器电路(38)将脉冲输入到设定端子中的任何一个时,将参考点N1设置为H电平,并且当将脉冲输入到复位端子中的任何一个N1至L 水平。 时钟信号的相位变化顺序根据移位方向反转,开始触发信号是施加到顶级还是下级切换。
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公开(公告)号:US20110122173A1
公开(公告)日:2011-05-26
申请号:US12951137
申请日:2010-11-22
申请人: Hiroko SEHATA , Hajime Akimoto , Yoshihiro Kotani , Gou Yamamoto
发明人: Hiroko SEHATA , Hajime Akimoto , Yoshihiro Kotani , Gou Yamamoto
IPC分类号: G09G5/10
CPC分类号: G09G3/2092 , G09G3/2007 , G09G3/3208 , G09G2310/0275 , G09G2310/0297 , G09G2330/028
摘要: Provided is a display device having plural data line voltage generation circuits capable of supplying a display control voltage to display elements of a color designated as necessary. The display device includes plural display elements each displaying an image of one color; plural gradation voltage output units provided for each color to output a gradation voltage corresponding to each display gradation value of a gradation number; plural display control voltage supply units connected to each of two or more display elements to supply control voltages corresponding to display data of the display elements to each of the display elements based on the gradation voltages of the gradation number output by any one of the gradation voltage output units; and plural gradation voltage selection units provided to one or each display control voltage supply unit to select the gradation voltage output by any one of the gradation voltage output units.
摘要翻译: 提供了一种具有多个数据线电压产生电路的显示装置,能够将显示控制电压提供给必要的指定颜色的显示元件。 显示装置包括多个显示单色图像的显示元件; 为每种颜色提供的多个灰度电压输出单元,以输出与渐变编号的每个显示灰度值相对应的灰度电压; 连接到两个或更多个显示元件中的每一个的多个显示控制电压供应单元,用于根据通过灰度电压中的任何一个输出的灰度数的灰度电压将对应于显示元件的显示数据的控制电压提供给每个显示元件 输出单位; 以及多个灰度电压选择单元,被提供给一个或每个显示控制电压提供单元,以选择灰度级电压输出单元中的任一个输出的灰度电压。
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公开(公告)号:US20070298538A1
公开(公告)日:2007-12-27
申请号:US11802385
申请日:2007-05-22
IPC分类号: H01L21/00
CPC分类号: G02F1/133345 , G02F1/133305 , G02F1/133504 , G02F1/133555 , G02F1/134363 , G02F1/136213 , G02F1/136227 , G02F1/1368 , G02F2001/13685 , H01L27/124 , H01L27/1248 , H01L29/78675
摘要: The present invention provides a liquid crystal display device having a large holding capacitance in the inside of a pixel. A liquid crystal display device includes a first substrate, a second substrate arranged to face the first substrate in an opposed manner, and liquid crystal sandwiched between the first substrate and the second substrate. The first substrate includes a video signal line, a pixel electrode, a thin film transistor having a first electrode thereof connected to the video signal line and a second electrode thereof connected to the pixel electrode, a first silicon nitride film formed above the second electrode, an organic insulation film formed above the first silicon nitride film, a capacitance electrode formed above the organic insulation film, and a second silicon nitride film formed above the capacitance electrode and below the pixel electrode. The second silicon nitride film is a film which is formed at a temperature lower than a forming temperature of the first silicon nitride film. The first silicon nitride film and the second silicon nitride film form a contact hole therein by etching both of the first silicon nitride film and the second silicon nitride film collectively by dry etching. The second electrode and the pixel electrode are connected to each other via the contact hole. A potential different from a potential applied to the pixel electrode is applied to the capacitance electrode, and a holding capacitance is formed by the pixel electrode, the second silicon nitride film and the capacitance electrode.
摘要翻译: 本发明提供一种在像素内部具有大的保持电容的液晶显示装置。 液晶显示装置包括第一基板,以相对的方式与第一基板相对地布置的第二基板和夹在第一基板和第二基板之间的液晶。 第一基板包括视频信号线,像素电极,具有连接到视频信号线的第一电极的薄膜晶体管和连接到像素电极的第二电极,形成在第二电极上方的第一氮化硅膜, 形成在第一氮化硅膜上方的有机绝缘膜,形成在有机绝缘膜上方的电容电极和形成在电容电极上方和像素电极下方的第二氮化硅膜。 第二氮化硅膜是在低于第一氮化硅膜的形成温度的温度下形成的膜。 第一氮化硅膜和第二氮化硅膜通过干法蚀刻同时蚀刻第一氮化硅膜和第二氮化硅膜两者而形成接触孔。 第二电极和像素电极经由接触孔相互连接。 将施加到像素电极的电位不同的电位施加到电容电极,并且由像素电极,第二氮化硅膜和电容电极形成保持电容。
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公开(公告)号:US09024978B2
公开(公告)日:2015-05-05
申请号:US12951137
申请日:2010-11-22
申请人: Hiroko Sehata , Hajime Akimoto , Yoshihiro Kotani , Gou Yamamoto
发明人: Hiroko Sehata , Hajime Akimoto , Yoshihiro Kotani , Gou Yamamoto
CPC分类号: G09G3/2092 , G09G3/2007 , G09G3/3208 , G09G2310/0275 , G09G2310/0297 , G09G2330/028
摘要: Provided is a display device having plural data line voltage generation circuits capable of supplying a display control voltage to display elements of a color designated as necessary. The display device includes plural display elements each displaying an image of one color; plural gradation voltage output units provided for each color to output a gradation voltage corresponding to each display gradation value of a gradation number; plural display control voltage supply units connected to each of two or more display elements to supply control voltages corresponding to display data of the display elements to each of the display elements based on the gradation voltages of the gradation number output by any one of the gradation voltage output units; and plural gradation voltage selection units provided to one or each display control voltage supply unit to select the gradation voltage output by any one of the gradation voltage output units.
摘要翻译: 提供了一种具有多个数据线电压产生电路的显示装置,能够将显示控制电压提供给必要的指定颜色的显示元件。 显示装置包括多个显示单色图像的显示元件; 为每种颜色提供的多个灰度电压输出单元,以输出与渐变编号的每个显示灰度值相对应的灰度电压; 连接到两个或更多个显示元件中的每一个的多个显示控制电压供应单元,用于根据通过灰度电压中的任何一个输出的灰度数的灰度电压将对应于显示元件的显示数据的控制电压提供给每个显示元件 输出单位; 以及多个灰度电压选择单元,被提供给一个或每个显示控制电压提供单元,以选择灰度级电压输出单元中的任一个输出的灰度电压。
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9.
公开(公告)号:US08803782B2
公开(公告)日:2014-08-12
申请号:US13164811
申请日:2011-06-21
IPC分类号: G09G3/34
CPC分类号: G09G3/3648 , G09G3/3674 , G09G2310/0286 , G09G2310/066 , G09G2330/025 , G11C19/184 , G11C19/28
摘要: A bidirectional shift register outputs pulses from a plurality of cascaded unit register circuits in a shift order which is one of a forward direction and a reverse direction. A λth stage of unit register circuit (38) has two set terminals connected to respective outputs of (λ−1)th and (λ+1)th stages and two reset terminals connected to respective outputs of (λ+2)th and (λ−2)th stages. The unit register circuit (38) sets, when a pulse is input to any one of the set terminals, a reference point N1 to an H level, and, when a pulse is input to any one of the reset terminals, N1 to an L level. The order of phase change of clock signals is reversed according to the direction of a shift, and whether a start trigger signal is applied to a top stage or a bottom stage is switched.
摘要翻译: 双向移位寄存器以多个级联单元寄存器电路以正向和反向之一的移位顺序输出脉冲。 单元寄存器电路(38)的第λ级具有连接到(λ-1)和(λ+ 1)级的相应输出的两个设定端子和连接到(λ+ 2)的各个输出的两个复位端子和( λ-2)级。 当单位寄存器电路(38)将脉冲输入到设定端子中的任何一个时,将参考点N1设置为H电平,并且当将脉冲输入到复位端子中的任何一个N1至L 水平。 时钟信号的相位变化顺序根据移位方向反转,开始触发信号是施加到顶级还是下级切换。
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公开(公告)号:US20100328292A1
公开(公告)日:2010-12-30
申请号:US12825596
申请日:2010-06-29
IPC分类号: G06F3/038
CPC分类号: G09G3/20 , G02F1/13306 , G09G3/36
摘要: A decoder circuit which outputs a voltage based on a 8-bit digital value includes: a first decoder circuit and a second decoder circuit which output one voltage respectively using upper-order 6 bits of the 8-bit digital value; a selection circuit which receives voltages outputted from the first decoder circuit and the second decoder circuit, and distributes the two voltages to three terminals; and an intermediate voltage output circuit which outputs an intermediate voltage which is a one of five kinds of values based on the three voltages. The first decoder circuit and the second decoder circuit respectively include a select-switch-type decoder circuit and a tournament-type decoder circuit. Due to such a constitution, it is possible to reduce a circuit scale of the decoder circuit which outputs the voltage corresponding to the 8-bit digital value.
摘要翻译: 输出基于8位数字值的电压的解码器电路包括:分别使用8位数字值的高位6位输出一个电压的第一解码器电路和第二解码器电路; 接收从第一解码器电路和第二解码器电路输出的电压并将两个电压分配给三个端子的选择电路; 以及中间电压输出电路,其基于三个电压输出作为五种值中的一种的中间电压。 第一解码器电路和第二解码器电路分别包括选择开关型解码器电路和比赛型解码器电路。 由于这样的结构,可以减小输出对应于8位数字值的电压的解码器电路的电路规模。
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