QC-LDPC convolutional codes enabling low power trellis-based decoders
    2.
    发明授权
    QC-LDPC convolutional codes enabling low power trellis-based decoders 有权
    QC-LDPC卷积码可实现低功率网格解码器

    公开(公告)号:US09100052B2

    公开(公告)日:2015-08-04

    申请号:US14033229

    申请日:2013-09-20

    Applicant: Eran Pisek

    Inventor: Eran Pisek

    Abstract: A low-density parity check (LDPC) encoding method for increasing constraint length includes determining a LDPC code block H-matrix including a systematic submatrix (Hsys) of input systematic data and a parity check submatrix (Hpar) of parity check bits. The method includes diagonalizing the parity check submatrix (Hpar). The method includes identifying a set of rows of the H-matrix that form a complete set of the input systematic data. The method includes selecting an input bit granularity (γ) and encoding latency. The method further includes obtaining a quasi-cyclic LDPC (QC-LDPC) convolutional code H-Matrix. Further, the method includes combining the set of rows into a single row.

    Abstract translation: 用于增加约束长度的低密度奇偶校验(LDPC)编码方法包括确定包括输入系统数据的系统子矩阵(Hsys)和奇偶校验位的奇偶校验子矩阵(Hpar)的LDPC码块H矩阵。 该方法包括对齐奇偶校验子矩阵(Hpar)。 该方法包括识别形成输入系统数据的完整集合的一组H矩阵的行。 该方法包括选择输入比特粒度(γ)和编码等待时间。 该方法还包括获得准循环LDPC(QC-LDPC)卷积码H-Matrix。 此外,该方法包括将该组行组合成单个行。

    QC-LDPC CONVOLUTIONAL CODES ENABLING LOW POWER TRELLIS-BASED DECODERS
    3.
    发明申请
    QC-LDPC CONVOLUTIONAL CODES ENABLING LOW POWER TRELLIS-BASED DECODERS 有权
    QC-LDPC转换代码使用低功耗基于TRLL的解码器

    公开(公告)号:US20140223254A1

    公开(公告)日:2014-08-07

    申请号:US14033229

    申请日:2013-09-20

    Applicant: Eran Pisek

    Inventor: Eran Pisek

    Abstract: A low-density parity check (LDPC) encoding method for increasing constraint length includes determining a LDPC code block H-matrix including a systematic submatrix (Hsys) of input systematic data and a parity check submatrix (Hpar) of parity check bits. The method includes diagonalizing the parity check submatrix (Hpar). The method includes identifying a set of rows of the H-matrix that form a complete set of the input systematic data. The method includes selecting an input bit granularity (γ) and encoding latency. The method further includes obtaining a quasi-cyclic LDPC (QC-LDPC) convolutional code H-Matrix. Further, the method includes combining the set of rows into a single row.

    Abstract translation: 用于增加约束长度的低密度奇偶校验(LDPC)编码方法包括确定包括输入系统数据的系统子矩阵(Hsys)和奇偶校验位的奇偶校验子矩阵(Hpar)的LDPC码块H矩阵。 该方法包括对齐奇偶校验子矩阵(Hpar)。 该方法包括识别形成输入系统数据的完整集合的一组H矩阵的行。 该方法包括选择输入比特粒度(γ)和编码等待时间。 该方法还包括获得准循环LDPC(QC-LDPC)卷积码H-Matrix。 此外,该方法包括将该组行组合成单个行。

    LDPC code family for millimeter-wave band communications in a wireless network
    4.
    发明授权
    LDPC code family for millimeter-wave band communications in a wireless network 有权
    用于无线网络中毫米波段通信的LDPC码系列

    公开(公告)号:US08627166B2

    公开(公告)日:2014-01-07

    申请号:US13306747

    申请日:2011-11-29

    Abstract: A method constructs a family of low-density-parity-check (LDPC) codes. The method includes identifying a code rate for an LDPC code in the family, identifying a protograph for the LDPC code, and constructing a base matrix for the LDPC code. The base matrix is constructed by replacing each zero in the protograph with a ‘−1’, selecting a corresponding value for an absolute shift for each one in the protograph based on constraining a number of relative shifts per column of the LDPC code to one and increasing a size of a smallest cycle in a graph of the LDPC code, and replacing each one in the protograph with the corresponding value.

    Abstract translation: 一种方法构建了一系列低密度奇偶校验(LDPC)码。 该方法包括识别该系列中的LDPC码的码率,识别LDPC码的原型图,以及构造LDPC码的基本矩阵。 基本矩阵是通过用“-1”代替原型图中的每个零来构造的,基于将每个LDPC码的相对位移数量约束为1,为了对原型图中的每一个选择相应的绝对位移值, 增加LDPC码的图形中的最小周期的大小,并将原型图中的每一个替换为相应的值。

    Method and system for testing a software-defined radio device
    5.
    发明授权
    Method and system for testing a software-defined radio device 失效
    用于测试软件定义无线电设备的方法和系统

    公开(公告)号:US08606259B2

    公开(公告)日:2013-12-10

    申请号:US11655471

    申请日:2007-01-19

    CPC classification number: H04B17/0085

    Abstract: A method for testing a software-defined radio (SDR) device is provided. The method includes configuring the SDR device for a first standard. A first test is performed on the SDR device under the first standard. Test data for the first test is received from the SDR device. A switching time for configuring the SDR device for the first standard is determined based on the test data for the first test.

    Abstract translation: 提供了一种用于测试软件定义无线电(SDR)设备的方法。 该方法包括为第一标准配置SDR设备。 在第一个标准的SDR设备上执行第一个测试。 从SDR设备接收第一次测试的测试数据。 基于第一测试的测试数据来确定用于配置用于第一标准的SDR设备的切换时间。

    System and method for coding and interleaving for short frame support in visible light communication
    6.
    发明授权
    System and method for coding and interleaving for short frame support in visible light communication 有权
    用于可见光通信中的短帧支持的编码和交织的系统和方法

    公开(公告)号:US08495476B2

    公开(公告)日:2013-07-23

    申请号:US12962324

    申请日:2010-12-07

    Abstract: A transmitter is capable of performing both Galois Field (GF) (16) and GF (256) encoding in a visual light communication system. The transmitter includes a GF (256) encoder. The transmitter also includes a first bit mapper configured to map a first number of bits to a second number of bits. The Galois Field (256) encoder is configured to receive and encode the second number of bits. The transmitter also includes a second bit mapper configured to map the second number of bits to the first number of bits. The transmitter also includes an interleaver unit that can pad bits based on a frame size and puncture the bits after interleaving and prior to transmission.

    Abstract translation: 发射机能够在视觉光通信系统中执行Galois Field(GF)(16)和GF(256)编码。 发射机包括一个GF(256)编码器。 发射机还包括配置成将第一比特数映射到第二比特数的第一比特映射器。 伽罗瓦域(256)编码器被配置为接收和编码第二位数。 发射机还包括配置成将第二位数映射到第一位数的第二位映射器。 发射机还包括交织器单元,其可以基于帧大小来填充比特,并且在交织之后和发送之前对比特进行穿孔。

    LDPC CODE FAMILY FOR MILLIMETER-WAVE BAND COMMUNICATIONS IN A WIRELESS NETWORK
    7.
    发明申请
    LDPC CODE FAMILY FOR MILLIMETER-WAVE BAND COMMUNICATIONS IN A WIRELESS NETWORK 有权
    用于无线网络中的毫米波段通信的LDPC码系列

    公开(公告)号:US20120240001A1

    公开(公告)日:2012-09-20

    申请号:US13306747

    申请日:2011-11-29

    Abstract: A method constructs a family of low-density-parity-check (LDPC) codes. The method includes identifying a code rate for an LDPC code in the family, identifying a protograph for the LDPC code, and constructing a base matrix for the LDPC code. The base matrix is constructed by replacing each zero in the protograph with a ‘−1’, selecting a corresponding value for an absolute shift for each one in the protograph based on constraining a number of relative shifts per column of the LDPC code to one and increasing a size of a smallest cycle in a graph of the LDPC code, and replacing each one in the protograph with the corresponding value.

    Abstract translation: 一种方法构建了一系列低密度奇偶校验(LDPC)码。 该方法包括识别该系列中的LDPC码的码率,识别LDPC码的原型图,以及构造LDPC码的基本矩阵。 基本矩阵是通过用“-1”代替原型图中的每个零来构造的,基于将每个LDPC码的相对位移数量约束为1,为了对原型图中的每一个选择相应的绝对位移值, 增加LDPC码的图形中的最小周期的大小,并将原型图中的每一个替换为相应的值。

    APPARATUS AND METHOD FOR DECODING LDPC CODES IN A COMMUNICATIONS SYSTEM
    8.
    发明申请
    APPARATUS AND METHOD FOR DECODING LDPC CODES IN A COMMUNICATIONS SYSTEM 有权
    用于解码通信系统中的LDPC码的装置和方法

    公开(公告)号:US20120084625A1

    公开(公告)日:2012-04-05

    申请号:US13248900

    申请日:2011-09-29

    Abstract: An apparatus and method decode LDPC code. The apparatus includes a memory and a number of LDPC processing elements. The memory is configured to receive a LDPC codeword having a length equal to a lifting factor times a base LDPC code length, wherein the lifting factor is greater than one. The number of LDPC processing elements configured to decode the LDPC codeword, wherein each of the number of LDPC processing elements decode separate portions of the LDPC codeword.

    Abstract translation: 一种解码LDPC码的装置和方法。 该装置包括存储器和多个LDPC处理元件。 存储器被配置为接收长度等于提升因子乘以基本LDPC码长度的LDPC码字,其中提升因子大于1。 被配置为对LDPC码字进行解码的LDPC处理单元的数量,其中,所述多个LDPC处理单元中的每一个解码所述LDPC码字的分离部分。

    Efficient almost regular permutation (ARP) interleaver and method
    9.
    发明授权
    Efficient almost regular permutation (ARP) interleaver and method 有权
    高效的几乎规则排列(ARP)交织器和方法

    公开(公告)号:US08032811B2

    公开(公告)日:2011-10-04

    申请号:US11715202

    申请日:2007-03-07

    CPC classification number: H03M13/2764 H03M13/2753 H03M13/2957 H03M13/6508

    Abstract: An almost regular permutation (ARP) interleaver and method generate interleaved indices in a sequential fashion based on a process in which each interleaved index is a function of an adjacent index. Based on the data block size (N) for a received data block and a constant (C) for the ARP interleaver, a plurality of interleaved indices is generated. For one embodiment in which the interleaved indices are generated in forward sequence, the adjacent interleaved index is the immediately previous index, P(j−1), and each interleaved index (P(j)) is generated based on incrementing the previous interleaved index (P(j−1)) by an incremental value k(i), where j represents a non-interleaved index between 0 and N−1, i represents a modulo-C counter index that corresponds to j, k(i) represents the i-th value of a set of incremental values associated with N and C.

    Abstract translation: 几乎常规排列(ARP)交织器和方法基于其中每个交织索引是相邻索引的函数的过程以顺序方式产生交错索引。 基于接收数据块的数据块大小(N)和用于ARP交织器的常数(C),生成多个交织索引。 对于其中以正向序列生成交织索引的一个实施例,相邻交织索引是紧接在前的索引P(j-1),并且每个交织索引(P(j))是基于递增先前的交织索引 (P(j-1))乘以增量值k(i),其中j表示0和N-1之间的非交织索引,i表示对应于j的模C计数器索引,k(i)表示 与N和C相关联的一组增量值的第i个值。

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