METHOD AND APPARATUS FOR PERFORMING FLOATING-POINT DIVISION
    1.
    发明申请
    METHOD AND APPARATUS FOR PERFORMING FLOATING-POINT DIVISION 审中-公开
    用于执行浮点分割的方法和装置

    公开(公告)号:US20120059866A1

    公开(公告)日:2012-03-08

    申请号:US12875757

    申请日:2010-09-03

    IPC分类号: G06F7/44 G06F7/42

    CPC分类号: G06F7/4873 G06F9/30014

    摘要: A method and apparatus provides for performing floating-point division using input check/output correction floating-point division logic and a floating-point division fix-up instruction (e.g., an instruction, command, signal or other indicator). In one example, the apparatus includes a processor having a floating-point arithmetic logic unit (ALU) that includes the input check/output correction floating-point division logic. The input check/output correction floating-point division logic is responsive to the floating-point division fix-up instruction executable by the floating-point ALU that causes the input check/output correction floating-point division logic to examine a first input representing a numerator and a second input representing a denominator to determine whether a special case of floating-point division occurs. The floating-point division fix-up instruction also causes the input check/output correction floating-point division logic to provide an output representing a floating-point division result based on the determined special case of floating-point division and a third input representing a candidate quotient.

    摘要翻译: 一种方法和装置提供使用输入校验/输出校正浮点分割逻辑和浮点分割修正指令(例如,指令,命令,信号或其他指示符)执行浮点分割。 在一个示例中,该装置包括具有包括输入校验/输出校正浮点分割逻辑的浮点算术逻辑单元(ALU)的处理器。 输入检查/输出校正浮点除法逻辑响应于可由浮点ALU执行的浮点除法固定指令,该浮点ALU使得输入校验/输出校正浮点除法逻辑检查表示一个 分子和表示分母的第二输入,以确定是否发生浮点划分的特殊情况。 浮点分割固定指令还使得输入校验/输出校正浮点除法逻辑基于所确定的浮点除法特殊情况提供表示浮点分割结果的输出,第三输入表示 候选商。

    Method and apparatus for additive range reduction
    2.
    发明授权
    Method and apparatus for additive range reduction 有权
    添加剂范围缩小的方法和装置

    公开(公告)号:US09563402B2

    公开(公告)日:2017-02-07

    申请号:US13223974

    申请日:2011-09-01

    IPC分类号: G06F7/548

    CPC分类号: G06F7/548

    摘要: A method and apparatus for additive range reduction are disclosed. A constant may be pre-stored in a look-up table (LUT), and at least one section of the constant may be retrieved from the LUT for generating a product of an input argument and the constant such that a precision of the product may be controlled in any granularity. For a trigonometric function, 2/π is stored in the LUT, and at least one section of 2/π may be retrieved from the LUT. The argument is multiplied with the retrieved sections of 2/π. The retrieved sections are determined to correctly generate the two least significant bits (LSBs) of an integer portion and a scalable number of most significant bits of the multiplication result. An output of the trigonometric function is generated for the argument with a fractional portion of the multiplication result based on two LSBs of the integer portion of the multiplication result.

    摘要翻译: 公开了一种用于附加范围缩小的方法和装置。 常数可以预先存储在查找表(LUT)中,并且可以从LUT中检索常数的至少一个部分,以生成输入参数和常数的乘积,使得产品的精度可以 以任何粒度进行控制。 对于三角函数,2 /π存储在LUT中,并且可以从LUT检索至少一个2 /π的部分。 该参数与2 /π的检索部分相乘。 确定所检索的部分以正确地生成乘法结果的整数部分的两个最低有效位(LSB)和最高有效位的可缩放数目。 根据乘法结果的整数部分的两个LSB,对于具有乘法结果的小数部分的参数,生成三角函数的输出。

    Video instruction processing of desired bytes in multi-byte buffers by shifting to matching byte location
    3.
    发明授权
    Video instruction processing of desired bytes in multi-byte buffers by shifting to matching byte location 有权
    通过转移到匹配的字节位置来处理多字节缓冲器中所需字节的视频指令

    公开(公告)号:US08473721B2

    公开(公告)日:2013-06-25

    申请号:US12762020

    申请日:2010-04-16

    IPC分类号: G06F9/30

    CPC分类号: G06T1/00

    摘要: Disclosed herein is a processing unit configured to process video data, and applications thereof. In an embodiment, the processing unit includes a buffer and an execution unit. The buffer is configured to store a data word, wherein the data word comprises a plurality of bytes of video data. The execution unit is configured to execute a single instruction to (i) shift bytes of video data contained in the data word to align a desired byte of video data and (ii) process the desired byte of the video data to provide processed video data.

    摘要翻译: 这里公开了一种处理单元,其被配置为处理视频数据及其应用。 在一个实施例中,处理单元包括缓冲器和执行单元。 缓冲器被配置为存储数据字,其中数据字包括多个字节的视频数据。 执行单元被配置为执行单个指令,以(i)移动包含在数据字中的视频数据的字节以对准视频数据的所需字节,并且(ii)处理视频数据的期望字节以提供经处理的视频数据。

    ELECTRODE ASSEMBLY WITH COOLING PASSAGEWAY
    4.
    发明申请
    ELECTRODE ASSEMBLY WITH COOLING PASSAGEWAY 审中-公开
    电极组件与冷却通道

    公开(公告)号:US20130092435A1

    公开(公告)日:2013-04-18

    申请号:US13272220

    申请日:2011-10-13

    IPC分类号: H02G15/02

    摘要: An electrode assembly with a cooling passageway for improving electrode life expectancy and better weld quality. The electrode assembly includes an electrode body, and an electrode cap detachably coupled to the electrode body. A cooling passageway passes through the electrode assembly for carrying a cooling agent. The cooling agent enters the cooling passageway through an inlet port, removes the welding heat energy from the electrode assembly, and exits the cooling passageway through an outlet port. Further, an elastomeric seal, between a mating surface of the electrode body and the electrode cap, seals the electrode cap to the electrode body.

    摘要翻译: 具有用于提高电极寿命和更好焊接质量的冷却通道的电极组件。 电极组件包括电极体和可拆卸地联接到电极体的电极帽。 冷却通道通过用于承载冷却剂的电极组件。 冷却剂通过入口进入冷却通道,从电极组件移除焊接热能,并通过出口离开冷却通道。 此外,在电极体的配合表面和电极帽之间的弹性体密封将电极帽密封到电极体上。

    METHOD AND APPARATUS FOR ADDITIVE RANGE REDUCTION
    5.
    发明申请
    METHOD AND APPARATUS FOR ADDITIVE RANGE REDUCTION 有权
    添加剂减少的方法和装置

    公开(公告)号:US20130060829A1

    公开(公告)日:2013-03-07

    申请号:US13223974

    申请日:2011-09-01

    IPC分类号: G06F7/38

    CPC分类号: G06F7/548

    摘要: A method and apparatus for additive range reduction are disclosed. A constant may be pre-stored in a look-up table (LUT), and at least one section of the constant may be retrieved from the LUT for generating a product of an input argument and the constant such that a precision of the product may be controlled in any granularity. For a trigonometric function, 2/π is stored in the LUT, and at least one section of 2/π may be retrieved from the LUT. The argument is multiplied with the retrieved sections of 2/π. The retrieved sections are determined to correctly generate the two least significant bits (LSBs) of an integer portion and a scalable number of most significant bits of the multiplication result. An output of the trigonometric function is generated for the argument with a fractional portion of the multiplication result based on two LSBs of the integer portion of the multiplication result.

    摘要翻译: 公开了一种用于附加范围缩小的方法和装置。 常数可以预先存储在查找表(LUT)中,并且可以从LUT中检索常数的至少一个部分,以生成输入参数和常数的乘积,使得产品的精度可以 以任何粒度进行控制。 对于三角函数,2 /&pgr; 存储在LUT中,并且至少有一个2 / pgr; 可以从LUT检索。 参数乘以2 /&pgr的检索部分。 确定所检索的部分以正确地生成乘法结果的整数部分的两个最低有效位(LSB)和最高有效位的可缩放数目。 根据乘法结果的整数部分的两个LSB,对于具有乘法结果的小数部分的参数,生成三角函数的输出。

    APPARATUS AND METHOD FOR VIDEO DATA PROCESSING
    6.
    发明申请
    APPARATUS AND METHOD FOR VIDEO DATA PROCESSING 审中-公开
    视频数据处理的装置和方法

    公开(公告)号:US20130003870A1

    公开(公告)日:2013-01-03

    申请号:US13174873

    申请日:2011-07-01

    IPC分类号: H04N7/26

    CPC分类号: H04N19/436 H04N19/43

    摘要: Methods and apparatus for accelerating the processing of image data are disclosed that are particularly useful in conducting graphical pattern searches. Embodiments of the invention conduct and implement comparative calculations of reference and search image pel data on a multi-pel comparative basis, particularly, sum of the absolute differences (SAD) based calculation comparisons.

    摘要翻译: 公开了用于加速图像数据处理的方法和装置,其在进行图形模式搜索时特别有用。 本发明的实施例在多像素比较基础上进行和执行参考和搜索图像像素数据的比较计算,特别是基于绝对差(SAD)的计算比较的和。

    Processing Unit to Implement Video Instructions and Applications Thereof
    7.
    发明申请
    Processing Unit to Implement Video Instructions and Applications Thereof 有权
    处理单元实现视频指令及应用

    公开(公告)号:US20110057940A1

    公开(公告)日:2011-03-10

    申请号:US12762020

    申请日:2010-04-16

    IPC分类号: G06T1/00 G09G5/36

    CPC分类号: G06T1/00

    摘要: Disclosed herein is a processing unit configured to process video data, and applications thereof. In an embodiment, the processing unit includes a buffer and an execution unit. The buffer is configured to store a data word, wherein the data word comprises a plurality of bytes of video data. The execution unit is configured to execute a single instruction to (i) shift bytes of video data contained in the data word to align a desired byte of video data and (ii) process the desired byte of the video data to provide processed video data.

    摘要翻译: 这里公开了一种处理单元,其被配置为处理视频数据及其应用。 在一个实施例中,处理单元包括缓冲器和执行单元。 缓冲器被配置为存储数据字,其中数据字包括多个字节的视频数据。 执行单元被配置为执行单个指令,以(i)移动包含在数据字中的视频数据的字节以对准视频数据的所需字节,并且(ii)处理视频数据的期望字节以提供经处理的视频数据。