Systems and methods utilizing randomized clock rates to reduce systematic time-stamp granularity errors in network packet communications
    1.
    发明授权
    Systems and methods utilizing randomized clock rates to reduce systematic time-stamp granularity errors in network packet communications 有权
    利用随机时钟速率来减少网络分组通信中的系统时间戳粒度误差的系统和方法

    公开(公告)号:US09319054B2

    公开(公告)日:2016-04-19

    申请号:US13442262

    申请日:2012-04-09

    IPC分类号: H03L7/197 H04J3/06

    摘要: Systems and methods are disclosed for utilizing slave (receive) time-stamp clock rates that are different from master (sender) time-stamp clock rates to randomize and thereby reduce systematic time-stamp granularity errors in the communication of network packets. The slave (receive) time-stamp clock rate for some embodiments is set to be a fixed value that has a relationship with the master (sender) time-stamp clock rate such that the ratio of the slave (receive) clock rate to the master (sender) clock rate is a rational number. Other embodiments use a time-varying frequency for the slave (receive) time-stamp clock rate to randomize the slave (receive) time-stamp clock with respect to the master (sender) time-stamp clock. Additional time-stamps can also be generated using a slave (receive) time-stamp clock having a rate set to equal the rate of the master (sender) time-stamp clock signal. Further spread spectrum and/or delta-sigma modulation techniques can be applied to effectively randomize the slave (receive) time-stamp clock.

    摘要翻译: 公开了利用与主(发送者)时间标记时钟速率不同的从(接收)时间戳时钟速率来随机化并由此减少网络分组通信中的系统时间戳粒度错误的系统和方法。 一些实施例的从属(接收)时间戳时钟速率被设置为与主(发送者)时间戳时钟速率具有关系的固定值,使得从(接收)时钟速率与主机 (发送者)时钟频率是一个合理的数字。 其他实施例使用从属(接收)时间戳时钟速率的时变频率来相对于主(发送者)时间戳时钟随机化从(接收)时间戳时钟。 也可以使用具有等于主(发送者)时间戳时钟信号的速率的速率的从(接收)时间标记时钟来产生附加的时间戳。 可以应用进一步的扩频和/或Δ-Σ调制技术来有效地使从(接收)时间戳时钟随机化。

    Automatic filter overlap processing and related systems and methods
    2.
    发明授权
    Automatic filter overlap processing and related systems and methods 有权
    自动过滤器重叠处理及相关系统和方法

    公开(公告)号:US08902895B2

    公开(公告)日:2014-12-02

    申请号:US13227617

    申请日:2011-09-08

    IPC分类号: H04L12/28

    摘要: Systems and methods are disclosed that allow for improved management and control of packet forwarding in network systems. Network devices and tool optimizers and a related systems and methods are disclosed for improved packet forwarding between input ports and output ports. The input ports and output ports are configured to be connected to source devices and destination devices, for example, network sources and destination tools in a network monitoring environment. The network devices and tool optimizers disclosed can use a packet processing system whereby forwarding behavior is governed by matching packets in parallel against multiple user-specified packet filtering criteria, and by performing forwarding actions associated with all such matching filter criteria. The multi-action packet forwarding can be implemented using hardware configured to directly provide multi-action packet forwarding and/or hardware configured to provide single-packet-forwarding that has been subsequently configured using filter engines to provide multi-action packet forwarding.

    摘要翻译: 公开了允许改进网络系统中分组转发的管理和控制的系统和方法。 公开了网络设备和工具优化器以及相关的系统和方法,用于改善输入端口和输出端口之间的分组转发。 输入端口和输出端口被配置为连接到源设备和目标设备,例如网络监视环境中的网络源和目标工具。 公开的网络设备和工具优化器可以使用分组处理系统,由此通过与多个用户指定的分组过滤标准并行地匹配分组来管理转发行为,并且通过执行与所有这样的匹配过滤器标准相关联的转发动作。 可以使用配置为直接提供多动作分组转发和/或被配置为提供单个分组转发的硬件来实现多动作分组转发,所述单分组转发随后使用过滤器引擎配置以提供多动作分组转发。

    SYSTEMS AND METHODS UTILIZING RANDOMIZED CLOCK RATES TO REDUCE SYSTEMATIC TIME-STAMP GRANULARITY ERRORS IN NETWORK PACKET COMMUNICATIONS
    3.
    发明申请
    SYSTEMS AND METHODS UTILIZING RANDOMIZED CLOCK RATES TO REDUCE SYSTEMATIC TIME-STAMP GRANULARITY ERRORS IN NETWORK PACKET COMMUNICATIONS 有权
    系统和方法利用随机时钟频率来降低​​网络分组通信中的系统时间戳错误错误

    公开(公告)号:US20130077642A1

    公开(公告)日:2013-03-28

    申请号:US13442262

    申请日:2012-04-09

    IPC分类号: H04L7/00

    摘要: Systems and methods are disclosed for utilizing slave (receive) time-stamp clock rates that are different from master (sender) time-stamp clock rates to randomize and thereby reduce systematic time-stamp granularity errors in the communication of network packets. The slave (receive) time-stamp clock rate for some embodiments is set to be a fixed value that has a relationship with the master (sender) time-stamp clock rate such that the ratio of the slave (receive) clock rate to the master (sender) clock rate is a rational number. Other embodiments use a time-varying frequency for the slave (receive) time-stamp clock rate to randomize the slave (receive) time-stamp clock with respect to the master (sender) time-stamp clock. Additional time-stamps can also be generated using a slave (receive) time-stamp clock having a rate set to equal the rate of the master (sender) time-stamp clock signal. Further spread spectrum and/or delta-sigma modulation techniques can be applied to effectively randomize the slave (receive) time-stamp clock.

    摘要翻译: 公开了利用与主(发送者)时间标记时钟速率不同的从(接收)时间戳时钟速率来随机化并由此减少网络分组通信中的系统时间戳粒度错误的系统和方法。 一些实施例的从属(接收)时间戳时钟速率被设置为与主(发送者)时间戳时钟速率具有关系的固定值,使得从(接收)时钟速率与主机 (发送者)时钟频率是一个合理的数字。 其他实施例使用从属(接收)时间戳时钟速率的时变频率来相对于主(发送者)时间戳时钟随机化从(接收)时间戳时钟。 也可以使用具有等于主(发送者)时间戳时钟信号的速率的速率的从(接收)时间标记时钟来产生附加的时间戳。 可以应用进一步的扩频和/或Δ-Σ调制技术来有效地使从(接收)时间戳时钟随机化。

    SYSTEMS AND METHODS UTILIZING LARGE PACKET SIZES TO REDUCE UNPREDICTABLE NETWORK DELAY VARIATIONS FOR TIMING PACKETS
    4.
    发明申请
    SYSTEMS AND METHODS UTILIZING LARGE PACKET SIZES TO REDUCE UNPREDICTABLE NETWORK DELAY VARIATIONS FOR TIMING PACKETS 审中-公开
    使用大型分组尺寸的系统和方法可减少用于定时分组的不可预测的网络延迟变化

    公开(公告)号:US20120207178A1

    公开(公告)日:2012-08-16

    申请号:US13352106

    申请日:2012-01-17

    IPC分类号: H04L12/54

    CPC分类号: H04L47/365 H04J3/0658

    摘要: Systems and methods are disclosed for utilizing large packet sizes to reduce unpredictable network delay variations in delivering timing packets across networks for use with respect to network timing protocols. By increasing the size of the timing packets, the disclosed embodiments reduce or eliminate the blocking effect caused by size differences between timing packets and relatively large packets carried through a packet network. By reducing or eliminating this blocking effect, the disclosed embodiments provide significant advantages in reducing the complexity of implementing robust timing protocols for handling unpredictable delays in the communication of timing packets. The size of timing packets can be increased, for example, by adding fill data to timing data to form large timing packets. A variety of large packet sizes can be used for the timing packets, and timing packets can preferably be made to be equal to the maximum transmission unit (MTU) for the network.

    摘要翻译: 公开的系统和方法用于利用大的分组大小以减少在网络上传递定时分组以在网络定时协议方面使用的不可预测的网络延迟变化。 通过增加定时分组的大小,所公开的实施例减少或消除由定时分组和通过分组网络承载的相对大的分组之间的大小差异引起的阻塞效应。 通过减少或消除这种阻塞效应,所公开的实施例在降低实现鲁棒定时协议的复杂性方面提供了显着的优点,以处理定时分组的通信中的不可预测的延迟。 可以例如通过向定时数据添加填充数据以形成大的定时分组来增加定时分组的大小。 可以对定时分组使用各种大的分组大小,并且优选地将定时分组设置为等于网络的最大传输单元(MTU)。

    Superset packet forwarding for overlapping filters and related systems and methods
    5.
    发明授权
    Superset packet forwarding for overlapping filters and related systems and methods 有权
    重叠过滤器和相关系统和方法的超集包转发

    公开(公告)号:US08098677B1

    公开(公告)日:2012-01-17

    申请号:US12462293

    申请日:2009-07-31

    CPC分类号: H04L43/12 H04L43/028

    摘要: Systems and methods are disclosed that allow for improved management and control of packet forwarding in network systems. Network devices and tool optimizers and a related systems and methods are disclosed for improved packet forwarding between input ports and output ports. The input ports and output ports are configured to be connected to source devices and destination devices, for example, network sources and destination tools in a network monitoring environment. The network devices and tool optimizers disclosed can use superset packet forwarding, such that ingress filter engines are configured with ingress filter rules so as to forward a superset of packets to output ports associated with overlapping filters. Egress filter engines are configured with egress filter rules to then determine which of the superset packets are actually sent out the output ports.

    摘要翻译: 公开了允许改进网络系统中分组转发的管理和控制的系统和方法。 公开了网络设备和工具优化器以及相关的系统和方法,用于改善输入端口和输出端口之间的分组转发。 输入端口和输出端口被配置为连接到源设备和目标设备,例如网络监视环境中的网络源和目标工具。 公开的网络设备和工具优化器可以使用超集包转发,使得入口过滤器引擎配置有入口过滤器规则,以便将分组的超集转发到与重叠过滤器相关联的输出端口。 出口过滤器引擎配置有出口过滤器规则,然后确定哪些超集包实际上被发送出输出端口。

    Superset packet forwarding for overlapping filters and related systems and methods
    7.
    发明授权
    Superset packet forwarding for overlapping filters and related systems and methods 有权
    重叠过滤器和相关系统和方法的超集包转发

    公开(公告)号:US08842548B2

    公开(公告)日:2014-09-23

    申请号:US13346123

    申请日:2012-01-09

    IPC分类号: H04L12/28 G06F15/16

    CPC分类号: H04L43/12 H04L43/028

    摘要: Systems and methods are disclosed that allow for improved management and control of packet forwarding in network systems. Network devices and tool optimizers and a related systems and methods are disclosed for improved packet forwarding between input ports and output ports. The input ports and output ports are configured to be connected to source devices and destination devices, for example, network sources and destination tools in a network monitoring environment. The network devices and tool optimizers disclosed can use superset packet forwarding, such that ingress filter engines are configured with ingress filter rules so as to forward a superset of packets to output ports associated with overlapping filters. Egress filter engines are configured with egress filter rules to then determine which of the superset packets are actually sent out the output ports.

    摘要翻译: 公开了允许改进网络系统中分组转发的管理和控制的系统和方法。 公开了网络设备和工具优化器以及相关的系统和方法,用于改善输入端口和输出端口之间的分组转发。 输入端口和输出端口被配置为连接到源设备和目标设备,例如网络监视环境中的网络源和目标工具。 公开的网络设备和工具优化器可以使用超集包转发,使得入口过滤器引擎配置有入口过滤器规则,以便将分组的超集转发到与重叠过滤器相关联的输出端口。 出口过滤器引擎配置有出口过滤器规则,然后确定哪些超集包实际上被发送出输出端口。

    Systems and methods for precise timing measurements using high-speed deserializers
    8.
    发明授权
    Systems and methods for precise timing measurements using high-speed deserializers 有权
    使用高速解串器进行精确定时测量的系统和方法

    公开(公告)号:US08533518B2

    公开(公告)日:2013-09-10

    申请号:US12930495

    申请日:2011-01-07

    IPC分类号: G06F1/00

    CPC分类号: G01R31/31725 G01R31/31716

    摘要: Systems and methods are disclosed for precise event time measurement using high-speed deserializer circuitry. The described embodiments utilize high speed deserializer circuitry to achieve a precision based upon a bit period associated with the operation of the high speed operation of the deserializer circuitry rather than upon slower speed clock periods associated with reference clock signals. In certain embodiments, the disclosed systems and methods receive an event occurrence signal and use deserializer circuitry to sample the event occurrence signal and to produce multi-bit parallel data representing the event occurrence signal. Precise timestamps can then be generated based upon the multi-bit parallel data. Advantageously, the precision of these time measurements is associated with the bit period of the high speed operation of the deserializer circuitry and are not limited to lower speeds at which other circuitry within the system may be operating, for example, based upon a slower reference clock signal.

    摘要翻译: 公开了使用高速解串器电路的精确事件时间测量的系统和方法。 所描述的实施例利用高速解串器电路来实现基于与解串行器电路的高速操作的操作相关联的位周期的精度,而不是与参考时钟信号相关联的较慢速度的时钟周期。 在某些实施例中,所公开的系统和方法接收事件发生信号,并使用解串器电路对事件发生信号进行采样并产生表示事件发生信号的多位并行数据。 然后可以基于多位并行数据来产生精确的时间戳。 有利地,这些时间测量的精度与解串行器电路的高速操作的位周期相关联,并且不限于例如基于较慢的参考时钟的系统内的其它电路可以操作的较低速度 信号。

    Systems and methods for precise timing measurements using high-speed deserializers
    9.
    发明申请
    Systems and methods for precise timing measurements using high-speed deserializers 有权
    使用高速解串器进行精确定时测量的系统和方法

    公开(公告)号:US20120179422A1

    公开(公告)日:2012-07-12

    申请号:US12930495

    申请日:2011-01-07

    IPC分类号: G06F17/40

    CPC分类号: G01R31/31725 G01R31/31716

    摘要: Systems and methods are disclosed for precise event time measurement using high-speed deserializer circuitry. The described embodiments utilize high speed deserializer circuitry to achieve a precision based upon a bit period associated with the operation of the high speed operation of the deserializer circuitry rather than upon slower speed clock periods associated with reference clock signals. In certain embodiments, the disclosed systems and methods receive an event occurrence signal and use deserializer circuitry to sample the event occurrence signal and to produce multi-bit parallel data representing the event occurrence signal. Precise timestamps can then be generated based upon the multi-bit parallel data. Advantageously, the precision of these time measurements is associated with the bit period of the high speed operation of the deserializer circuitry and are not limited to lower speeds at which other circuitry within the system may be operating, for example, based upon a slower reference clock signal.

    摘要翻译: 公开了使用高速解串器电路的精确事件时间测量的系统和方法。 所描述的实施例利用高速解串器电路来实现基于与解串行器电路的高速操作的操作相关联的位周期的精度,而不是与参考时钟信号相关联的较慢速度的时钟周期。 在某些实施例中,所公开的系统和方法接收事件发生信号,并使用解串器电路对事件发生信号进行采样并产生表示事件发生信号的多位并行数据。 然后可以基于多位并行数据来产生精确的时间戳。 有利地,这些时间测量的精度与解串行器电路的高速操作的位周期相关联,并且不限于例如基于更慢的参考时钟的系统内的其它电路可以工作的较低速度 信号。

    Systems and methods for playback of detected timing events
    10.
    发明申请
    Systems and methods for playback of detected timing events 有权
    用于回放检测到的定时事件的系统和方法

    公开(公告)号:US20120176172A1

    公开(公告)日:2012-07-12

    申请号:US12930461

    申请日:2011-01-07

    IPC分类号: H03K3/84

    摘要: Systems and methods are disclosed for playback of detected timing events with detected phase variations. Disclosed signal generation embodiments can be used to generate digital signals having desired phase variation. Disclosed event detection circuitry can be used to generate event timing data representing one or more phase variations in detected events. The disclosed signal generation embodiments can utilize the event timing data to playback detect events along with the measured phase variations. Further, the signal generation circuitry and the event detection circuitry can be implemented in different devices or can be implemented in the same device.

    摘要翻译: 公开了用于回放检测到的相位变化的定时事件的系统和方法。 公开的信号生成实施例可用于产生具有所需相位变化的数字信号。 公开的事件检测电路可以用于产生表示检测到的事件中的一个或多个相位变化的事件定时数据。 所公开的信号发生实施例可以利用事件定时数据与测量的相位变化一起重放检测事件。 此外,信号产生电路和事件检测电路可以在不同的设备中实现,或者可以在相同的设备中实现。