公开(公告)号：US20100181103A1

公开(公告)日：2010-07-22

申请号：US12409527

申请日：2009-03-24

Applicant: Lei Liu ,  Zheng-Heng Sun

Inventor： Lei Liu ,  Zheng-Heng Sun

IPC: H05K1/11 ,  B32B3/06 ,  H05K1/00

CPC classification number: G09F3/0297 ,  G09F3/12 ,  H05K1/0266 ,  H05K2201/09927 ,  H05K2201/09936 ,  H05K2201/10204 ,  H05K2201/10598 ,  Y10T428/24008

Abstract: A label assembly includes a support and a label body. The label body is configured to allow a label to be attached thereto. The support includes an upright post, and a fixing portion formed at a distal end of the post opposite to the label body. The fixing portion is configured to removably attach the label assembly to a circuit board. A circuit board supporting the label assembly is further provided.

Abstract translation: 标签组件包括支撑件和标签主体。 标签主体被配置为允许附加标签。 支撑件包括立柱，和形成在与标签体相对的柱的远端处的固定部。 固定部分构造成将标签组件可移除地附接到电路板。 还提供了支撑标签组件的电路板。

公开(公告)号：US20100071943A1

公开(公告)日：2010-03-25

申请号：US12496646

申请日：2009-07-02

Applicant: Tsung-Fu Tsai ,  Su-Ching Chung

Inventor： Tsung-Fu Tsai ,  Su-Ching Chung

IPC: H05K1/16 ,  H05K1/00

CPC classification number: H05K1/0269 ,  H01L22/26 ,  H01L23/544 ,  H01L24/24 ,  H01L24/81 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2224/24226 ,  H01L2224/81121 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H05K3/3436 ,  H05K2201/09918 ,  H05K2201/09927 ,  H05K2203/025 ,  H05K2203/162 ,  H05K2203/166 ,  H01L2924/00

Abstract: A package structure with an alignment pattern is provided, which includes a first substrate, a second substrate and at least one contact. At least one first conductive structure and at least one first alignment pattern are disposed on the first substrate. The second substrate is disposed opposite to the first substrate. In addition, at least one second conductive structure is disposed on the second substrate. The at least one contact is between the first conductive structure on the first substrate and the second conductive structure on the second structure. Particularly, the at least one first alignment pattern has at least one widest part and at least one narrowest part, and the widest part or the narrowest part is aligned or close to a central portion of the at least one contact.

Abstract translation: 提供具有对准图案的封装结构，其包括第一基板，第二基板和至少一个触点。 至少一个第一导电结构和至少一个第一对准图案设置在第一基板上。 第二基板与第一基板相对设置。 此外，至少一个第二导电结构设置在第二基板上。 所述至少一个触点位于第一基板上的第一导电结构和第二结构上的第二导电结构之间。 特别地，至少一个第一对准图案具有至少一个最宽部分和至少一个最窄部分，并且最宽部分或最窄部分对准或接近至少一个接触件的中心部分。

公开(公告)号：US07576287B2

公开(公告)日：2009-08-18

申请号：US11673596

申请日：2007-02-12

Applicant: Hsing-Lun Lo ,  Hsien-Chieh Lin ,  Kuo-Chun Chiang ,  Shing-Fun Ho

Inventor： Hsing-Lun Lo ,  Hsien-Chieh Lin ,  Kuo-Chun Chiang ,  Shing-Fun Ho

IPC: H05K1/00

CPC classification number: H05K1/0266 ,  H05K1/0268 ,  H05K2201/09481 ,  H05K2201/09927

Abstract: A lot traceable printed circuit board (PCB) includes a substrate having thereon a patterned circuit layer and a working zone carrying production information related to the PCB itself. The working zone includes a plurality of code boxes, wherein each of the code boxes has a first probe region and second probe region. A single set of resistance test loop is disposed within the first probe region. Four sets of resistance test loops are disposed within the second probe region. A frying probe tester is used to probe the set of resistance test loops respectively for abstracting the production information recorded in the working zone.

Abstract translation: 许多可追溯的印刷电路板（PCB）包括其上具有图案化电路层的基板和承载与PCB本身相关的生产信息的工作区。 工作区域包括多个代码框，其中每个代码框具有第一探测区域和第二探测区域。 单个电阻测试环路设置在第一探测区域内。 四组电阻测试环设置在第二探针区域内。 使用油炸探针测试仪分别探测一组电阻测试回路，以抽取记录在工作区域中的生产信息。

公开(公告)号：US20090126979A1

公开(公告)日：2009-05-21

申请号：US12270591

申请日：2008-11-13

Applicant: Ka-Eun CHAE ,  Wang-Jae LEE ,  Yong-Jin JUNG ,  Kun-Ho SONG

Inventor： Ka-Eun CHAE ,  Wang-Jae LEE ,  Yong-Jin JUNG ,  Kun-Ho SONG

IPC: H05K1/02 ,  H05K3/00 ,  G02B5/12

CPC classification number: H05K1/0269 ,  H05K3/0052 ,  H05K3/225 ,  H05K2201/09927 ,  H05K2201/09936 ,  H05K2201/10204 ,  Y10T29/49124

Abstract: A semiconductor package circuit board has an indicator for specifying a location of a defective circuit board unit. The semiconductor package circuit board includes circuit board units arranged in an m-by-n matrix pattern. The indicator has marking areas arranged in an m-by-n matrix pattern so that the marking areas are marked in correspondence to locations of identified defective circuit board units of the circuit board units. An operator can readily put a defective mark on the indicator without any confusion. The operator or a sensor can readily recognize the defective mark. Since the indicator can be formed on the circuit board unit, the integration of the semiconductor package circuit board can be increased, and the productivity can be substantially improved. Furthermore, a pathway of the sensor can be reduced, and interferences that might occur if the sensor moves can be hindered.

Abstract translation: 半导体封装电路板具有用于指定有缺陷的电路板单元的位置的指示器。 半导体封装电路板包括以逐个矩阵图案排列的电路板单元。 指示器具有以逐一矩阵图案排列的标记区域，使得标记区域对应于电路板单元的识别的有缺陷的电路板单元的位置被标记。 操作员可以很容易地在指示器上放置有缺陷的标记，而不会有任何混淆。 操作员或传感器可以容易地识别缺陷标记。 由于可以在电路板单元上形成指示器，因此可以提高半导体封装电路板的集成度，并且可以显着提高生产率。 此外，可以减小传感器的路径，并且如果传感器移动可能会发生干扰。

公开(公告)号：US06967290B2

公开(公告)日：2005-11-22

申请号：US10231322

申请日：2002-08-30

Applicant: Takashi Abe

Inventor： Takashi Abe

IPC: H05K1/02 ,  H05K1/18 ,  H05K7/00 ,  H05K7/06

CPC classification number: H05K1/0266 ,  H05K1/029 ,  H05K1/18 ,  H05K2201/09127 ,  H05K2201/09927 ,  H05K2201/10204

Abstract: A circuit board permits common use of the same circuit board without separately manufacturing the circuit board per providing destinations when similar circuit boards are manufactured for a plurality of providing destinations in the same factory. The circuit board has at least a first providing destination indicating region on which a first providing destination is indicated and a second providing destination indicating region located adjacent the first providing destination indicating region and having a second providing destination indicated thereon, the providing destination indicating regions other than that indicating an intended providing destination being hidden by mounting parts thereon.

Abstract translation: 电路板允许在同一工厂中为多个提供目的地制造类似的电路板时，不需要在提供目的地的情况下单独制造电路板，因此可以通用同一电路板。 电路板至少具有指示第一提供目的地的第一提供目的地指示区域和位于与第一提供目的地指示区域相邻并且具有指示在其上的第二提供目的地的第二提供目的地指示区域，所述提供目的地指示区域其他 比指示预定的提供目的地通过在其上安装部件而被隐藏的那样。

公开(公告)号：US20050205642A1

公开(公告)日：2005-09-22

申请号：US11072275

申请日：2005-03-07

Applicant: Duck-kyun Kim

Inventor： Duck-kyun Kim

IPC: H05K3/34 ,  B23K1/00 ,  B23K31/12 ,  B23K37/00 ,  H05K1/02 ,  H05K3/00 ,  H05K3/22 ,  H05K13/08

CPC classification number: H05K1/0266 ,  B23K1/0016 ,  B23K31/125 ,  B23K2101/42 ,  H05K3/225 ,  H05K2201/09927

Abstract: A manufacturing system to mount at least one component on a PCB includes a keeping part to keep the PCB, an input part to which a user inputs manufacturing information on the PCB, a display to display image data, a mount state detector to detect a mount state of the component, and a rework controller to determine whether the mount state is defective by comparing the detected result of the mount state detector with a predetermined propriety reference to store information on the defective mount state and to keep the PCB having the defective mount state in the keeping part and to display image data corresponding to the information of the defective mount state on the display if the manufacturing information on the PCB kept in the keeping part is input through the input part.

Abstract translation: 一种用于在PCB上安装至少一个部件的制造系统包括保持部件以保持PCB，用户输入PCB上的制造信息的输入部件，显示图像数据的显示器，用于检测安装件的安装状态检测器 状态，以及返工控制器，通过将安装状态检测器的检测结果与预定的适当基准进行比较来确定安装状态是否有缺陷，以存储有缺陷安装状态的信息并保持PCB具有缺陷安装状态 并且如果通过输入部分输入保持在保持部分中的PCB上的制造信息，则在显示器上显示与缺陷安装状态的信息相对应的图像数据。

公开(公告)号：US06817527B2

公开(公告)日：2004-11-16

申请号：US10187471

申请日：2002-06-28

Applicant: Petri Hellberg ,  Jukka Tiilikainen ,  Juha Penttinen

Inventor： Petri Hellberg ,  Jukka Tiilikainen ,  Juha Penttinen

IPC: G06K710

CPC classification number: H05K1/0266 ,  H05K1/181 ,  H05K3/303 ,  H05K13/046 ,  H05K2201/09927

Abstract: The invention relates to preparations, a component tape and a component tape reel for marking printed circuit boards with respective unique identification codes. Carriers with respective unique identification codes printed thereon are packaged and provided in such way that the carriers can be mounted on respective circuit boards by an automated component mounting process. Thus, the invention enables a surface mount placement system to pick the carriers for placement on respective circuit boards, thereby marking the circuit boards with respective unique identification codes in a fully automated manner.

公开(公告)号：US5740066A

公开(公告)日：1998-04-14

申请号：US497974

申请日：1995-07-03

Applicant: Anthony J. Suppelsa ,  Anthony B. Suppelsa ,  Henry F. Liebman ,  John M. Cook

Inventor： Anthony J. Suppelsa ,  Anthony B. Suppelsa ,  Henry F. Liebman ,  John M. Cook

IPC: G06K19/06 ,  H05K1/02 ,  H05K1/11 ,  H05K1/00

CPC classification number: G06K19/06018 ,  H05K1/0266 ,  G06K2019/06253 ,  H05K1/117 ,  H05K2201/09781 ,  H05K2201/09927

Abstract: An electrical circuit board (100) includes a substrate (101) on which a metallized bar code pattern (104) is disposed. The substrate (101) further includes an electrical circuit metallization pattern (103) which incorporates at least a portion of the metallized bar code pattern (104).

Abstract translation: 电路板（100）包括其上设置金属化条形码图案（104）的基板（101）。 衬底（101）还包括电路金属化图案（103），其包括金属化条形码图案（104）的至少一部分。

公开(公告)号：US4947335A

公开(公告)日：1990-08-07

申请号：US243346

申请日：1988-09-12

Applicant: Frank H. Blitchington

Inventor： Frank H. Blitchington

IPC: B23Q41/08 ,  B07C5/34 ,  G05B19/418 ,  G06K7/10 ,  G07C3/00 ,  H05K1/02

CPC classification number: G06K7/10861 ,  B07C5/3412 ,  G07C3/00 ,  H05K1/0266 ,  H05K2201/09063 ,  H05K2201/09927 ,  Y02P90/10

Abstract: Disclosed is a method and apparatus for identifying the lot codes of workpieces, such as printed circuit board panels, as they progress down a manufacturing line. At an initial stage of processing, a hole pattern is drilled along one edge of the pieces. The hole pattern includes the lot code number of that piece in binary form. The hole pattern can be addressed by appropriate optical means such as an LED-phototransistor combination or by a video camera as the pieces pass by in order to determine the lot code or other information at any desired point in the processing.

Abstract translation: 公开了一种用于识别工件批号的方法和装置，例如印刷电路板面板，因为其沿制造线向下进行。 在加工的初始阶段，沿着件的一个边缘钻出孔图案。 孔图案包括二进制形式的该片的批号。 通过诸如LED-光电晶体管组合的合适的光学装置或通过摄像机通过视频照相机来处理孔图案，以便在处理中的任何所需点确定批号或其他信息。

公开(公告)号：US4853317A

公开(公告)日：1989-08-01

申请号：US177131

申请日：1988-04-04

Applicant: Donald J. Hayes

Inventor： Donald J. Hayes

IPC: G03F1/00 ,  H05K1/00 ,  H05K1/02 ,  H05K3/00 ,  H05K3/06

CPC classification number: G03F7/2018 ,  H05K1/0266 ,  H05K3/0082 ,  H05K1/0393 ,  H05K2201/09781 ,  H05K2201/09927 ,  H05K2201/09936 ,  H05K2203/013 ,  H05K2203/0551 ,  H05K3/064

Abstract: A method and apparatus for providing serialization of printed circuit boards and flex circuits during the normal process of manufacture of the boards and circuits is disclosed and includes a print module which prints the serializing information on the surface of the photoresist material with a fluid, which blocks the passage of ultraviolet radiation, before the photoresist material is exposed to ultraviolet radiation through the photomask. If a negative-acting photoresist material is used, the serializing information is reverse printed on the surface of the negative-acting photoresist material. If a positive-acting photoresist material is used, the serializing information is printed on the surface of the positive-acting photoresist material.

Abstract translation: 公开了一种用于在板和电路的正常制造过程中提供印刷电路板和柔性电路串联化的方法和装置，其包括印刷模块，该印刷模块用流体将光致抗蚀剂材料的表面上的串行化信息打印， 在光致抗蚀剂材料通过光掩模暴露于紫外线辐射之前紫外线辐射的通过。 如果使用负性光致抗蚀剂材料，则在负性光致抗蚀剂材料的表面上反向印刷串行化信息。 如果使用正性光致抗蚀剂材料，则将序列化信息印刷在正性光致抗蚀剂材料的表面上。