公开(公告)号：US20150130647A1

公开(公告)日：2015-05-14

申请号：US14538212

申请日：2014-11-11

申请人： Kabushiki Kaisha Toshiba

发明人： Tetsuro ITAKURA ,  Masanori FURUTA ,  Akihide SAI ,  Junya MATSUNO ,  Yohei HATAKEYAMA

IPC分类号： H03M1/00 ,  H03M1/06 ,  H03F3/16 ,  G06G7/184 ,  H03F3/45

CPC分类号： H03M1/002 ,  H03F3/45273 ,  H03F2200/267 ,  H03F2200/91 ,  H03F2203/45034 ,  H03M1/00 ,  H03M1/0604 ,  H03M1/12 ,  H03M1/365

摘要： In one embodiment, a current amplifier circuit includes a first transistor, a first resistor, a second transistor, a second resistor, a first passive element, and a control circuit. The first transistor has a first terminal, a second terminal, and a control terminal. The first resistor has one end connected to the first terminal of the first transistor. The second transistor has a first terminal, a second terminal, and a control terminal. The second resistor has one end connected to the first terminal of the second transistor. The first passive element is connected between the first terminals of the first transistor and the second transistor. The control circuit controls at least one of voltage at the control terminals of the first transistor and the second transistor such that the voltage at the other end of the first resistor becomes equal to the voltage at the other end of the second resistor.

摘要翻译： 在一个实施例中，电流放大器电路包括第一晶体管，第一电阻器，第二晶体管，第二电阻器，第一无源元件和控制电路。 第一晶体管具有第一端子，第二端子和控制端子。 第一电阻器的一端连接到第一晶体管的第一端子。 第二晶体管具有第一端子，第二端子和控制端子。 第二电阻器的一端连接到第二晶体管的第一端子。 第一无源元件连接在第一晶体管的第一端子和第二晶体管之间。 控制电路控制第一晶体管和第二晶体管的控制端的电压中的至少一个，使得第一电阻的另一端的电压变得等于第二电阻的另一端的电压。

公开(公告)号：US20150022267A1

公开(公告)日：2015-01-22

申请号：US13943444

申请日：2013-07-16

申请人： ANALOG DEVICES, INC.

发明人： Scott A. Wurcer

IPC分类号： H03F3/45

CPC分类号： H03F3/45273 ,  H03F1/26 ,  H03F1/34 ,  H03F3/087 ,  H03F3/45475 ,  H03F2200/261 ,  H03F2203/45138

摘要： Apparatus and methods for electronic amplification are provided. In one embodiment, an amplifier includes first and second input terminals, an amplification circuit, a feedback circuit, and a current mirror. The amplification circuit includes a non-inverting voltage input electrically connected to the first input terminal and to a bias voltage, an inverting voltage input electrically connected to the second input terminal, a voltage output, and a current output. The amplifier includes a first feedback path from the voltage output to the inverting voltage input through the feedback circuit and a second feedback path from the current output to the inverting voltage input through the current mirror, which can mirror a current from the current output to generate a mirrored current. A current source such as a transducer can provide an input current between the first and second input terminals, and the mirrored current can substantially match the input current.

摘要翻译： 提供了用于电子放大的装置和方法。 在一个实施例中，放大器包括第一和第二输入端子，放大电路，反馈电路和电流镜。 放大电路包括电连接到第一输入端子和偏置电压的非反相电压输入，电连接到第二输入端子的反相电压输入，电压输出和电流输出。 放大器包括从电压输出到通过反馈电路输入的反相电压的第一反馈路径以及从电流输出到通过电流镜输入的反相电压的第二反馈路径，其可以反映来自电流输出的电流以产生 一个镜像的电流。 诸如换能器的电流源可以在第一和第二输入端之间提供输入电流，并且镜像电流可以基本上匹配输入电流。

公开(公告)号：US20150015334A1

公开(公告)日：2015-01-15

申请号：US14500236

申请日：2014-09-29

申请人： SuVolta, Inc.

发明人： Lawrence T. Clark ,  Scott E. Thompson

IPC分类号： H03F3/45

CPC分类号： H03F3/45179 ,  H03F3/45 ,  H03F3/45071 ,  H03F3/45183 ,  H03F3/45273 ,  H03F2200/375 ,  H03F2203/45344 ,  H03F2203/45454 ,  H03F2203/45506 ,  H03F2203/45674 ,  H03F2203/45676

摘要： Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.

摘要翻译： 公开了可以包括多个具有耦合在至少第一和第二节点之间的可控电流路径的晶体管的晶体管，其被配置为响应于模拟输入值产生模拟电输出信号; 其中所述晶体管中的至少一个具有在其栅极下方形成的深耗尽沟道，其包括在掺杂体区域上形成的相对高掺杂的屏蔽层上形成的基本上未掺杂的沟道区。

公开(公告)号：US08902005B2

公开(公告)日：2014-12-02

申请号：US13626512

申请日：2012-09-25

申请人： Quan Wan

发明人： Quan Wan

IPC分类号： H03F3/45

CPC分类号： H03F3/45 ,  H03F3/4521 ,  H03F3/45273 ,  H03F3/45475 ,  H03F3/45632 ,  H03F2200/186 ,  H03F2203/45101 ,  H03F2203/45648

摘要： Apparatus and methods reduce increase the common mode range of a difference amplifier. A circuit uses one or more floating powers and one or more floating grounds coupled to an input stage of an amplifier to increase the common mode range of a difference amplifier. The floating power can be configured to select from the greater of the voltage level of one of the differential signals and the system power high source. The floating ground can be configured to select from the lesser of the voltage level of one of the differential signals and the system power low source.

摘要翻译： 装置和方法降低差分放大器的共模范围。 电路使用一个或多个浮置功率和耦合到放大器的输入级的一个或多个浮置地，以增加差分放大器的共模范围。 浮动功率可以配置为从差分信号和系统电源高电平之一的较大电压电平中进行选择。 浮动接地可以配置为从差分信号之一和系统电源低电平的较低电压电平中进行选择。

公开(公告)号：US20130154739A1

公开(公告)日：2013-06-20

申请号：US13770482

申请日：2013-02-19

申请人： Lawrence T. Clark ,  Scott E. Thompson

发明人： Lawrence T. Clark ,  Scott E. Thompson

IPC分类号： H03F3/45

CPC分类号： H03F3/45179 ,  H03F3/45 ,  H03F3/45071 ,  H03F3/45183 ,  H03F3/45273 ,  H03F2200/375 ,  H03F2203/45344 ,  H03F2203/45454 ,  H03F2203/45506 ,  H03F2203/45674 ,  H03F2203/45676

摘要： Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.

公开(公告)号：US20130093518A1

公开(公告)日：2013-04-18

申请号：US13692193

申请日：2012-12-03

申请人： Tekcem

发明人： Frederic BROYDE ,  Evelyne CLAVELIER

IPC分类号： H03F3/45

CPC分类号： H03F3/45 ,  H03F3/45183 ,  H03F3/45237 ,  H03F3/45273 ,  H03F2203/45322 ,  H03F2203/45344 ,  H03F2203/45476 ,  H03F2203/45648

摘要： The invention relates to a current-sensing differential amplifier having a balanced input.A balanced-input current-sensing differential amplifier of the invention has a first signal input terminal, a second signal input terminal, a first signal output terminal and a second signal output terminal. The balanced-input current-sensing differential amplifier comprises a first current mirror, the input terminal of the first current mirror being coupled to the first signal input terminal, a second current mirror, the input terminal of the second current mirror being coupled to the second signal input terminal, a third current mirror, one of the output terminals of the third current mirror being coupled to the common terminal of the first current mirror and to the common terminal of the second current mirror, three current sources and an output circuit.

摘要翻译： 本发明涉及一种具有平衡输入的电流感测差动放大器。 本发明的平衡输入电流检测差分放大器具有第一信号输入端，第二信号输入端，第一信号输出端和第二信号输出端。 平衡输入电流感测差分放大器包括第一电流镜，第一电流镜的输入端耦合到第一信号输入端，第二电流镜，第二电流镜的输入端耦合到第二电流镜 信号输入端子，第三电流镜，第三电流镜的输出端之一耦合到第一电流镜的公共端和第二电流镜的公共端，三个电流源和输出电路。

公开(公告)号：US08195104B2

公开(公告)日：2012-06-05

申请号：US12643373

申请日：2009-12-21

申请人： Ranieri Guerra ,  Giuseppe Palmisano

发明人： Ranieri Guerra ,  Giuseppe Palmisano

IPC分类号： H04B1/04

CPC分类号： H03F3/45273 ,  H03F3/3022 ,  H03F3/45183 ,  H03F2203/45008 ,  H03F2203/45481 ,  Y10T29/49826

摘要： The disclosure relates to an electronic differential amplification device integrated on a semiconductor chip. The device may include first and second transistors having respective source terminals connected to a first potential, and drain terminals to receive a first differential current signal. The device may include third and fourth transistors having respective source terminals connected to the first potential, and drain terminals to provide a second differential current signal to a load obtained by amplifying the first signal. The third and fourth transistors may have a respective gate terminal connected to the drain terminal of the first and the second transistors, respectively, in order to form current mirrors with the latter. The device is characterized in that the first and second transistors may have the respective gate terminals electrically connected to a common terminal, and at least one first and at least one second resistive elements are connected between the common terminal and the drain terminals of the first and the second transistors, respectively.

摘要翻译： 本公开涉及集成在半导体芯片上的电子差分放大装置。 器件可以包括具有连接到第一电位的相应源极端子的第一和第二晶体管以及用于接收第一差分电流信号的漏极端子。 器件可以包括具有连接到第一电位的相应源极端子的第三和第四晶体管，以及用于通过放大第一信号而获得的负载来提供第二差分电流信号的漏极端子。 第三和第四晶体管可以具有相应的栅极端子，分别连接到第一和第二晶体管的漏极端子，以便与后者形成电流镜。 该器件的特征在于，第一和第二晶体管可以具有电连接到公共端子的相应的栅极端子，并且至少一个第一和至少一个第二电阻元件连接在第一和第二晶体管的公共端子和漏极端子之间， 第二晶体管。

公开(公告)号：US07705677B2

公开(公告)日：2010-04-27

申请号：US12176836

申请日：2008-07-21

申请人： Leonard Forbes ,  David R. Cuthbert

发明人： Leonard Forbes ,  David R. Cuthbert

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F1/08 ,  H03F1/14 ,  H03F3/45273 ,  H03F2203/45264 ,  H03F2203/45332

摘要： The frequency and transient responses of a CMOS differential amplifier are improved by employing one or more compensating capacitors. A compensating capacitor coupled to a differential input of the CMOS differential amplifier is used to inject current into the differential input, such that the net current flow through the gate-to-drain capacitance of a MOS input transistor approaches zero. Thus, the Miller effect with respect to that MOS input transistor is substantially reduced or eliminated, resulting in increased frequency and transient responses for the CMOS differential amplifier. In one embodiment, the CMOS differential amplifier is a CMOS current mirror differential amplifier.

摘要翻译： CMOS差分放大器的频率和瞬态响应通过采用一个或多个补偿电容来改善。 耦合到CMOS差分放大器的差分输入的补偿电容器用于将电流注入到差分输入端中，使得通过MOS输入晶体管的栅 - 漏电容的净电流流过零。 因此，相对于该MOS输入晶体管的米勒效应被显着降低或消除，导致CMOS差分放大器的频率和瞬态响应增加。 在一个实施例中，CMOS差分放大器是CMOS电流镜差分放大器。

公开(公告)号：US20090058469A1

公开(公告)日：2009-03-05

申请号：US11847973

申请日：2007-08-30

申请人： James G. Hiller ,  Paul M. Werking

发明人： James G. Hiller ,  Paul M. Werking

IPC分类号： H03F3/45

CPC分类号： H03F3/45273 ,  H03F2200/78 ,  H03F2200/91

摘要： Methods and systems are provided for comparing currents. The method includes driving a first current through a first X leg of a first current conveyor circuit and a second current through a second X leg of a second current conveyor circuit. The method further includes draining a third current from a first X terminal of the first current conveyor circuit to produce a first positive transistor current and a first negative transistor current, and draining a fourth current from a second X terminal of the second current conveyor circuit to produce a second positive transistor current and a second negative transistor current. The method further includes summing the first positive transistor current and the second negative transistor current to produce a first current output, the first negative transistor current and the second positive transistor current to produce a second current output, and the first current output and the second current output to produce a summed current output.

摘要翻译： 提供了比较电流的方法和系统。 该方法包括驱动第一电流通过第一电流输送电路的第一X支脚和通过第二电流输送电路的第二X支路的第二电流。 该方法还包括从第一当前输送机电路的第一X端排出第三电流以产生第一正晶体管电流和第一负晶体管电流，并将第四电流从第二电流输送电路的第二X端排出到 产生第二正晶体管电流和第二负晶体管电流。 该方法还包括对第一正晶体管电流和第二负晶体管电流求和以产生第一电流输出，第一负晶体管电流和第二正晶体管电流以产生第二电流输出，以及第一电流输出和第二电流 输出以产生总和电流输出。

公开(公告)号：US07483306B2

公开(公告)日：2009-01-27

申请号：US11670626

申请日：2007-02-02

申请人： Yung Feng Lin

发明人： Yung Feng Lin

IPC分类号： G11C16/06 ,  G11C7/02

CPC分类号： G11C7/062 ,  G11C16/28 ,  G11C2207/063 ,  H03F3/45273 ,  H03F2200/462 ,  H03F2200/91 ,  H03F2203/45096 ,  H03F2203/45098

摘要： A memory sensing circuit and method that can achieve both a wide read margin and a fast read time. Roughly described, a target cell draws a target cell current from a first node when selected. The target cell current depends on the charge level stored in the target cell. A reference cell draws a reference cell current from a second node when selected, and a current difference generator generates into a third node a third current flow positively dependent upon the difference between the target cell current and the reference cell current. The current difference generator also generates into a fourth node a fourth current flow negatively dependent upon the difference between the target cell current and the reference cell current. A sense amplifier has its first input connected to the third node and a second input connected to the fourth node.

摘要翻译： 一种可以实现宽读取余量和快速读取时间的存储器感测电路和方法。 粗略描述，当选择时，目标单元从第一节点绘制目标单元电流。 目标单元电流取决于存储在目标单元中的电荷水平。 当选择时，参考单元从第二节点绘制参考单元电流，并且电流差分发生器产生正向依赖于目标单元电流和参考单元电流之间的差的第三电流。 电流差分发生器还将第四电流流向第四节点产生负值，这取决于目标单元电流和参考单元电流之间的差异。 读出放大器的第一输入连接到第三节点，第二输入连接到第四节点。