公开(公告)号：US07751264B1

公开(公告)日：2010-07-06

申请号：US12082760

申请日：2008-04-14

申请人： Albert Wu ,  Sehat Sutardja

发明人： Albert Wu ,  Sehat Sutardja

IPC分类号： G11C7/00

CPC分类号： G06F11/0793 ,  G06F11/073 ,  G11C29/789

摘要： An integrated circuit (IC) comprises a memory module that stores at least one of data and code. A memory repair database stores data relating to defective memory addresses. A memory control module detects defective memory locations in the memory module, locates redundant memory elements in the memory module, and stores information that associates memory addresses of the defective memory locations with the redundant memory elements in the memory repair database. Storing said information includes electrically altering at least one of a plurality of electrical fuses. A redundant memory decoder module receives the information and physically remaps the memory addresses to the redundant memory locations.

摘要翻译： 集成电路（IC）包括存储数据和代码中的至少一个的存储器模块。 存储器修复数据库存储与缺陷存储器地址有关的数据。 存储器控制模块检测存储器模块中的缺陷存储器位置，将冗余存储器元件定位在存储器模块中，并且存储将缺陷存储器位置的存储器地址与冗余存储器元件关联在存储器修复数据库中的信息。 存储所述信息包括电改变多个电保险丝中的至少一个。 冗余存储器解码器模块接收信息并将存储器地址物理地映射到冗余存储器位置。

公开(公告)号：US20100140760A1

公开(公告)日：2010-06-10

申请号：US12628059

申请日：2009-11-30

申请人： Nelson Tam ,  Albert Wu ,  Chien-Chuan Wei

发明人： Nelson Tam ,  Albert Wu ,  Chien-Chuan Wei

IPC分类号： H01L23/556 ,  H01L21/56

CPC分类号： H01L21/56 ,  H01L21/563 ,  H01L23/556 ,  H01L24/03 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05073 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2224/05552 ,  H01L2924/00

摘要： Embodiments of the present disclosure provide an apparatus including a semiconductor die having a plurality of integrated circuit devices, a pad structure electrically coupled to at least one integrated circuit device of the plurality of integrated circuit devices via an interconnect layer, an electrically insulative layer disposed on the interconnect layer, a first shielding structure disposed in the electrically insulative layer and electrically coupled to the pad structure, an under-ball metallization (UBM) structure electrically coupled to the first shielding structure, and a solder bump electrically coupled to the UBM structure, the solder bump comprising a solder bump material capable of emitting alpha particles, wherein the first shielding structure is positioned between the solder bump and the plurality of integrated circuit devices to shield the plurality of integrated circuit devices from the alpha particles. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例提供了一种包括具有多个集成电路器件的半导体管芯的器件，通过互连层电耦合到多个集成电路器件中的至少一个集成电路器件的焊盘结构，设置在多个集成电路器件上的电绝缘层 所述互连层，设置在所述电绝缘层中并电耦合到所述焊盘结构的第一屏蔽结构，电耦合到所述第一屏蔽结构的球下金属化（UBM）结构以及电耦合到所述UBM结构的焊料凸块， 所述焊料凸块包括能够发射α粒子的焊料凸块材料，其中所述第一屏蔽结构位于所述焊料凸块和所述多个集成电路器件之间，以将所述多个集成电路器件与所述α粒子进行屏蔽。 可以描述和/或要求保护其他实施例。

公开(公告)号：US07622731B2

公开(公告)日：2009-11-24

申请号：US11709631

申请日：2007-02-22

申请人： Pantas Sutardja ,  Albert Wu

发明人： Pantas Sutardja ,  Albert Wu

IPC分类号： H01L47/00

CPC分类号： H01L27/2409 ,  G11C13/0004 ,  G11C2213/72 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/141

摘要： A circuit comprises a bulk silicon integrated circuit (IC). A first metallization layer is arranged adjacent to said bulk silicon IC. Phase change memory (PCM) is arranged adjacent to said first metallization layer and comprises a plurality of PCM cells each including a phase-change material, a heater that selectively heats said phase-change material, and a diode in series with said phase-change material.

摘要翻译： 电路包括体硅集成电路（IC）。 第一金属化层被布置成与所述体硅IC相邻。 相变存储器（PCM）被布置为与所述第一金属化层相邻并且包括多个PCM单元，每个PCM单元包括相变材料，选择性地加热所述相变材料的加热器和与所述相变量串联的二极管 材料。

公开(公告)号：US20090017593A1

公开(公告)日：2009-01-15

申请号：US12171173

申请日：2008-07-10

申请人： Albert Wu ,  Runzi Chang

发明人： Albert Wu ,  Runzi Chang

IPC分类号： H01L21/76

CPC分类号： H01L21/76224 ,  H01L21/30608 ,  H01L21/3083 ,  H01L21/76232

摘要： Methods for rounding the bottom corners of a shallow trench isolation structure are described herein. Embodiments of the present invention provide a method comprising forming a first masking layer on a sidewall of an opening in a substrate, removing, to a first depth, a first portion of the substrate at a bottom surface of the opening having the first masking layer therein, forming a second masking layer on the first masking layer in the opening, and removing, to a second depth, a second portion of the substrate at the bottom surface of the opening having the first and second masking layers therein. Other embodiments also are described.

摘要翻译： 本文描述了用于使浅沟槽隔离结构的底角倒圆的方法。 本发明的实施方案提供了一种方法，包括在基板的开口的侧壁上形成第一掩模层，在其第一掩蔽层的开口的底表面处移除第一深度到基板的第一部分 在所述开口中的所述第一掩蔽层上形成第二掩蔽层，以及在所述第一和第二掩蔽层的所述开口的底表面处，将所述基板的第二部分移除到第二深度。 还描述了其它实施例。

公开(公告)号：US20080185570A1

公开(公告)日：2008-08-07

申请号：US12024986

申请日：2008-02-01

申请人： Albert Wu ,  Chien-Chuan Wei

发明人： Albert Wu ,  Chien-Chuan Wei

IPC分类号： H01L45/00

CPC分类号： H01L45/144 ,  H01L27/2445 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1675

摘要： Methods for fabricating highly compact PCM memory devices are described herein. The methods may include forming a bipolar junction transistor (BJT) structure on a substrate including creating a base of the BJT structure on the substrate and creating an emitter of the BJT structure on top of the base opposite of the substrate. A heating element may then be constructed on the emitter of the BJT structure, wherein the heating element includes a material to generate heat when provided with an electrical current from the emitter. A phase change material (PCM) cell may then be built on the heating element opposite of the BJT structure.

摘要翻译： 本文描述了用于制造高度紧凑的PCM存储器件的方法。 所述方法可以包括在衬底上形成双极结型晶体管（BJT）结构，包括在衬底上形成BJT结构的基底，并在与衬底相对的基底的顶部上形成BJT结构的发射极。 然后可以在BJT结构的发射器上构造加热元件，其中，当提供来自发射器的电流时，加热元件包括产生热量的材料。 然后可以在与BJT结构相对的加热元件上建立相变材料（PCM）单元。

公开(公告)号：US07344924B1

公开(公告)日：2008-03-18

申请号：US11136925

申请日：2005-05-24

申请人： Chuan-Cheng Cheng ,  Shuhua Yu ,  Roawen Chen ,  Albert Wu

发明人： Chuan-Cheng Cheng ,  Shuhua Yu ,  Roawen Chen ,  Albert Wu

IPC分类号： H01L21/82

CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： A fuse structure, an integrated circuit including the structure, and methods for making the structure and (re)configuring a circuit using the fuse. The fuse structure generally includes (a) a conductive structure with at least two circuit elements electrically coupled thereto, (b) a dielectric layer over the conductive structure, and (c) a first lens over both the first dielectric layer and the conductive structure configured to at least partially focus light onto the conductive structure. The method of making the structure generally includes the steps of (1) forming a conductive structure electrically coupled to first and second circuit elements, (2) forming a dielectric layer thereover, and (3) forming a lens on or over the dielectric layer and over the conductive structure, the lens being configured to at least partially focus light onto the conductive structure. The method of (re)configuring a circuit generally includes the steps of (i) irradiating at least one lens on or near a surface of the circuit sufficient to electrically disconnect a corresponding first fuse positioned under the lens and disable a first configuration of the circuit, and (ii) irradiating at least one other lens on or near the surface of the circuit sufficient to electrically disconnect a corresponding second fuse positioned under that lens and enable a second configuration of the circuit. The structure and methods advantageously provide fuse structures having improved reliability and smaller chip area, thereby increasing the yield of the manufacturing process and the numbers of die per wafer (both gross and good).

摘要翻译： 保险丝结构，包括该结构的集成电路，以及使用该保险丝的结构和（重新）配置电路的方法。 熔丝结构通常包括（a）具有至少两个电耦合到其上的电路元件的导电结构，（b）导电结构上的电介质层，和（c）第一介电层和导电结构上的第一透镜， 以至少部分地将光聚焦到导电结构上。 制造该结构的方法通常包括以下步骤：（1）形成电耦合到第一和第二电路元件的导电结构，（2）在其上形成介电层，和（3）在电介质层上或之上形成透镜， 在导电结构之上，透镜被配置为至少部分地将光聚焦到导电结构上。 （重新）配置电路的方法通常包括以下步骤：（i）在电路表面上或附近照射足够的电气断开位于透镜下方的对应的第一保险丝的至少一个透镜，并且禁用电路的第一配置 ，以及（ii）在该电路表面上或其附近照射至少一个其他透镜，足以使位于该透镜下方的对应的第二保险丝电气断开并使电路能够进行第二配置。 该结构和方法有利地提供具有改善的可靠性和更小的芯片面积的熔丝结构，从而提高制造工艺的产量和每个晶片的模具数量（总和良好）。

公开(公告)号：US20070183173A1

公开(公告)日：2007-08-09

申请号：US11348367

申请日：2006-02-07

申请人： Albert Wu

发明人： Albert Wu

IPC分类号： H02J1/10

CPC分类号： H02M3/157

摘要： A voltage regulator provides a regulated output load voltage at either a positive level or an inverted level relative to an input supply voltage. A switching circuit and control circuit are formed on an integrated circuit having a single pin for coupling to regulator feedback signal. The feedback signal is applied directly to the feedback pin during both positive voltage level regulation and inverted voltage level regulation. The feedback signal may be produced by a feedback circuit comprising an impedance element formed in the integrated circuit.

摘要翻译： 电压调节器提供相对于输入电源电压处于正电平或反相电平的稳压输出负载电压。 开关电路和控制电路形成在具有用于耦合到调节器反馈信号的单个引脚的集成电路上。 在正电压电平调节和反相电压调节期间，反馈信号直接施加到反馈引脚。 反馈信号可以由包括在集成电路中形成的阻抗元件的反馈电路产生。

公开(公告)号：US20070145957A1

公开(公告)日：2007-06-28

申请号：US11316993

申请日：2005-12-27

申请人： Albert Wu ,  Steven Pietkiewicz

发明人： Albert Wu ,  Steven Pietkiewicz

IPC分类号： G05F1/00

CPC分类号： H02M3/1563 ,  H02M2001/0032 ,  H02M2001/0035 ,  Y02B70/16

摘要： A converter coupled to a DC voltage input and connectable to a load, includes a signal responsive switch coupled between a first circuit point and a second circuit point. In lieu of burst mode operation during low load conditions, the peak switch current is varied directly with load condition and a switch deactivation interval is varied inversely with load condition. The switch deactivation level is within a maximum level to avoid audio frequency band interference, while maintaining high efficiency operation throughout the load range.

摘要翻译： 耦合到DC电压输入并可连接到负载的A转换器包括耦合在第一电路点和第二电路点之间的信号响应开关。 代替低负载条件下的突发模式操作，峰值开关电流随负载状态直接变化，开关停用间隔与负载条件反向变化。 开关去激活电平处于最大电平以避免音频频带干扰，同时在整个负载范围内保持高效率运行。

公开(公告)号：US20070053250A1

公开(公告)日：2007-03-08

申请号：US11162131

申请日：2005-08-30

申请人： Albert Wu

发明人： Albert Wu

IPC分类号： G11B21/08 ,  G11B7/24

CPC分类号： G06F1/187 ,  G06F1/181

摘要： This invention is a mass storage system based on laser disc technology. While there are various laser discs players available, they are all aimed at serving an audio/visual entertainment purpose with no consideration given to the ability of this type of media to service the vast amount of data created in the information age. This invention will help users manage a vast laser disc collection, secure all information through backup, and make volumetric data truly portable.

摘要翻译： 本发明是基于激光盘技术的海量存储系统。 虽然有各种激光光盘播放器可用，但它们都是为了服务于音视频娱乐目的，没有考虑到这种类型的媒体能够服务于在信息时代创建的大量数据。 本发明将帮助用户管理庞大的激光光盘集合，通过备份保护所有信息，并使体积数据真正便携。

公开(公告)号：US20070030713A1

公开(公告)日：2007-02-08

申请号：US11347791

申请日：2006-02-03

申请人： Steven Pietkiewicz ,  Albert Wu

发明人： Steven Pietkiewicz ,  Albert Wu

IPC分类号： H02M7/02

CPC分类号： H02M3/33507 ,  H02M3/335 ,  H02M3/3385 ,  H05B41/30

摘要： The present invention provides a capacitor charging circuit that efficiently charges capacitive loads. In particular, circuits and techniques are preferably provided for using current from both the primary and secondary windings of a transformer to control ON-time and OFF-time of a switch. This arrangement preferably yields an adaptable ON-time and adaptable OFF-time switch that is capable of rapidly charging capacitor loads ranging from as low as zero volts to several hundred volts. The output voltage is preferably measured indirectly to prevent unnecessary power consumption. In addition, control circuitry can be provided to conserve power by ceasing the delivery of power to the capacitor load once the desired output voltage is reached. Control circuitry preferably operates an interrogation timer that periodically activates the power delivery cycle to maintain the capacitor output load in a constant state of readiness.

摘要翻译： 本发明提供一种对容性负载进行充电的电容器充电电路。 特别地，电路和技术优选地被提供用于使用来自变压器的初级和次级绕组的电流来控制开关的导通时间和关断时间。 这种布置优选地产生适应性的导通时间和适应性关断时间开关，其能够快速地从低至零伏至几百伏的电容器负载充电。 优选间接测量输出电压以防止不必要的功率消耗。 此外，一旦达到期望的输出电压，可以提供控制电路来节省电力以停止向电容器负载的电力输送。 控制电路优选地操作询问定时器，周期性地启动功率传递周期，以将电容器输出负载维持在恒定的准备状态。