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公开(公告)号：US20180358553A1
公开(公告)日：2018-12-13
申请号：US15832300
申请日：2017-12-05
CPC分类号： H01L45/1206 , G11C13/0002 , G11C13/004 , G11C13/0069 , G11C2013/005 , G11C2013/0052 , G11C2013/009 , G11C2013/0092 , H01L45/085 , H01L45/1226 , H01L45/1266 , H01L45/147 , H01L45/1608
摘要： A method of fabricating a memristive structure for symmetric modulation between resistance states is presented. The method includes forming a first electrode and a second electrode over an insulating substrate, forming an anode contacting the first and second electrodes, forming an ionic conductor over the anode, forming a cathode of the same material as the anode over the ionic conductor, forming a third electrode over the cathode, and enabling bidirectional transport of ions between the anode and cathode resulting in a resistance adjustment of the memristive structure, the anode and the cathode being formed from metastable mixed conducting materials with ion concentration dependent conductivity.
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公开(公告)号：US20180358552A1
公开(公告)日：2018-12-13
申请号：US15616320
申请日：2017-06-07
CPC分类号： H01L45/1206 , G11C13/0002 , G11C13/0011 , G11C13/004 , G11C13/0069 , G11C2013/005 , G11C2013/0052 , G11C2013/0066 , G11C2013/009 , G11C2013/0092 , G11C2213/53 , H01L45/085 , H01L45/1226 , H01L45/1266 , H01L45/147 , H01L45/16 , H01L45/1608
摘要： A method of fabricating a memristive structure for symmetric modulation between resistance states is presented. The method includes forming a first electrode and a second electrode over an insulating substrate, forming an anode contacting the first and second electrodes, forming an ionic conductor over the anode, forming a cathode of the same material as the anode over the ionic conductor, forming a third electrode over the cathode, and enabling bidirectional transport of ions between the anode and cathode resulting in a resistance adjustment of the memristive structure, the anode and the cathode being formed from metastable mixed conducting materials with ion concentration dependent conductivity.
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公开(公告)号：US20180247179A1
公开(公告)日：2018-08-30
申请号：US15441338
申请日：2017-02-24
IPC分类号： G06N3/04 , H01M10/0525 , H01M10/42
CPC分类号： G06N3/04 , G06N3/0454 , G06N3/0635 , G06N3/084 , H01C13/00 , H01M10/0525 , H01M10/425 , H01M10/44 , H01M2010/4271 , H02J7/0063 , H02J7/0072 , H02J2007/0067
摘要： A controllable resistive element and method for updating the resistance of the same includes a state device configured to provide a voltage-controlled resistance responsive to a voltage input. A battery is configured to apply a voltage to the voltage input of the state device based on a charge stored in the battery. A write device is configured to charge the battery responsive to a write signal. An erase device is configured to discharge the battery responsive to an erase signal.
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公开(公告)号：US20180138401A1
公开(公告)日：2018-05-17
申请号：US15852245
申请日：2017-12-22
发明人： Takashi Ando , Marwan H. Khater , Seyoung Kim , Hiroyuki Miyazoe
IPC分类号： H01L45/00
CPC分类号： H01L45/085 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1608
摘要： A memory includes a base oxide provided between a first electrode and a second electrode, and a multivalent oxide provided between the first electrode and the second electrode. The multivalent oxide switches between at least two oxidative states.
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公开(公告)号：US20180123034A1
公开(公告)日：2018-05-03
申请号：US15852290
申请日：2017-12-22
发明人： Takashi Ando , Marwan H. Khater , Seyoung Kim , Hiroyuki Miyazoe
IPC分类号： H01L45/00
CPC分类号： H01L45/085 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1608
摘要： A resistive random access memory (RRAM), including a first electrode, a base oxide being connected to the first electrode, and a multivalent oxide being connected to the base oxide layer. The multivalent oxide switches oxidative states.
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86.发明申请公开(公告)号：US20180053089A1
公开(公告)日：2018-02-22
申请号：US15242691
申请日：2016-08-22
发明人： Tayfun Gokmen , Seyoung Kim , Dennis M. Newns , Yurii A. Vlasov
CPC分类号： G06N3/0635 , G06N3/084
摘要： A resistive processing unit (RPU) that includes a pair of transistors connected in series providing an update function for a weight of a training methodology to the RPU, and a read transistor for reading the weight of the training methodology. In some embodiments, the resistive processing unit (RPU) further includes a capacitor connecting a gate of the read transistor to the air of transistors providing the update function for the resistive processing unit (RPU). The capacitor stores said weight of training methodology for the RPU.
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公开(公告)号：US20150243888A1
公开(公告)日：2015-08-27
申请号：US14710204
申请日：2015-05-12
发明人： Marinus J. Hopstaken , Jeehwan Kim , Seyoung Kim , Mark B. Ritter
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , H01L45/08 , H01L45/1233 , H01L45/1266 , H01L45/146 , H01L45/16 , H01L45/1608
摘要： A resistive switching device includes a first electrode and a transition metal oxide layer formed on the first electrode. An oxygen scavenging electrode is formed on the transition metal oxide wherein the oxygen scavenging electrode removes oxygen from the transition metal oxide layer to increase formation of oxygen vacancies in the transition metal oxide layer to enable a switching mode when a bias is applied between the first electrode and the oxygen scavenging electrode.
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88.发明申请公开(公告)号：US20150028279A1
公开(公告)日：2015-01-29
申请号：US13948723
申请日：2013-07-23
发明人： Marinus J. Hopstaken , Jeehwan Kim , Seyoung Kim , Mark B. Ritter
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , H01L45/08 , H01L45/1233 , H01L45/1266 , H01L45/146 , H01L45/16 , H01L45/1608
摘要： A resistive switching device includes a first electrode and a transition metal oxide layer formed on the first electrode. An oxygen scavenging electrode is formed on the transition metal oxide wherein the oxygen scavenging electrode removes oxygen from the transition metal oxide layer to increase formation of oxygen vacancies in the transition metal oxide layer to enable a switching mode when a bias is applied between the first electrode and the oxygen scavenging electrode.
摘要翻译： 电阻式开关器件包括形成在第一电极上的第一电极和过渡金属氧化物层。 在过渡金属氧化物上形成氧气清除电极，其中除氧电极从过渡金属氧化物层去除氧，以增加过渡金属氧化物层中的氧空位的形成，以便在第一电极之间施加偏压时实现切换模式 和氧气清除电极。
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公开(公告)号：US11741352B2
公开(公告)日：2023-08-29
申请号：US15242691
申请日：2016-08-22
发明人： Tayfun Gokmen , Seyoung Kim , Dennis M. Newns , Yurii A. Vlasov
摘要： A resistive processing unit (RPU) that includes a pair of transistors connected in series providing an update function for a weight of a training methodology to the RPU, and a read transistor for reading the weight of the training methodology. In some embodiments, the resistive processing unit (RPU) further includes a capacitor connecting a gate of the read transistor to the air of transistors providing the update function for the resistive processing unit (RPU). The capacitor stores said weight of training methodology for the RPU.
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90.发明授权公开(公告)号：US11682471B2
公开(公告)日：2023-06-20
申请号：US16885317
申请日：2020-05-28
CPC分类号： G11C29/886 , G11C13/0007 , G11C13/0069 , G11C13/0097 , H10B63/80 , H10N70/066 , H10N70/826 , H10N70/841 , G11C2013/0078 , G11C2213/15 , G11C2213/52
摘要： Provided are embodiments for method of fabricating a dual damascene crossbar array. The method includes forming a bottom electrode layer on a substrate and forming a first memory device on the bottom electrode layer. The method also includes forming a dual damascene structure on the first memory device, wherein the dual damascene structure includes a top electrode layer and a first via, wherein the first via is formed between the first memory device and the top electrode layer. Also provided are embodiments for the dual damascene crossbar and embodiments for disabling memory devices of the dual damascene crossbar array.
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