-
公开(公告)号：US20170140736A1
公开(公告)日：2017-05-18
申请号：US15350894
申请日：2016-11-14
Applicant: ARM Limited
Inventor： Daren Croxford , Damian Piotr Modrzyk , Piotr Tadeusz Chrobak
Abstract: A display controller 12 comprises a first display processing core 20 comprising a first input stage 21 operable to read at least one input surface, a first processing stage operable to process one or more input surfaces to generate an output surface, and a first output stage 26 operable to provide an output surface for display to a first display 6, and a second display processing core 40 comprising a second input stage 41 operable to read at least one input surface, a second processing stage operable to process one or more input surfaces to generate an output surface, and a second output stage 46 operable to provide an output surface for display to a second display 8. The display controller 12 also comprises an internal data path 30 for passing pixel data of an output surface from the second display core 40 to the first display core 20.
-
公开(公告)号：US09640131B2
公开(公告)日：2017-05-02
申请号：US14604872
申请日：2015-01-26
Applicant: ARM LIMITED
Inventor： Daren Croxford
CPC classification number: G09G3/3696 , G09G3/2003 , G09G3/2022 , G09G5/363 , G09G5/395 , G09G2310/063 , G09G2320/0252 , G09G2320/0285
Abstract: An overdrive engine generates output frames to be used to drive a display from input frames to be displayed. Each output frame is generated on a region by region basis from the corresponding regions of the input frames. If it is determined that an input frame region has changed significantly since the previous version(s) of the input frame, an overdriven version of the input frame region is generated for use as the corresponding region in the output frame. On the other hand, if it is determined that the input frame region has not changed since the previous version of the input frame, then the new input frame region is used without performing any form of overdrive process on it for the corresponding region in the output frame.
-
公开(公告)号：US09349156B2
公开(公告)日：2016-05-24
申请号：US13898510
申请日：2013-05-21
Applicant: ARM LIMITED
Inventor： Daren Croxford , Simon Jones , Oskar Flordal
CPC classification number: G06T1/60 , G09G5/391 , G09G5/393 , G09G5/395 , G09G2330/021 , G09G2340/02
Abstract: Image data is subject to compression and decompression when it is respectively written to and read from a frame buffer. If a portion of the image data is identified as static (subject to less than a threshold amount of change for greater than a threshold time), then compression control parameters used for compression of that portion of the image are adjusted so as to increase the compression ratio achieved, hold the degree of lossiness substantially constant and increase the energy consumed while compressing that portion. The increased energy consumption during this high compression ratio compression is likely compensated for by a reduction in energy subsequently consumed when writing that frame-buffer image data to the frame buffer and reading that frame-buffer image data multiple times from the frame buffer. The compression characteristics varied may be to increase the block size used in the compression. Other variations in compression applied may be to change from single-pass compression to multi-pass compression, switch compression on and off altogether, or reorder the data when it has been compressed so as to match the order it will be read and so achieve support for longer read burst.
Abstract translation: 当图像数据被分别写入帧缓冲器并从帧缓冲器读取时，其被压缩和解压缩。 如果图像数据的一部分被识别为静态（经受小于阈值的变化量大于阈值时间），则调整用于压缩该部分图像的压缩控制参数，以便增加压缩 比率达到，保持损耗程度基本上恒定，并增加在压缩该部分时消耗的能量。 在该高压缩比压缩期间增加的能量消耗可能通过将帧缓冲器图像数据写入帧缓冲器并从帧缓冲器多次读取该帧缓冲器图像数据而随后消耗的能量的减少来补偿。 压缩特性变化可能是增加在压缩中使用的块尺寸。 压缩应用的其他变化可能是从单程压缩转换为多遍压缩，完全切换压缩，或者在压缩数据时重新排序数据，以便匹配读取的顺序，从而实现支持 更长的读取脉冲串。
-
公开(公告)号：US20160005140A1
公开(公告)日：2016-01-07
申请号：US14790452
申请日：2015-07-02
Applicant: ARM Limited
Inventor： Andreas Engh-Halstvedt , Daren Croxford , Frank Langtind
IPC: G06T1/20
CPC classification number: G06T15/005
Abstract: A graphics processing pipeline (20) comprises first vertex shading circuitry (21) that operates to vertex shade position attributes of vertices of a set of vertices to be processed by the graphics processing pipeline. Tiling circuitry (22) then determines for the vertices that have been subjected to the first vertex shading operation, whether the vertices should be processed further. A second vertex shading circuitry (23) then performs a second vertex shading operation on the vertices that it has been determined should be processed further, to vertex shade the remaining vertex attributes for each vertex that it has been determined should be processed further.
Abstract translation: 图形处理流水线（20）包括第一顶点着色电路（21），其操作以由图形处理流水线处理的一组顶点的顶点的顶点颜色位置属性。 平铺电路（22）然后确定已经经受第一顶点着色操作的顶点，是否应进一步处理顶点。 然后，第二顶点着色电路（23）对顶点执行第二顶点着色操作，以确定应进一步处理顶点着色操作，以便顶点遮蔽其应确定的每个顶点的剩余顶点属性应进一步处理。
-
公开(公告)号：US09195426B2
公开(公告)日：2015-11-24
申请号：US14255395
申请日：2014-04-17
Applicant: ARM LIMITED
Inventor： Daren Croxford , Tom Cooksey , Lars Ericsson , Sean Tristram Ellis
CPC classification number: G06F3/14 , G06F1/3265 , G06F3/017 , G06F3/1415 , G06F9/451 , G09G5/14 , G09G5/393 , G09G2330/021 , G09G2340/10 , G09G2340/12 , G09G2360/122 , G09G2370/20 , Y02D10/153
Abstract: In a data processing system, an output surface, such as frame to be displayed, is generated as a plurality of respective regions with each respective region of the output surface being generated from a respective region or regions of one or more input surfaces. When a new version of the output surface is to be generated 80, for each region of the output surface it is determined which region or regions of the input surface or surfaces contribute to the region of the output surface 84 and then checked whether the contributing region or regions of the input surface or surfaces have changed since the previous version of the output surface region was generated 85. If there has been a change in the contributing region or regions of the input surface or surfaces since the previous version of the region in the output surface was generated 86, the region of the output surface is regenerated 87.
-
Patent Agency Ranking
公开(公告)号：US20150310791A1
公开(公告)日：2015-10-29
申请号：US14682321
申请日：2015-04-09
Applicant: ARM Limited
Inventor： Daren Croxford , Sean Tristram Ellis
CPC classification number: G09G5/10 , G09G3/34 , G09G5/393 , G09G2320/0626 , G09G2340/02 , G09G2350/00 , G09G2360/144 , G09G2360/16
Abstract: A data processing system 30 includes a CPU 33, a GPU 34, a video processing engine (video engine) 35, a display controller 36 (or an image processing engine) and a memory controller 313 all having access to off-chip memory 314. A frame to be displayed is generated by, for example, being appropriately rendered by the GPU 34 or video engine 35. The display controller 36 (or the image processing engine) then performs display modifications, such as luminance compensation, on the frame to provide an output frame for display.The display controller 36 (or the image processing engine) also provides display modification information (such as determined luminance compensation parameters) to the GPU 33 and video engine 34. The display modification information is then used to modify the data that is generated for a frame to be displayed.
Abstract translation: 数据处理系统30包括CPU 33，GPU 34，视频处理引擎（视频引擎）35，显示控制器36（或图像处理引擎）和存储器控制器313，它们都可以访问片外存储器314。 通过例如由GPU34或视频引擎35适当地呈现要产生的帧。然后，显示控制器36（或图像处理引擎）在帧上执行诸如亮度补偿的显示修改，以提供 用于显示的输出框架。 显示控制器36（或图像处理引擎）还向GPU 33和视频引擎34提供显示修改信息（例如确定的亮度补偿参数）。然后，显示修改信息用于修改为帧生成的数据 被显示。
-
公开(公告)号：US20250103383A1
公开(公告)日：2025-03-27
申请号：US18474579
申请日：2023-09-26
Applicant: Arm Limited
Inventor： Elliot Maurice Simon Rosemarine , Daren Croxford
IPC: G06F9/48
Abstract: According to the present techniques there is provided a method of operating a data processor unit to generate processing tasks. The data processor unit comprises a control circuit configured to receive, from a host processor unit, a request for the data processor unit to perform processing jobs and to generate a workload for each job. Each workload comprises one or more tasks. The data processor unit further comprises first and second execution units to process the workloads. The method comprises: receiving, at the control circuit, a request to perform first and second processing jobs; generating, at the control circuit in response to the request, a primary workload for the first processing job, and a secondary workload for the second processing job; generating, at the control circuit, one or more operation instructions to control processing of the primary and/or secondary workloads at the first and/or second execution units; processing, at the first execution unit, the primary workload in accordance with the operation instructions; and processing, at the second execution unit, the secondary workload in parallel with the primary workload in accordance with the operation instructions.
-
公开(公告)号：US20250068420A1
公开(公告)日：2025-02-27
申请号：US18734396
申请日：2024-06-05
Applicant: Arm Limited
Inventor： Daren Croxford , Sharjeel Saeed , Isidoros Sideris
Abstract: Data processing systems comprising a data processor, the data processor comprising an execution unit and storage for storing input data values for use by and/or output data values generated by the execution unit when executing instructions to perform data processing operations, and methods of control thereof, in which control of storage of data values for data source(s) of the storage is based on indication(s), in instruction(s) requiring use of data source(s) for a data processing operation, that one or more data values in the data source(s) are no longer required to be retained.
-
公开(公告)号：US20240193718A1
公开(公告)日：2024-06-13
申请号：US18503916
申请日：2023-11-07
Applicant: Arm Limited
Inventor： Daren Croxford , Frank Klaeboe Langtind , Robert William Genders
Abstract: A tiled-based graphics processor that comprises a plurality of tiling units is disclosed. The graphics processor includes an assigning circuit that assigns tiling units to sort geometry for initial regions of a render output that encompass plural primitive listing regions, and causes assigned tiling units to sort geometry for an initial region into primitive listing regions that the initial region encompasses.
-
公开(公告)号：US11948255B2
公开(公告)日：2024-04-02
申请号：US17650972
申请日：2022-02-14
Applicant: Arm Limited
Inventor： Daren Croxford , Roberto Lopez Mendez
IPC: G06T19/00 , G06F3/01 , G06T3/4046 , G06V10/764
CPC classification number: G06T19/006 , G06F3/013 , G06T3/4046 , G06V10/764 , G06T2207/10016
Abstract: An image processing system for an extended reality, XR, device comprising an eye-tracking subsystem, for determining a focus region of the eye, and a processor. The processor is configured to process application data to render image content for an application for display on the XR device, and obtain metadata indicating that a virtual object is to be generated as a hologram as part of the image content for display. Based on a determination that the virtual object belongs to a predetermined class of objects and is to be displayed in the focus region, the processor performs, using a neural network corresponding to the predetermined class of objects, foveated processing of the image content, including at least part of the hologram, such that relatively high-quality image content is generated for display in the focus region and relatively low-quality image content is generated for display outside the focus region.
-
-
-
-
-
-
-
-
-
Search Results
151
records
(took 0.023 seconds)
