公开(公告)号：US20100187676A1

公开(公告)日：2010-07-29

申请号：US12489626

申请日：2009-06-23

Applicant: Min Suk Suh ,  Seung Hyun Lee

Inventor： Min Suk Suh ,  Seung Hyun Lee

IPC: H01L23/498

CPC classification number: H01L23/481 ,  H01L24/17 ,  H01L24/24 ,  H01L24/29 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/14181 ,  H01L2224/14183 ,  H01L2224/16146 ,  H01L2224/24145 ,  H01L2224/29101 ,  H01L2224/32145 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/00

Abstract: A cube semiconductor package includes one or more stacked together and interconnected semiconductor chip modules. The cube semiconductor package includes a semiconductor chip module and connection members. The semiconductor chip module includes a semiconductor chip which has a first and second surface, side surfaces, bonding pads, through-electrodes and redistribution lines. The second surface faces away from the first surface. The side surfaces connect to the first and second surfaces. The bonding pads are placed on the first surface. The through-electrodes pass through the first and second surfaces. The redistribution lines are placed at least on one of the first and second surfaces and are electrically connected to the through-electrodes and the bonding pads, and have ends flush with the side surfaces. The connection members are placed on the side surfaces and electrically connected with the ends of the redistribution lines.

Abstract translation: 立体半导体封装包括一个或多个堆叠在一起并且互连的半导体芯片模块。 立方体半导体封装包括半导体芯片模块和连接构件。 半导体芯片模块包括具有第一和第二表面，侧表面，接合焊盘，通孔和再分配线的半导体芯片。 第二表面背离第一表面。 侧表面连接到第一和第二表面。 接合垫被放置在第一表面上。 贯通电极通过第一和第二表面。 再分布线至少放置在第一表面和第二表面中的一个上，并且电连接到通孔和接合焊盘，并且具有与侧表面齐平的端部。 连接构件放置在侧面上并与再分配线的端部电连接。

公开(公告)号：US07728419B2

公开(公告)日：2010-06-01

申请号：US11854067

申请日：2007-09-12

Applicant: Seung Hyun Lee ,  Seung Taek Yang

Inventor： Seung Hyun Lee ,  Seung Taek Yang

IPC: H01L23/48

CPC classification number: H01L24/10 ,  H01L23/3114 ,  H01L23/525 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05553 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16105 ,  H01L2224/81203 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  Y10S438/977 ,  H01L2924/00

Abstract: A semiconductor package includes a semiconductor chip provided with a first surface having a bonding pad, a second surface opposing to the first surface and side surfaces; a first redistribution pattern connected with the bonding pad and extending along the first surface from the bonding pad to an end portion of the side surface which meets with the second surface; and a second redistribution pattern disposed over the first redistribution pattern and extending from the side surfaces to the first surface. In an embodiment of the present invention, in which the first redistribution pattern connected with the bonding pad is formed over the semiconductor chip and the second redistribution pattern is formed over the first redistribution pattern, it is capable of reducing a length for signal transfer since the second redistribution pattern is used as an external connection terminal. It is also capable of processing data with high speed, as well as protecting the semiconductor chip having weak brittleness, since the semiconductor package is connected to the substrate without a separate solder ball.

Abstract translation: 半导体封装包括设置有具有接合焊盘的第一表面的半导体芯片，与第一表面相对的第二表面和侧表面; 与所述接合焊盘连接并沿着所述第一表面从所述接合焊盘延伸到与所述第二表面相交的所述侧表面的端部的第一再分布图案; 以及设置在所述第一再分布图案上并且从所述侧表面延伸到所述第一表面的第二再分配图案。 在本发明的一个实施例中，其中与焊盘连接的第一再分布图案形成在半导体芯片之上，并且第二再分配图案形成在第一再分配图案之上，其能够减小用于信号传输的长度，因为 第二再分配模式用作外部连接终端。 由于半导体封装没有单独的焊球而连接到衬底，所以它也能够高速处理数据以及保护具有弱脆性的半导体芯片。

公开(公告)号：US20100068965A1

公开(公告)日：2010-03-18

申请号：US12623101

申请日：2009-11-20

Applicant: Jeong-Hyun Kim ,  Myoung Ho Lee ,  Min Joo Kim ,  Se Jong Shin ,  Bong Chul Kim ,  Seung Hyun Lee ,  Kyo Yong Koo ,  Hyeon Jin Seo

Inventor： Jeong-Hyun Kim ,  Myoung Ho Lee ,  Min Joo Kim ,  Se Jong Shin ,  Bong Chul Kim ,  Seung Hyun Lee ,  Kyo Yong Koo ,  Hyeon Jin Seo

IPC: H01J9/24

CPC classification number: G02F1/13392 ,  G02F2202/28

Abstract: A liquid crystal display (LCD) device and its fabrication method are disclosed. Specifically, a fabrication method in which polyhedral spacers are implemented on a substrate through an ink jet method are used for an LCD device. The spacers have the polyhedral shape to increase their contact area with two substrates, and include a surface processed layer for strengthening a bonding force in its bonding with an alignment film formed on the two substrates. The spacers have a polyhedral shape for maintaining the cell gap between the substrates.

Abstract translation: 公开了液晶显示（LCD）装置及其制造方法。 具体地说，在液晶显示装置中使用了通过喷墨法在基板上实现多面体间隔物的制造方法。 间隔物具有多面体形状以增加其与两个基板的接触面积，并且包括用于加强与形成在两个基板上的取向膜的接合中的结合力的表面处理层。 间隔物具有多面体形状，用于保持基板之间的单元间隙。

公开(公告)号：US20090246947A1

公开(公告)日：2009-10-01

申请号：US12147157

申请日：2008-06-26

Applicant: Seung Hyun Lee

Inventor： Seung Hyun Lee

IPC: H01L21/20

CPC classification number: H01L21/02639 ,  H01L21/02538 ,  H01L21/02603 ,  H01L21/02645 ,  H01L21/02653

Abstract: Disclosed herein is a method of manufacturing a semiconductor device that includes forming a metal catalytic pattern on a semiconductor substrate; etching the semiconductor substrate using the metal catalytic pattern as an etching mask to form a recess; forming an insulating layer over a structure including the recess, the metal catalytic pattern, and the semiconductor substrate; patterning the insulating layer to cross over the metal catalytic pattern and to expose a predetermined portion of the metal catalytic pattern; and growing a nano wire using the exposed predetermined portion of the metal catalytic pattern.

Abstract translation: 本文公开了一种制造半导体器件的方法，其包括在半导体衬底上形成金属催化剂图案; 使用金属催化剂图案作为蚀刻掩模蚀刻半导体衬底以形成凹部; 在包括所述凹部，所述金属催化剂图案和所述半导体衬底的结构上形成绝缘层; 图案化所述绝缘层以越过所述金属催化剂图案并暴露所述金属催化剂图案的预定部分; 并使用暴露的金属催化剂图案的预定部分生长纳米线。

公开(公告)号：US20090166836A1

公开(公告)日：2009-07-02

申请号：US12048695

申请日：2008-03-14

Applicant: Jong Hoon KIM ,  Min Suk SUH ,  Seung Taek YANG ,  Seung Hyun LEE ,  Tae Min KANG

Inventor： Jong Hoon KIM ,  Min Suk SUH ,  Seung Taek YANG ,  Seung Hyun LEE ,  Tae Min KANG

IPC: H01L23/02

CPC classification number: H01L25/0652 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3114 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/50 ,  H01L2221/68345 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/19 ,  H01L2224/32145 ,  H01L2224/73217 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/96 ,  H01L2224/97 ,  H01L2225/06562 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01059 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/83005

Abstract: A stacked wafer level package includes a first semiconductor chip having a first bonding pad and a second semiconductor chip having a second bonding pad. Both bonding pads of the semiconductor chips face the same direction. The second semiconductor chip is disposed in parallel to the first semiconductor chip. A third semiconductor chip is disposed over the first and second semiconductor chips acting as a supporting substrate. The third semiconductor chip has a third bonding pad that is exposed between the first and the second semiconductor chips upon attachment. Finally, a redistribution structure is electrically connected to the first, second, and third bonding pads.

Abstract translation: 堆叠的晶片级封装包括具有第一焊盘的第一半导体芯片和具有第二焊盘的第二半导体芯片。 半导体芯片的两个接合焊盘面向相同的方向。 第二半导体芯片与第一半导体芯片平行设置。 第三半导体芯片设置在用作支撑衬底的第一和第二半导体芯片上。 第三半导体芯片具有在附接时在第一和第二半导体芯片之间露出的第三焊盘。 最后，再分布结构电连接到第一，第二和第三键合焊盘。

公开(公告)号：US20060267471A1

公开(公告)日：2006-11-30

申请号：US11443067

申请日：2006-05-31

Applicant: Seong-Yeon Hwang ,  Seung-Hyun Lee

Inventor： Seong-Yeon Hwang ,  Seung-Hyun Lee

IPC: H01J1/62 ,  H01J63/04

CPC classification number: H01J31/127 ,  H01J1/304

Abstract: An electron emission device includes a first electrode disposed on a substrate, an electron emission region electrically coupled to the first electrode, and a second electrode spaced apart from the first electrode, wherein the first electrode includes an opening and an extension that projects into the opening, and the electron emission region is electrically coupled to the first electrode by the extension.

公开(公告)号：US20060186462A1

公开(公告)日：2006-08-24

申请号：US11357329

申请日：2006-02-21

Applicant: Jeong-Hee Han ,  Ju-Hyung Kim ,  Chung-Woo Kim ,  Sang-Hun Jeon ,  Youn-Seok Jeong ,  Seung-Hyun Lee

Inventor： Jeong-Hee Han ,  Ju-Hyung Kim ,  Chung-Woo Kim ,  Sang-Hun Jeon ,  Youn-Seok Jeong ,  Seung-Hyun Lee

IPC: H01L29/788

CPC classification number: H01L29/42324 ,  H01L29/513 ,  H01L29/792

Abstract: Provided are example embodiments of fabrication methods and resulting structures suitable for use in nonvolatile memory devices formed on semiconductor substrates. The example embodiments of the gate structures include a first insulating film formed on the semiconductor substrate, a storage node formed on the first insulating film for storing charges, a second insulating film formed on the storage node, a third insulating film formed on the second insulating film, and a gate electrode formed on the third insulating film. The insulating films are selected whereby the dielectric constant of one or both of the second and third insulating films is greater than the dielectric constant of the first insulating film.

Abstract translation: 提供了适用于形成在半导体衬底上的非易失性存储器件中的制造方法和结果结构的示例性实施例。 栅极结构的示例实施例包括形成在半导体衬底上的第一绝缘膜，形成在用于存储电荷的第一绝缘膜上的存储节点，形成在存储节点上的第二绝缘膜，形成在第二绝缘层上的第三绝缘膜 膜和形成在第三绝缘膜上的栅电极。 选择绝缘膜，由此第二和第三绝缘膜中的一个或两个的介电常数大于第一绝缘膜的介电常数。

公开(公告)号：US10599304B2

公开(公告)日：2020-03-24

申请号：US14117891

申请日：2012-04-10

Applicant: Hisayuki Kunigita ,  Seung-Hyun Lee ,  Jae-Hyun Park ,  Ju-Yeong Ji

Inventor： Hisayuki Kunigita ,  Seung-Hyun Lee ,  Jae-Hyun Park ,  Ju-Yeong Ji

IPC: G06F3/0484 ,  H04N21/466 ,  H04N21/4788

Abstract: The present invention provides a content player allowing a user to select content to view using a viewing history of content viewed by another user. The content player performs a content playing process in response to a user instruction. The content player acquires viewing history information about content viewed by a related user related to the user with a content player different from the content player. The content player presents, to the user, the acquired viewing history information. The content player performs, if the user selects the presented viewing history information, a playing process of content indicated by the selected viewing history information.

公开(公告)号：US09320863B2

公开(公告)日：2016-04-26

申请号：US13994324

申请日：2011-12-16

Applicant: Norbert Hans Balko ,  Seung Hyun Lee ,  Peter Douglas Hill ,  Christopher Wayne McDaniel

Inventor： Norbert Hans Balko ,  Seung Hyun Lee ,  Peter Douglas Hill ,  Christopher Wayne McDaniel

IPC: A61M11/00 ,  A61M16/00 ,  A61M16/04 ,  A61M16/06 ,  A61M16/08

CPC classification number: A61M16/0057 ,  A61M16/0006 ,  A61M16/0009 ,  A61M16/0051 ,  A61M16/024 ,  A61M16/0465 ,  A61M16/0666 ,  A61M16/0875 ,  A61M2016/0042 ,  A61M2205/502

Abstract: A system for controlling machine-induced expiratory airflow of a subject, the subject having an airway, the system comprising: a pressure generator (140) configured to generate a pressurized flow of breathable gas for delivery to the airway of the subject; and one or more processors (110) configured to execute computer program modules, the computer program modules comprising: a control module (170) configured to control the pressure generator a metric determination module (154) configured to determine a value of a flow metric during expiration by the subject, a flow analysis module (156) configured to compare the determined value of the flow metric with a target level of the flow metric; and an adjustment module (160) configured to adjust one or more of exsufflation pressure.

Abstract translation: 一种用于控制受试者的机器呼气气流的系统，所述受试者具有气道，所述系统包括：压力发生器（140），其被配置为产生加压气流，用于输送到所述对象的气道; 以及被配置为执行计算机程序模块的一个或多个处理器（110），所述计算机程序模块包括：控制模块（170），被配置为控制压力发生器，度量确定模块（154），其被配置为在 流程分析模块（156），被配置为将所确定的流量度量值与所述流量度量的目标水平进行比较; 以及调整模块（160），其被配置为调节一个或多个排气压力。

公开(公告)号：US08980536B2

公开(公告)日：2015-03-17

申请号：US13407467

申请日：2012-02-28

Applicant: Young Cheol Bae ,  Seung-Hyun Lee

Inventor： Young Cheol Bae ,  Seung-Hyun Lee

IPC: G03F7/26 ,  G03F7/32 ,  G03F7/09 ,  G03F7/20

CPC classification number: G03F7/325 ,  G03F7/094 ,  G03F7/2041 ,  Y10T428/24355

Abstract: Provided are photoresist developer compositions that include a mixture of organic solvents. Also provided are methods of forming photolithographic patterns using negative tone development, coated substrates and electronic devices formed by the methods. The methods find particular applicability in the manufacture of electronic devices.

Abstract translation: 提供了包括有机溶剂的混合物的光致抗蚀剂显影剂组合物。 还提供了使用负色调显影，涂布基板和通过该方法形成的电子器件形成光刻图案的方法。 该方法在电子设备的制造中具有特别的适用性。