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公开(公告)号：US11276718B2
公开(公告)日：2022-03-15
申请号：US16618343
申请日：2017-06-30
发明人： Xiaoxu Kang
IPC分类号： H01L27/146
摘要： The present disclosure relates to an image sensor structure and a manufacturing method thereof. A detection structure layer and a blind pixel structure layer are used. The detection structure layer and the blind pixel structure layer are effectively combined and further formed by ion implantation. Thus, the space ratio of a single pixel is reduced, the integration and device sensitivity are improved, and the blind pixel array and the pixel array are also in the same environment, thereby further improving the detection sensitivity and reducing the detection error.
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公开(公告)号：US11249933B2
公开(公告)日：2022-02-15
申请号：US16957745
申请日：2018-08-29
发明人： Ting Li
摘要： A MIPI D-PHY circuit comprises a main control module, a controlled module, an internal data source generating module, and a configuration register. The main control module and the controlled module are respectively connected to the configuration register, and the main control module is connected to the internal data source generating module. The main control module and the controlled module comprise a clock channel and a data channel respectively. The clock channel and the data channel in the main control module and the data channel and the clock channel in the controlled module both comprise an error detection unit. The MIPI D-PHY circuit provided by the present disclosure adopts the error detection unit to detect the signals of the main control module and the controlled module.
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公开(公告)号：US20210358990A1
公开(公告)日：2021-11-18
申请号：US16624914
申请日：2017-12-22
发明人： Xiaoxu KANG , Yuhang ZHAO
IPC分类号： H01L27/146
摘要： The present disclosure discloses a small-size infrared sensor structure and a manufacturing method therefor. Trench is etched in a conductive beam region, and the conductive beam is formed by the sidewall of the trench, so that the small-size infrared sensor structure with adjacent pixel structures can share one conductive support hole, thereby improving integration degree of the pixels, enlarging the regions of the infrared detection regions of the pixels, and improving infrared detection efficiency.
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公开(公告)号：US11120970B2
公开(公告)日：2021-09-14
申请号：US16620859
申请日：2017-06-30
发明人： Xiaoxu Kang , Shaohai Zeng
IPC分类号： H01J37/00 , H01J37/317 , H01L21/265
摘要： The invention provided an ion implantation system. The ion implantation system comprises an ion emitting device and a target plate device; the target plate device comprises a graphite electrode unit and a power supply unit; the graphite electrode unit is mounted on the lower end of a support frame, and the graphite electrode unit is a hollow structure; the graphite electrode unit comprises a graphite electrode and a hollow region I, the graphite electrode is connected to the power supply unit; the area of the hollow region I is smaller than that of the wafer to be processed, and the sum of the area of the graphite electrode and the area of the hollow region I is larger than an implantation area of the ion beam. When the ion beam is implanted to the wafer to be processed on a target plate for ion implantation, the power supply unit applies a voltage to the graphite electrode to generate an electric field in the opposite direction from the electric field generated by the ion beam motion, accordingly, the speed of the ion beam implanted to a location outside the wafer to be processed is reduced, and secondary contamination during ion implantation is avoided, so as to perform an ion implantation process more efficiently.
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公开(公告)号：US11034577B2
公开(公告)日：2021-06-15
申请号：US16310821
申请日：2016-09-08
发明人： Xiaoxu Kang
摘要： The present invention provides an infrared detector pixel structure and manufacturing method thereof. The structure comprises a conductive metal region on surface of the silicon substrate; an infrared detecting element located above the silicon substrate for detecting infrared light and generating electrical signal; and a conductive beam unit electrically connected to the infrared detecting element for transmitting the electrical signal to the conductive metal region; the conductive beam unit includes at least one conductive beam layer and multilayer conductive trench arranged in a vertical direction; two ends of the conductive beam are respectively in contact with two layers of conductive trenches whose bottom portions are not in the same horizontal plane; the infrared detecting element is in contact with one conductive trench one conductive beam; the conductive metal region is in contact with bottom portion of the other layer of conductive trench therein; the electrical signal is transmitted along the height direction of the conductive trench and the conductive beam, so as to be transmitted downward to the conductive metal region in a circuitous path in the vertical direction.
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86.发明申请公开(公告)号：US20210036048A1
公开(公告)日：2021-02-04
申请号：US16966166
申请日：2018-08-29
发明人： Hong LIN
IPC分类号： H01L27/146
摘要： The present disclosure provides an image sensor and a method for manufacturing deep trench and through-silicon via of the image sensor, wherein: providing a pixel silicon wafer, performing a silicon wafer thinning on a second side of the pixel silicon wafer; forming a deep trench on the the second side of the pixel silicon wafer; filling the deep trench with organic material; coating photoresist on the second side of the pixel silicon wafer; etching the second side of the pixel silicon wafer to form a through-silicon via according to the through-silicon via pattern; depositing a dielectric protective layer on the surface of the deep trench and the surface of the through-silicon via; filling the deep trench with organic material; coating the photoresist on the second side of the pixel silicon wafer; etching the second side of the pixel silicon wafer to form a contact hole according to the contact hole pattern, depositing a barrier layer on the surface of the deep trench and the surface of the through-silicon via, filling the deep trench with a first metal, and form a seed layer on the surface of the through-silicon via; filling the through-silicon via with the first metal. The present disclosure reduces production steps of the image sensor.
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87.发明授权公开(公告)号：US10673448B2
公开(公告)日：2020-06-02
申请号：US16343785
申请日：2017-11-22
发明人： Xuehong He , Changming Pi , Hailing Yang
摘要： A system and method for regulating transfer characteristics of an integral analog-to-digital converter are provided. The system comprises a cascade N-stage integrator structure having N integrators, the input end of the first integrator is connected to a voltage, the output end of each integrator is connected to the input end of the adjacent integrator, and the output end of the Nth integrator is connected to an output node (VRAMP). Wherein, the N is positive integer greater than or equal to 2. In the cascade multistage integrator structure, the voltage of the output node (VRAMP) is in direct proportion relation with the time to the power of N. By adopting a cascade multistage integrator according to the present disclosure, it is simple to regulate transfer characteristics of the ADC, and the cascade digital signal processing is convenient, which can reduce the ADC conversion time and improve the ADC conversion rate. Compared with the existing polyline mode, the present disclosure has better linearity; and it can be easily extended to cascade multistage integrators.
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公开(公告)号：US20200006326A1
公开(公告)日：2020-01-02
申请号：US16465200
申请日：2017-11-22
发明人： Deming SUN
IPC分类号： H01L27/07 , H01L29/78 , H01L29/739 , H01L21/8234 , H01L21/266
摘要： The present disclosure provides a FINFET device integrated with a TFET and its manufacturing method. Two end portions of the fin structure respectively form an N-type doped drain and a source which is consisted by a top P-type doped region and a bottom N-type doped region. As a result, the bottom N-type doped region of the source, the drain, the channel, the high-k dielectric layer and the gate structure on the surface of the sidewall of the fin structure form a MOS FINFET device, and the top P-type doped region of the source, the drain, the channel, the high-k dielectric layer and the gate structure on the top surface of the fin structure form the TFET device. The integration of the TFET and the FINFET is achieved, which decreases the cost.
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公开(公告)号：US10062591B2
公开(公告)日：2018-08-28
申请号：US14902341
申请日：2013-09-26
发明人： Daqing Ren
IPC分类号： H01L21/67 , H01L21/677
CPC分类号： H01L21/67196 , H01L21/6719 , H01L21/67201 , H01L21/67757 , H01L21/67766 , H01L21/67772 , H01L21/67775 , H01L21/67778 , H01L21/67781
摘要： An equipment platform system and a wafer transfer method used to a wafer processing is provided. The equipment platform system comprises: a working platform, each side of the working platform is used to mount process chamber; a top-loading wafer device fixed on the top surface of working platform, the top-loading wafer device includes: a cassette or FOUP loading unit, a wafer loading unit installed disposed opposite the cassette or FOUP loading unit, the wafer loading unit has an inside cavity; a central robot, located between the cassette or FOUP loading unit and the wafer loading unit; a loading gate used to open or close the inside cavity; a wafer tray, which is in the inside cavity; a shutoff gate, which is at the bottom of the inside cavity, used to open or close the internal of the working platform; there is an opening at the top of the working platform, the opening is located at the lower part of the inside cavity, and disposed opposite the shutoff gate, the shutoff gate can seal the opening. The equipment platform system of the invention can decrease the floor space, increase the space efficiency, and the wafer transfer efficiency.
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公开(公告)号：US09979918B2
公开(公告)日：2018-05-22
申请号：US15104236
申请日：2014-09-30
发明人： Chen Li , Jianxin Wen , Yuhang Zhao
IPC分类号： H04N5/378 , H04N5/3745 , H04N5/355 , H04N5/347 , H01L27/146
CPC分类号： H04N5/378 , H01L27/14641 , H04N5/347 , H04N5/3559 , H04N5/37457
摘要： The present invention provides an image sensor comprising a pixel array module composed of pixel groups, multiple switch control modules, a PFA, a pipelined ADC and a decode module. Each pixel group comprises multiple unit pixels which form at least one unit pixel. Each switch control module corresponds to a row of the pixel array module and includes a first transmission circuit and a second transmission circuit. The PGA process the data outputted by the first and second transmission circuits and the pipelined ADC performs A/D conversion to the data outputted by the PGA. The decode module controls the first and second transmission circuits of each row to alternately read and transmit the unit pixel data, and controls all the first and second transmission circuits to successively output the data of the unit pixels readout thereby to the PGA.
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