公开(公告)号：US20080265309A1

公开(公告)日：2008-10-30

申请号：US12213542

申请日：2008-06-20

Applicant: Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

Inventor： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

IPC: H01L29/792 ,  H01L21/336

CPC classification number: H01L21/0217 ,  H01L21/022 ,  H01L21/02252 ,  H01L21/31155 ,  H01L21/3185 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/40117 ,  H01L29/66833

Abstract: After an ONO film in which a silicon nitride film (22) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films (21), (23), a bit line diffusion layer (17) is formed in a memory cell array region (11) by an ion implantation as a resist pattern (16) taken as a mask, then lattice defects are given to the silicon nitride film (22) by a further ion implantation. Accordingly, a highly reliable semiconductor memory device can be realized, in which a high quality nitride film is formed in a low temperature condition, in addition, the nitride film can be used as a charge trap film having a charge capture function sufficiently adaptable for a miniaturization and a high integration which are recent demands.

Abstract translation: 在通过使用具有径向线槽天线的等离子体处理器通过等离子体氮化法形成的氮化硅膜（22）夹在氧化硅膜（21），（23）上的ONO膜之后，位线扩散层（17） ）通过离子注入形成在存储单元阵列区域（11）中，作为抗蚀剂图案（16）作为掩模，然后通过进一步的离子注入向氮化硅膜（22）提供晶格缺陷。 因此，可以实现在低温条件下形成高质量氮化物膜的高度可靠的半导体存储器件，此外，氮化物膜可以用作具有充分适应于 小型化和高度一体化是最近的需求。

公开(公告)号：US07410857B2

公开(公告)日：2008-08-12

申请号：US11878296

申请日：2007-07-23

Applicant: Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

Inventor： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

IPC: H01L21/8238

CPC classification number: H01L21/0217 ,  H01L21/022 ,  H01L21/02252 ,  H01L21/28282 ,  H01L21/31155 ,  H01L21/3185 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/66833

Abstract: After an ONO film in which a silicon nitride film (22) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films (21), (23), a bit line diffusion layer (17) is formed in a memory cell array region (11) by an ion implantation as a resist pattern (16) taken as a mask, then lattice defects are given to the silicon nitride film (22) by a further ion implantation. Accordingly, a highly reliable semiconductor memory device can be realized, in which a high quality nitride film is formed in a low temperature condition, in addition, the nitride film can be used as a charge trap film having a charge capture function sufficiently adaptable for a miniaturization and a high integration which are recent demands.

公开(公告)号：US20070226490A1

公开(公告)日：2007-09-27

申请号：US11596574

申请日：2005-05-13

Applicant: So Odawara ,  Takao Nishiyama ,  Takayuki Segawa ,  Manabu Nakamura ,  Masahiro Matsunaga ,  Yuji Hashimoto ,  Mikio Mizutani

Inventor： So Odawara ,  Takao Nishiyama ,  Takayuki Segawa ,  Manabu Nakamura ,  Masahiro Matsunaga ,  Yuji Hashimoto ,  Mikio Mizutani

IPC: H04L9/32

CPC classification number: H04L63/08 ,  H04L12/56 ,  H04W12/06

Abstract: A communication system for allowing communications as of Internet and the like to be universally used without restricting a second user to use communication and further without requiring any significant capital investment. According to this communication system, when a terminal (104) becomes able to communicate with a network usage terminal (101) and is about to use the Internet via the network usage terminal (101), it transmits the authentication information of its user (B), and the network usage terminal (101) then transmits the authentication information of its owner (A) and the received authentication information of the user (B) to an authentication server (105). If a result of authentication is OK, the network usage terminal (101) relays the communication of the terminal (104) to the Internet (103), thereby permitting the terminal (104) to use the Internet.

Abstract translation: 用于允许互联网等通信的通信系统被普遍使用，而不限制第二用户使用通信，并且进一步而不需要任何大量的资本投资。 根据该通信系统，当终端（104）能够与网络使用终端（101）进行通信并且即将经由网络使用终端（101）使用因特网时，其发送其用户的认证信息（B ），网络使用终端（101）然后将其所有者（A）的认证信息和接收到的用户（B）的认证信息发送给认证服务器（105）。 如果认证的结果为OK，则网络使用终端（101）将终端（104）的通信中继到因特网（103），从而允许终端（104）使用因特网。

公开(公告)号：US20050224866A1

公开(公告)日：2005-10-13

申请号：US11065305

申请日：2005-02-25

Applicant: Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

Inventor： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

IPC: H01L21/8247 ,  H01L21/28 ,  H01L21/3115 ,  H01L21/318 ,  H01L21/336 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC classification number: H01L21/0217 ,  H01L21/022 ,  H01L21/02252 ,  H01L21/28282 ,  H01L21/31155 ,  H01L21/3185 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/66833

Abstract: After an ONO film in which a silicon nitride film (22) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films (21), (23), a bit line diffusion layer (17) is formed in a memory cell array region (11) by an ion implantation as a resist pattern (16) taken as a mask, then lattice defects are given to the silicon nitride film (22) by a further ion implantation. Accordingly, a highly reliable semiconductor memory device can be realized, in which a high quality nitride film is formed in a low temperature condition, in addition, the nitride film can be used as a charge trap film having a charge capture function sufficiently adaptable for a miniaturization and a high integration which are recent demands.

Abstract translation: 在通过使用具有径向线槽天线的等离子体处理器通过等离子体氮化方法形成的氮化硅膜（22）夹在氧化硅膜（21），（23）上的ONO膜之后，位线扩散层（17） ）通过离子注入形成在存储单元阵列区域（11）中，作为抗蚀剂图案（16）作为掩模，然后通过进一步的离子注入向氮化硅膜（22）提供晶格缺陷。 因此，可以实现在低温条件下形成高质量氮化物膜的高度可靠的半导体存储器件，此外，氮化物膜可以用作具有充分适应于 小型化和高度一体化是最近的需求。

公开(公告)号：US20050212035A1

公开(公告)日：2005-09-29

申请号：US11065306

申请日：2005-02-25

Applicant: Yukihiro Utsuno ,  Manabu Nakamura ,  Kentaro Sera ,  Masahiko Higashi ,  Hiroyuki Nansei ,  Hideo Takagi ,  Tatsuya Kajita

Inventor： Yukihiro Utsuno ,  Manabu Nakamura ,  Kentaro Sera ,  Masahiko Higashi ,  Hiroyuki Nansei ,  Hideo Takagi ,  Tatsuya Kajita

IPC: H01L21/28 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/51 ,  H01L29/788

CPC classification number: H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/513 ,  H01L29/518 ,  H01L29/7883

Abstract: Tunnel insulating films (3) are formed in element regions demarcated by element isolation insulating films (2). Thereafter, for each memory cell, a floating gate (4) is formed, and an ONO film (5) and a control gate (6) are further formed. Next, a plasma insulating film (7) is formed on surfaces of stacked gates. The plasma insulating film is immune to plane orientation of a base film. Therefore, the entire plasma insulating film (7) has a substantially uniform thickness, and consequently, even if the maximum thickness thereof is not as large as that of a thermal oxide film, hydrogen entrance is prevented when the interlayer insulating film is thereafter formed, and electron leakage is also prevented. The reduction in thickness of this insulating film makes it possible to reduce birds' beaks, and efficiency in erase/write of data can be enhanced.

Abstract translation: 隧道绝缘膜（3）形成在由元件隔离绝缘膜（2）划分的元件区域中。 此后，对于每个存储单元，形成浮置栅极（4），并且还形成ONO膜（5）和控制栅极（6）。 接下来，在层叠栅极的表面上形成等离子体绝缘膜（7）。 等离子体绝缘膜不受基膜的平面取向的影响。 因此，整个等离子体绝缘膜（7）的厚度基本均匀，因此即使最大厚度不如热氧化膜的厚度那样大，因此当形成层间绝缘膜时，防止了氢入口， 并且也防止电子泄漏。 该绝缘膜的厚度的减小使得可以减少鸟的喙，并且可以提高擦除/写入数据的效率。

公开(公告)号：US20050180398A1

公开(公告)日：2005-08-18

申请号：US11030360

申请日：2005-01-07

Applicant: Ryuhei Deno ,  Manabu Nakamura

Inventor： Ryuhei Deno ,  Manabu Nakamura

IPC: G06F13/00 ,  H04L12/24 ,  H04L12/66 ,  H04L29/08

CPC classification number: H04L41/0253 ,  H04L67/02 ,  H04L67/025

Abstract: In embedded business apparatus, a Web server function receives a network protocol request including an IP address by a network protocol daemon and a port number, processes the request, and responds to the request by sending a network protocol response, and the request includes an obtain request of port information including a port number specifying the port, and the Web server function includes the response including the port information obtained by processing the obtain request and including Web information possible to input a change instruction for changing the port information.

Abstract translation: 在嵌入式业务装置中，Web服务器功能通过网络协议守护进程接收包括IP地址的网络协议请求和端口号，处理请求，并通过发送网络协议响应来响应请求，并且该请求包括获取 请求包括指定端口的端口号的端口信息，并且Web服务器功能包括包括通过处理获取请求而获得的端口信息的响应，并且包括可能输入用于改变端口信息的改变指令的Web信息。

公开(公告)号：US06879815B2

公开(公告)日：2005-04-12

申请号：US10207857

申请日：2002-07-31

Applicant: Manabu Nakamura ,  Kazuo Akaike

Inventor： Manabu Nakamura ,  Kazuo Akaike

IPC: H04L27/227 ,  H04B1/26 ,  H04B1/66 ,  H04B1/18

CPC classification number: H04B1/26 ,  H04B1/66

Abstract: A frequency extractor extracts an input frequency of an input signal. The frequency extractor includes a frequency multiplier, first and second filters, a binary circuit and a frequency divider. The frequency multiplier obtains a signal of a multiplied frequency, the multiplied frequency being N times the input frequency, N being an integer greater than 1. The first filter, having a first bandwidth, filters the signal of the multiplied frequency to provide a first filtered signal. The binary circuit binarizes the first filtered signal to a binary signal. The frequency divider divides the binary signal by a factor of N to provide a divided signal. The second filter, having a second bandwidth, filters the divided signal to generate the input frequency in a form of a continuous wave, wherein the second bandwidth is about 1/N times the first bandwidth.

Abstract translation: 频率提取器提取输入信号的输入频率。 频率提取器包括倍频器，第一和第二滤波器，二进制电路和分频器。 倍频器获得倍频信号，乘法频率为输入频率的N倍，N为大于1的整数。具有第一带宽的第一滤波器对倍频信号进行滤波，以提供第一滤波 信号。 二进制电路将第一个滤波信号二值化为二进制信号。 分频器将二进制信号除以因子N以提供分频信号。 具有第二带宽的第二滤波器对分频信号进行滤波以产生连续波形式的输入频率，其中第二带宽约为第一带宽的1/N。

公开(公告)号：US06484874B1

公开(公告)日：2002-11-26

申请号：US09624080

申请日：2000-07-24

Applicant: Yohei Kageyama ,  Akihiko Sakata ,  Manabu Nakamura ,  Junji Yotsuyanagi

Inventor： Yohei Kageyama ,  Akihiko Sakata ,  Manabu Nakamura ,  Junji Yotsuyanagi

IPC: B65D2508

CPC classification number: A61J1/2093 ,  A61J1/10 ,  A61J1/2024 ,  A61J1/2027

Abstract: One object of the present invention is to provide a medical container with multiple chambers and a production method thereof, where respective medicaments housed in a plurality of chambers can be separated without fail until performing the infusion and when performing the infusion, the respective medicaments can be easily mixed while keeping the sterile state. In order to achieve this object, a medical container (1) with multiple chambers is provided, where a container (10) having a chamber (11) for housing a liquid medicament (12) and a container (20) having a chamber (21) for housing a solid medicament (22) are integrated, a partitioning member (30) for partitioning these containers (10, 20) is provided, a hollow part (31) for connecting two adjacent containers (10, 20) to allow communication therebetween and a lid (32) for sealing at least one end of the hollow part (31) are formed in the partitioning member (30), and a thin-wall part (34) is formed in the connection part between the lid (32) and the partitioning member body (33).

Abstract translation: 本发明的一个目的是提供一种具有多个腔室的医疗容器及其制造方法，其中容纳在多个腔室中的各种药剂可以分开，直到进行输注，并且当进行输注时，各个药物可以是 容易混合，同时保持无菌状态。 为了实现该目的，提供了一种具有多个腔室的医疗容器（1），其中容器（10）具有用于容纳液体药物（12）的腔室（11）和具有腔室（21）的容器 ），用于容纳固体药物（22）的一个用于分隔这些容器（10,20）的分隔构件（30），用于连接两个相邻容器（10,20）以允许其间连通的中空部分 在所述分隔构件（30）上形成用于密封所述中空部（31）的至少一端的盖（32），并且在所述盖（32）之间的连接部形成有薄壁部（34） 和分隔构件主体（33）。

公开(公告)号：US5099088A

公开(公告)日：1992-03-24

申请号：US534727

申请日：1990-06-07

Applicant: Ikuzo Usami ,  Yoshinori Sato ,  Manabu Nakamura ,  Satoshi Uemura

Inventor： Ikuzo Usami ,  Yoshinori Sato ,  Manabu Nakamura ,  Satoshi Uemura

IPC: C09K3/10 ,  H01R4/22 ,  H01R4/70 ,  H02G15/00 ,  H02G15/18

CPC classification number: H02G15/18 ,  H01R4/22 ,  H02G15/003

Abstract: An apparatus for splicing and sealing plural conductive wires comprising a support member and a flexible sealant held in the interior of the support member and a method for splicing and sealing plural conductive wires employing the apparatus are provided.