公开(公告)号：US11557789B2

公开(公告)日：2023-01-17

申请号：US16481782

申请日：2018-10-31

Applicant: IMEC VZW ,  KATHOLIEKE UNIVERSITEIT LEUVEN ,  PANASONIC CORPORATION

Inventor： Xubin Chen ,  Philippe Vereecken ,  Maarten Mees ,  Knut Bjarne Gandrud ,  Mitsuhiro Murata ,  Akihiko Sagara ,  Yukihiro Kaneko ,  Morio Tomiyama ,  Mikinari Shimada

IPC: H01M10/0562 ,  H01M10/0525 ,  H01M4/62

Abstract: A solid electrolyte (10) of the present disclosure includes porous silica (11) having a plurality of pores (12) interconnected mutually and an electrolyte (13) coating inner surfaces of the plurality of pores (12). The electrolyte (13) includes 1-ethyl-3-methylimidazolium bis(fluorosulfonyl)imide represented by EMI-FSI and a lithium salt dissolved in the EMI-FSI. A molar ratio of the EMI-FSI to the porous silica (11) is larger than 1.0 and less than 3.5.

公开(公告)号：US11557503B2

公开(公告)日：2023-01-17

申请号：US16996413

申请日：2020-08-18

Applicant: IMEC VZW

Inventor： Amey Mahadev Walke ,  Liesbeth Witters

IPC: H01L21/76 ,  H01L21/762 ,  H01L21/02 ,  H01L21/8249 ,  H01L27/07

Abstract: The present disclosure relates to a semi-conductor structure and method for co-integrating a III-V device with a group IV device on a SixGe1-x(100) substrate. The method includes: (a) providing a SixGe1-x(100) substrate, where x is from 0 to 1; (b) selecting a first region for forming therein a group IV device and a second region for forming therein a III-V device, the first and the second region each comprising a section of the SixGe1-x(100) substrate; (c) forming a trench isolation for at least the III-V device; (d) providing a SiyGe1-y(100) surface in the first region, where y is from 0 to 1; (e) at least partially forming the group IV device on the SiyGe1-y(100) surface in the first region; (f) forming a trench in the second region which exposes the SixGe1-x(100) substrate, the trench having a depth of at least 200 nm, at least 500 nm, at least 1 μm, usually at least 2 μm, such as 4 μm, with respect to the SiyGe1-y(100) surface in the first region; (g) growing a III-V material in the trench using aspect ratio trapping; and (h) forming the III-V device on the III-V material, the III-V device comprising at least one contact region at a height within 100 nm, 50 nm, 20 nm, usually 10 nm, of a contact region of the group IV device.

公开(公告)号：US20230012461A1

公开(公告)日：2023-01-12

申请号：US17811547

申请日：2022-07-08

Applicant: IMEC VZW

Inventor： Hanns Christoph ADELMANN ,  Florin CIUBOTARU

IPC: H01L41/12 ,  H01L41/20 ,  H01L41/047

Abstract: A magnetoelectric (“ME”) device is disclosed. In one aspect, the ME device includes a first piezoelectric substrate portion and a second piezoelectric substrate portion; a magnetostrictive body with a magnetization oriented in a first direction, the magnetostrictive body arranged on and extending between the first and second portions; a pair of input electrodes arranged on the first portion; and a pair of output electrodes arranged on the second portion. The input electrodes are configured to induce a fringing electric field extending between the input electrodes via the first portion, thereby causing a deformation of the first portion which in turn causes a deformation of the magnetostrictive body such that the magnetization thereof is re-oriented to a second direction due to a reverse magnetostriction. An output voltage is induced between the output electrodes by a deformation of the second portion caused by the re-orientation of the magnetization of the magnetostrictive body.

公开(公告)号：US20230010039A1

公开(公告)日：2023-01-12

申请号：US17859294

申请日：2022-07-07

Applicant: IMEC VZW ,  Katholieke Universiteit Leuven, KU LEUVEN R&D

Inventor： Martin Heilmann ,  Ming Zhao ,  Nadine Collaert ,  Bertrand Parvais ,  Sachin Yadav

IPC: H01L21/8258 ,  H01L27/06 ,  H01L21/02 ,  C30B29/06 ,  C30B25/18 ,  C30B29/40 ,  C23C16/30 ,  C23C16/02

Abstract: A method for manufacturing a semiconductor structure is provided. The method includes a III-V semiconductor device in a first region of a base substrate and a further device in a second region of the base substrate. The method includes: (a) obtaining a base substrate comprising the first region and the second region, different from the first region; (b) providing a buffer layer over a surface of the base substrate at least in the first region, wherein the buffer layer comprises at least one monolayer of a first two-dimensional layered crystal material; (c) forming, over the buffer layer in the first region, and not in the second region, a III-V semiconductor material; and (d) forming, in the second region, at least part of the further device. A semiconductor structure is also provided.

公开(公告)号：US11545621B2

公开(公告)日：2023-01-03

申请号：US15930272

申请日：2020-05-12

Applicant: IMEC vzw

Inventor： Sebastien Couet ,  Johan Swerts

IPC: H01L43/10 ,  G11C11/16 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12 ,  H01F10/30

Abstract: The disclosed technology relates generally to semiconductor devices, and more particularly to a layer stack for a magnetic tunnel junction (MTJ) device, and a method of forming the same. According to an aspect, a layer stack for a (MTJ) device comprises a seed layer structure, a pinning layer structure arranged above the seed layer structure, and above the pinning layer structure a Fe-comprising reference layer structure and a free layer structure separated by a tunnel barrier layer. The seed layer structure comprises a Ru-comprising layer and a Cr-comprising layer. The Cr-comprising layer forms an upper layer of the seed layer structure.

公开(公告)号：US11541390B2

公开(公告)日：2023-01-03

申请号：US16233584

申请日：2018-12-27

Applicant: IMEC VZW

Inventor： Benjamin Jones

IPC: B01L3/00

Abstract: Described herein are sample loading systems for loading a sample into a processing and/or analysis system comprising: a sample reservoir for receiving a sample and a metering volume reservoir, the sample reservoir and a first side of the metering volume reservoir being interconnected through a first channel with a first flow resistance to allow filling of the metering volume reservoir with sample; a further reservoir for receiving a second fluid interconnected with the metering volume reservoir at the first side via a second channel having a smaller second flow resistance; a first valve for blocking flow of sample from the metering volume reservoir into the second channel; a second valve connected to a second side of the metering volume reservoir for controlling the blocking and flowing of sample; and a first timing circuitry for timing the opening of the second valve as a function of filling of the further reservoir.

公开(公告)号：US20220396067A1

公开(公告)日：2022-12-15

申请号：US17834413

申请日：2022-06-07

Applicant: IMEC VZW ,  Katholieke Universiteit Leuven, KU LEUVEN R&D

Inventor： Boshen Liang ,  Dominika Wysocka ,  David Cheyns

IPC: B32B43/00 ,  B81C1/00 ,  B32B37/24

Abstract: The present disclosure relates to a method for transferring a target layer to a substrate. The method includes providing a stack by forming a first transfer layer over a first substrate, forming a second transfer layer on the first transfer layer, the second transfer layer being water-soluble, and forming the target layer on the second transfer layer, such that the stack has a top surface. The method also includes bonding the top surface of the stack to a second substrate, separating the first transfer layer from the second transfer layer, and dissolving the second transfer layer in water.

公开(公告)号：US20220392683A1

公开(公告)日：2022-12-08

申请号：US17804550

申请日：2022-05-27

Applicant: IMEC VZW

Inventor： Florin Ciubotaru ,  Hanns Christoph Adelmann

IPC: H01F10/32 ,  H03K19/21 ,  H01P1/18

Abstract: The disclosed technology relates to a logic device based on spin waves. In one aspect, the logic device includes a spin wave generator, a waveguide, at least two phase shifters, and an output port. The spin wave generator is connected with the waveguide and is configured to emit a spin wave in the waveguide. The at least two phase shifters are connected with the waveguide at separate positions such that, when a spin wave is emitted by the spin wave generator, it passes via the phase shifters. The at least two phase shifters are configured to change a phase of the passing spin wave. The output port is connected with the wave guide such that the at least two phase shifters are present between the spin wave generator and the output port.

公开(公告)号：US11522502B2

公开(公告)日：2022-12-06

申请号：US17464631

申请日：2021-09-01

Applicant: IMEC VZW ,  VRIJE UNIVERSITEIT BRUSSEL

Inventor： Xinyan Tang ,  Pierre Wambacq

IPC: H03F1/42 ,  H03F3/24 ,  H04B1/40

Abstract: A wideband radio-frequency transceiver front-end is provided. The transceiver front-end includes an antenna port and a transmission path coupled to the antenna port comprising a power amplifier and a first matching network. The transceiver front-end further includes a reception path coupled to the antenna port comprising a low noise amplifier and a second matching network. Furthermore, the transceiver front-end includes an impedance inverter coupled in-between the antenna port and the second matching network. Moreover, the transceiver front-end includes a controller comprising switching arrangement for a gate and a drain of the power amplifier. In this context, the controller is configured to initiate a first reception mode by connecting the gate of the power amplifier to ground and by connecting the drain of the power amplifier to a supply voltage.

公开(公告)号：US11506917B2

公开(公告)日：2022-11-22

申请号：US16966456

申请日：2019-01-30

Applicant: IMEC VZW

Inventor： Xavier Rottenberg ,  Kristof Lodewijks

IPC: G02F1/01 ,  G02F1/03 ,  G03H1/22

Abstract: An optical device for forming a distribution of a three-dimensional light field comprises: an array of individually addressable unit cells; each unit cell in the array of unit cells comprising a stack including: at least one electrode; and a resonance defining layer, comprising at least a phase change material, PCM, layer, wherein the resonance defining layer is patterned to define a geometric structure dimensioned for defining a wavelength-dependent in-plane resonance of an electromagnetic wave; wherein the at least one electrode causes a phase change of the phase change material based on receiving a control signal to alter a wavelength-dependency of resonance in the resonance defining layer for controlling the optical property of the unit cell; wherein unit cells in the array of unit cells are separated such that the PCM layer of a unit cell is separated from the PCM layer in an adjacent unit cell.