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公开(公告)号:US20240341188A1
公开(公告)日:2024-10-10
申请号:US18610579
申请日:2024-03-20
Applicant: Samsung Display Co., Ltd.
Inventor: Taeil Kim , Junha Park , Sunyoung Pak , Jangyeol Baek , Kyoung Sunwoo , Munki Sim , Minjung Jung
IPC: H10K85/60 , C07F5/02 , C09K11/06 , H10K50/12 , H10K101/30
CPC classification number: H10K85/658 , C07F5/027 , C09K11/06 , C09K2211/1018 , H10K50/12 , H10K2101/30
Abstract: Embodiments provide a condensed cyclic compound, a light-emitting device including the condensed cyclic compound, an electronic apparatus including the light-emitting device, and an electronic equipment including the light-emitting device. The light-emitting device includes a first electrode, a second electrode facing the first electrode, an interlayer between the first electrode and the second electrode and including an emission layer, and the condensed cyclic compound. The condensed cyclic compound satisfies Expression 1, which is explained in the specification:
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公开(公告)号:US20240341163A1
公开(公告)日:2024-10-10
申请号:US18395921
申请日:2023-12-26
Applicant: Samsung Display Co., Ltd.
Inventor: SUNGEUN LEE , YOUN JOON KIM , MINJEONG OH , KIJUNE LEE , JINHO JU , JONGHYUN CHOI
IPC: H10K77/10 , H10K59/121 , H10K59/131 , H10K102/00 , H10K102/20
CPC classification number: H10K77/111 , H10K59/1213 , H10K59/131 , H10K2102/20 , H10K2102/311
Abstract: A display panel includes a display area, a circuit element layer including insulating layers and a transistor in the display area, a first insulating layer among the insulating layers defining a first through hole of the circuit element layer which is in the display area, a light emitting element electrically connected to the transistor, and an anti-shock pattern having an elastic modulus greater than about 100 gigapascals, the anti-shock pattern being in the first through hole.
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公开(公告)号:US20240341160A1
公开(公告)日:2024-10-10
申请号:US18383973
申请日:2023-10-26
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Hyun Eok SHIN , Dong MIn LEE , Ju Hyun LEE
CPC classification number: H10K59/8792 , G06F3/0412 , H10K59/1201 , H10K59/40 , G06F3/04164 , G06F3/0446 , G06F2203/04107 , G06F2203/04112
Abstract: A display device includes: a display panel including a display area and a non-display area; a window disposed above the display panel and having a plurality of grooves that are formed on one surface of window facing the display panel; and viewing angle control members formed inside the plurality of grooves, wherein the viewing angle control members include light absorbing walls formed on sidewalls of the plurality of grooves and formed to become thinner as upper surfaces of the plurality of grooves are approached.
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公开(公告)号:US20240341143A1
公开(公告)日:2024-10-10
申请号:US18745988
申请日:2024-06-17
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sun Hwa LEE , Yu Jin LEE , Gyung Soon PARK , Jae Yong JANG
IPC: H10K59/131 , H10K50/813 , H10K50/822 , H10K59/123 , H10K59/124
CPC classification number: H10K59/131 , H10K50/813 , H10K50/822 , H10K59/123 , H10K59/124
Abstract: Provided is a display device including a substrate including a front surface portion, a first side surface portion extending from a first side of the front surface portion, a second side surface portion extending from a second side of the front surface portion, and a corner portion between the first side surface portion and the second side surface portion, a first display area on the front surface portion of the substrate, and including a first pixel for displaying images, and a second display area on the corner portion of the substrate, and including a first voltage supply line, and a second pixel for displaying images, the second pixel including a first pixel electrode, a first light emitting layer on the first pixel electrode, and a common electrode on the first light emitting layer, wherein the first voltage supply line does not overlap the first pixel electrode in a thickness direction of the substrate.
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公开(公告)号:US20240341132A1
公开(公告)日:2024-10-10
申请号:US18745977
申请日:2024-06-17
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Yeon Hong KIM , Eun Hye KO , Eun Hyun KIM , Kyoung Won LEE , Sun Hee LEE , Jun Hyung LIM
IPC: H10K59/126 , H01L27/12 , H10K59/12 , H10K59/121 , H10K59/131
CPC classification number: H10K59/126 , H10K59/1315 , H01L27/124 , H10K59/1201 , H10K59/1213
Abstract: A display device includes a substrate, a corrosion prevention layer on the substrate and including an inorganic material, a first conductive layer on the corrosion prevention layer and including aluminum or an aluminum alloy, a first insulating film on the first conductive layer, a semiconductor layer on the first insulating film and including a channel region of a transistor, a second insulating film on the semiconductor layer, and a second conductive layer on the second insulating film and including a barrier layer, which includes titanium, and a main conductive layer, which includes aluminum or an aluminum alloy, wherein the semiconductor layer includes an oxide semiconductor, and the barrier layer is between the semiconductor layer and the main conductive layer and overlaps the channel region of the transistor.
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公开(公告)号:US20240341131A1
公开(公告)日:2024-10-10
申请号:US18745955
申请日:2024-06-17
Applicant: Samsung Display Co., Ltd.
Inventor: Ji-Sun KIM , Jang Mi KANG , Sun Hwa LEE , Mu Kyung JEON
IPC: H10K59/126 , G09G3/00 , G09G3/3233 , G09G3/3258 , H01L27/12 , H01L29/786 , H10K59/121 , H10K59/131
CPC classification number: H10K59/126 , G09G3/00 , G09G3/3233 , G09G3/3258 , H01L27/1225 , H01L27/124 , H01L27/1251 , H01L27/1255 , H01L29/78633 , H01L29/78675 , H01L29/7869 , H10K59/1213 , H10K59/131 , G09G2300/0465 , G09G2300/0814 , G09G2300/0819 , G09G2310/0251 , G09G2320/0247 , G09G2330/021
Abstract: A display device includes a substrate, first and second transistors on the substrate, a first electrode connected to one of the first and second transistors, a second electrode facing the first electrode, and a light emission member between the first and second electrodes, where the first transistor includes a first channel including a polycrystalline semiconductor member on the substrate, a first source electrode and a first drain electrode at respective opposite sides of the first channel, a first gate electrode overlapping the first channel, and a first insulating layer covering the first gate electrode, the second transistor includes a second gate electrode on the first insulating layer, a second channel including an oxide semiconductor member on the second gate electrode, second source and drain electrodes on the second channel, and an external light blocking member on the second source and drain electrodes and overlapping the second channel.
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公开(公告)号:US20240340402A1
公开(公告)日:2024-10-10
申请号:US18627694
申请日:2024-04-05
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Su Jung HUH , Rang Kyun MOK , Hyun Jin CHO , Eun Kyoung NAM , Byeong Hee WON , Young Soo HWANG
IPC: H04N13/341 , H04N13/337 , H04N13/398
CPC classification number: H04N13/341 , H04N13/337 , H04N13/398
Abstract: A display device includes a display panel, an optical member, and a display driver. The display panel is configured to display a plurality of 2D images. The optical member is configured to refract 2D image display light displayed in a display area of the display panel into a first refraction direction or a second refraction direction to output 3D stereoscopic image display light. The display driver is configured to control a refraction direction of the 3D stereoscopic image display light by dividing a 3D stereoscopic image display period of at least one frame into first and second time-division frames and supplying driving voltages to the optical member in each of the first and second time-division frames.
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公开(公告)号:US20240339561A1
公开(公告)日:2024-10-10
申请号:US18604563
申请日:2024-03-14
Applicant: Samsung Display Co., LTD.
Inventor: Ji Song CHAE , Dae Hyun KIM , Sang Ho PARK , Jae Woong YOO , Chul Jong YOO , Sang Hoon LEE , Joo Hee LEE , Jin Hyuk JANG , Sang Ho JEON , Seon Hong CHOI
CPC classification number: H01L33/025 , H01L25/167 , H01L33/0066 , H01L33/44 , H01L2933/0025
Abstract: A light emitting element may include a semiconductor stack structure including an N-type semiconductor layer, a P-type semiconductor layer, and an active layer disposed between the N-type semiconductor layer and the P-type semiconductor layer, and an insulating layer disposed on a side portion of the semiconductor stack structure. The semiconductor stack structure may include a fluorinated area disposed adjacent to the insulating layer.
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公开(公告)号:US20240339489A1
公开(公告)日:2024-10-10
申请号:US18745970
申请日:2024-06-17
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Joo Woan CHO , Dae Ho SONG , Tae Hee LEE , Hyung Il JEON , Byeong Hwa CHOI
IPC: H01L27/15 , H01L23/00 , H01L23/48 , H01L25/18 , H01L27/105
CPC classification number: H01L27/156 , H01L23/481 , H01L24/06 , H01L25/18 , H01L24/05 , H01L24/08 , H01L24/16 , H01L24/48 , H01L27/105 , H01L2224/05025 , H01L2224/05541 , H01L2224/0613 , H01L2224/06181 , H01L2224/08225 , H01L2224/16145 , H01L2224/48229
Abstract: A display device includes a first substrate including a display area, a non-display area, and a plurality of pixel circuit units in the display area and the non-display area, a plurality of light emitting elements on the first substrate in the display area, the plurality of light emitting elements being electrically connected to the pixel circuit units, a hole mask layer on the first substrate and including a plurality of holes corresponding to the light emitting elements, a second substrate on the hole mask layer and including a plurality of open holes corresponding to the plurality of holes, and a plurality of light exit patterns in the plurality of the open holes of the second substrate corresponding to the plurality of holes, wherein each of the light exit patterns includes a first part in one of the plurality of open holes.
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公开(公告)号:US20240339083A1
公开(公告)日:2024-10-10
申请号:US18625960
申请日:2024-04-03
Applicant: Samsung Display Co., LTD.
Inventor: KYUMIN KIM , SUNG-HOON LIM , SEUNGSOK SON , WOOGEUN LEE
IPC: G09G3/3266
CPC classification number: G09G3/3266 , G09G2310/061 , G09G2310/08 , G09G2320/0233 , G09G2320/0247
Abstract: A gate driving circuit includes a stage configured to output a scan gate signal based on a scan clock signal, a voltage of a first node, and a voltage of a second node, and to output a sensing gate signal based on, a sensing clock signal, the voltage of the first node, and the voltage of the second node. The stage includes: a first sensing circuit configured to select a gate line to be sensed based on a S1 signal or to determine a frame reset based on a S7 signal; a first inverting circuit configured to control the first sensing circuit base on the S7 signal; and a second sensing circuit configured to control the voltage of the first node using the first sensing circuit based on a S2 signal. The frame reset is determined based on a maximum frequency of a variable frame frequency.
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