Overlapping sub-matrix based LDPC (low density parity check) decoder
    61.
    发明授权
    Overlapping sub-matrix based LDPC (low density parity check) decoder 有权
    重叠的基于子矩阵的LDPC(低密度奇偶校验)解码器

    公开(公告)号:US08327221B2

    公开(公告)日:2012-12-04

    申请号:US13549577

    申请日:2012-07-16

    IPC分类号: H03M13/00

    摘要: Overlapping sub-matrix based LDPC (Low Density Parity Check) decoder. Novel decoding approach is presented, by which, updated bit edge messages corresponding to a sub-matrix of an LDPC matrix are immediately employed for updating of the check edge messages corresponding to that sub-matrix without requiring storing the bit edge messages; also updated check edge messages corresponding to a sub-matrix of the LDPC matrix are immediately employed for updating of the bit edge messages corresponding to that sub-matrix without requiring storing the check edge messages. Using this approach, twice as many decoding iterations can be performed in a given time period when compared to a system that performs updating of all check edge messages for the entire LDPC matrix, then updating of all bit edge messages for the entire LDPC matrix, and so on. When performing this overlapping approach in conjunction with min-sum processing, significant memory savings can also be achieved.

    摘要翻译: 重叠的基于子矩阵的LDPC(低密度奇偶校验)解码器。 提出了新的解码方法,通过该方法,立即采用对应于LDPC矩阵的子矩阵的更新的位边消息来更新与该子矩阵相对应的校验边消息,而不需要存储位边消息; 立即采用对应于LDPC矩阵的子矩阵的更新的校验边消息来更新与该子矩阵相对应的位边消息,而不需要存储校验边消息。 与执行整个LDPC矩阵的所有校验边消息的更新的系统相比,使用这种方法,在给定时间段内可以执行两倍的解码迭代,然后更新整个LDPC矩阵的所有位边消息,以及 所以。 当结合最小和处理执行这种重叠方法时,也可以节省大量的内存。

    OVERLAPPING SUB-MATRIX BASED LDPC (LOW DENSITY PARITY CHECK) DECODER
    62.
    发明申请
    OVERLAPPING SUB-MATRIX BASED LDPC (LOW DENSITY PARITY CHECK) DECODER 有权
    重叠基于矩阵的LDPC(低密度奇偶校验)解码器

    公开(公告)号:US20120284583A1

    公开(公告)日:2012-11-08

    申请号:US13549577

    申请日:2012-07-16

    IPC分类号: H03M13/11 G06F11/10

    摘要: Overlapping sub-matrix based LDPC (Low Density Parity Check) decoder. Novel decoding approach is presented, by which, updated bit edge messages corresponding to a sub-matrix of an LDPC matrix are immediately employed for updating of the check edge messages corresponding to that sub-matrix without requiring storing the bit edge messages; also updated check edge messages corresponding to a sub-matrix of the LDPC matrix are immediately employed for updating of the bit edge messages corresponding to that sub-matrix without requiring storing the check edge messages. Using this approach, twice as many decoding iterations can be performed in a given time period when compared to a system that performs updating of all check edge messages for the entire LDPC matrix, then updating of all bit edge messages for the entire LDPC matrix, and so on. When performing this overlapping approach in conjunction with min-sum processing, significant memory savings can also be achieved.

    摘要翻译: 重叠的基于子矩阵的LDPC(低密度奇偶校验)解码器。 提出了新的解码方法,通过该方法,立即采用对应于LDPC矩阵的子矩阵的更新的位边消息来更新与该子矩阵相对应的校验边消息,而不需要存储位边消息; 立即采用对应于LDPC矩阵的子矩阵的更新的校验边消息来更新与该子矩阵相对应的位边消息,而不需要存储校验边消息。 与执行整个LDPC矩阵的所有校验边消息的更新的系统相比,使用这种方法,在给定时间段内可以执行两倍的解码迭代,然后更新整个LDPC矩阵的所有位边消息,以及 所以。 当结合最小和处理执行这种重叠方法时,也可以节省大量的内存。

    Apparatus and method for coding/decoding block low density parity check code in a mobile communication system
    63.
    发明授权
    Apparatus and method for coding/decoding block low density parity check code in a mobile communication system 有权
    在移动通信系统中对低密度奇偶校验码进行编码/解码的装置和方法

    公开(公告)号:US07962828B2

    公开(公告)日:2011-06-14

    申请号:US11831688

    申请日:2007-07-31

    IPC分类号: H03M13/00

    摘要: A method for generating a parity check matrix of a block LDPC code. The parity check matrix includes an information part corresponding to an information word and a first parity part and a second parity part each corresponding to a parity. The method includes determining a size of the parity check matrix based on a coding rate applied when coding the information word with the block LDPC code, and a codeword length; dividing a parity check matrix with the determined size into a predetermined number of blocks; classifying the blocks into blocks corresponding to the information part, blocks corresponding to the first parity part, and blocks corresponding to the second parity part; arranging permutation matrixes in predetermined blocks from among the blocks classified as the first parity part, and arranging identity matrixes in a full lower triangular form in predetermined blocks from among the blocks classified as the second parity part; and arranging the permutation matrixes in the blocks classified as the information part such that a minimum cycle length is maximized and weight values are irregular on a factor graph of the block LDPC code.

    摘要翻译: 一种用于产生块LDPC码的奇偶校验矩阵的方法。 奇偶校验矩阵包括对应于信息字的信息部分和对应于奇偶校验的第一奇偶校验部分和第二奇偶校验部分。 该方法包括基于在使用块LDPC码对信息字进行编码时应用的编码率和码字长度来确定奇偶校验矩阵的大小; 将具有所确定的大小的奇偶校验矩阵除以预定数量的块; 将块分类为对应于信息部分的块,对应于第一奇偶校验部分的块,以及对应于第二奇偶校验部分的块; 从分类为第一奇偶校验部分的块中将预定块中的置换矩阵排列在预定块中的整个下三角形形式中的单位矩阵,从被分类为第二奇偶校验部分的块中排列; 以及将排列矩阵排列在分组为信息部分的块中,使得最小周期长度最大化,权重值在块LDPC码的因子图上是不规则的。

    Apparatus and method for transmitting/receiving signal in a communication system using low density parity check code
    64.
    发明授权
    Apparatus and method for transmitting/receiving signal in a communication system using low density parity check code 有权
    在使用低密度奇偶校验码的通信系统中发送/接收信号的装置和方法

    公开(公告)号:US07890844B2

    公开(公告)日:2011-02-15

    申请号:US11528044

    申请日:2006-09-27

    IPC分类号: H03M13/00

    摘要: An apparatus is provided for transmitting a signal in a communication system using a Low Density Parity Check (LDPC) code. A controller determines a number of ‘0’s to be inserted in information data according to a first coding rate to be applied when generating the information data into an LDPC code, and determines the number of ‘0’s to be removed from the LDPC code. A ‘0’ inserter inserts ‘0s’ in the information data according to control of the controller. An LDPC encoder generates the LDPC code by encoding the ‘0’-inserted signal according to a first parity check matrix. A ‘0’ remover removes the inserted ‘0’s from the LDPC code.

    摘要翻译: 提供了一种用于在使用低密度奇偶校验(LDPC)码的通信系统中发送信号的装置。 控制器根据在将信息数据生成为LDPC码时应用的第一编码率来确定要插入到信息数据中的“0”数,并且确定要从LDPC码中移除的“0”的数目。 “0”插入器根据控制器的控制在信息数据中插入“0”。 LDPC编码器通过根据第一奇偶校验矩阵对“0”插入的信号进行编码来生成LDPC码。 “0”去除器从LDPC码中移除插入的0。

    Overlapping sub-matrix based LDPC (low density parity check) decoder
    65.
    发明授权
    Overlapping sub-matrix based LDPC (low density parity check) decoder 失效
    重叠的基于子矩阵的LDPC(低密度奇偶校验)解码器

    公开(公告)号:US07644339B2

    公开(公告)日:2010-01-05

    申请号:US11709078

    申请日:2007-02-21

    IPC分类号: H03M13/00

    摘要: Novel decoding approach is presented, by which, updated bit edge messages corresponding to a sub-matrix of an LDPC matrix are immediately employed for updating of the check edge messages corresponding to that sub-matrix without requiring storing the bit edge messages; also updated check edge messages corresponding to a sub-matrix of the LDPC matrix are immediately employed for updating of the bit edge messages corresponding to that sub-matrix without requiring storing the check edge messages. Using this approach, twice as many decoding iterations can be performed in a given time period when compared to a system that performs updating of all check edge messages for the entire LDPC matrix, then updating of all bit edge messages for the entire LDPC matrix, and so on. When performing this overlapping approach in conjunction with min-sum processing, significant memory savings can also be achieved.

    摘要翻译: 提出了新的解码方法,通过该方法,立即采用对应于LDPC矩阵的子矩阵的更新的位边消息来更新与该子矩阵相对应的校验边消息,而不需要存储位边消息; 立即采用对应于LDPC矩阵的子矩阵的更新的校验边消息来更新与该子矩阵相对应的位边消息,而不需要存储校验边消息。 与执行整个LDPC矩阵的所有校验边消息的更新的系统相比,使用这种方法,在给定时间段内可以执行两倍的解码迭代,然后更新整个LDPC矩阵的所有位边消息,以及 所以。 当结合最小和处理执行这种重叠方法时,也可以节省大量的内存。

    Irregularly structured, low density parity check codes
    66.
    发明授权
    Irregularly structured, low density parity check codes 失效
    不规则结构,低密度奇偶校验码

    公开(公告)号:US07458010B2

    公开(公告)日:2008-11-25

    申请号:US11174335

    申请日:2005-07-01

    申请人: Victor Stolpman

    发明人: Victor Stolpman

    IPC分类号: G06F11/00

    摘要: An error correction codeword. In one embodiment, an irregularly structured LDPC code ensemble possessing strong overall error performance and attractive storage requirements for a large set of codeword lengths. Embodiments of the invention can offer communication systems with better performance and lower terminal costs due to possible reductions in mandatory non-volatile memory over conventional systems.

    摘要翻译: 纠错码字。 在一个实施例中,不规则结构的LDPC码集合对于大的码字长度集合具有强的总体误差性能和有吸引力的存储要求。 由于与常规系统相关的强制性非易失性存储器的可能减少,本发明的实施例可以提供具有更好性能和更低终端成本的通信系统。

    Apparatus and method for coding/decoding block low density parity check code in a mobile communication system
    67.
    发明授权
    Apparatus and method for coding/decoding block low density parity check code in a mobile communication system 有权
    在移动通信系统中对低密度奇偶校验码进行编码/解码的装置和方法

    公开(公告)号:US07313752B2

    公开(公告)日:2007-12-25

    申请号:US10926932

    申请日:2004-08-26

    IPC分类号: G06F11/00

    摘要: A method for generating a parity check matrix of a block LDPC code is disclosed. The parity check matrix includes an information part corresponding to an information word and a first parity part and a second parity part each corresponding to a parity. The method includes determining a size of the parity check matrix based on a coding rate applied when coding the information word with the block LDPC code, and a codeword length; dividing a parity check matrix with the determined size into a predetermined number of blocks; classifying the blocks into blocks corresponding to the information part, blocks corresponding to the first parity part, and blocks corresponding to the second parity part; arranging permutation matrixes in predetermined blocks from among the blocks classified as the first parity part, and arranging identity matrixes in a full lower triangular form in predetermined blocks from among the blocks classified as the second parity part; and arranging the permutation matrixes in the blocks classified as the information part such that a minimum cycle length is maximized and weight values are irregular on a factor graph of the block LDPC code.

    摘要翻译: 公开了一种用于生成块LDPC码的奇偶校验矩阵的方法。 奇偶校验矩阵包括对应于信息字的信息部分和对应于奇偶校验的第一奇偶校验部分和第二奇偶校验部分。 该方法包括基于在使用块LDPC码对信息字进行编码时应用的编码率和码字长度来确定奇偶校验矩阵的大小; 将具有所确定的大小的奇偶校验矩阵除以预定数量的块; 将块分类为对应于信息部分的块,对应于第一奇偶校验部分的块,以及对应于第二奇偶校验部分的块; 从分类为第一奇偶校验部分的块中将预定块中的置换矩阵排列在预定块中的整个下三角形形式中的单位矩阵,从被分类为第二奇偶校验部分的块中排列; 以及将排列矩阵排列在分组为信息部分的块中,使得最小周期长度最大化,权重值在块LDPC码的因子图上是不规则的。