公开(公告)号：US09741301B2

公开(公告)日：2017-08-22

申请号：US14374562

申请日：2014-04-29

申请人： SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

发明人： Xiaojiang Yu

IPC分类号： G06F3/038 ,  G09G3/36

CPC分类号： G09G3/3648 ,  G09G3/3655 ,  G09G3/3674 ,  G09G3/3677 ,  G09G2310/0208 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28

摘要： A driving circuit of a display panel includes a switching unit, a clamping unit that prevents reverse current leakage, a reference signal line coupled to a low level signal, a pull-up unit, and a pull-up control unit that drives the pull-up unit. An input end of the pull-up unit receives a second clock signal, and an output end of the pull-up unit is coupled to a current scan line, where the current scan line is coupled to a pull-down maintain unit, and the pull-down maintain unit includes a first switching unit and a second switching unit. The first switching unit and the second switching unit are connected between the current scan line and the reference signal line in parallel, where a control end of the first switching unit and a control end of the second switching unit are coupled to an output end of the switching unit, a control end of the switching unit receives a first clock signal, and an input end of the switching unit receives the second clock signal through the clamping unit.

公开(公告)号：US09734918B2

公开(公告)日：2017-08-15

申请号：US15420876

申请日：2017-01-31

申请人： BOE TECHNOLOGY GROUP CO., LTD. ,  CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.

发明人： Xiaojing Qi ,  Bo Wu ,  Wen Tan ,  Young Yik Ko

IPC分类号： G11C19/28 ,  G09G3/36

CPC分类号： G11C19/28 ,  G09G3/20 ,  G09G3/36 ,  G09G3/3611 ,  G09G3/3674 ,  G09G5/18 ,  G09G2300/0404 ,  G09G2310/0248 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/062

摘要： The present invention provides a shift register, a driving method, a gate driving apparatus and a display apparatus. Said shift register comprises a pull-up unit, a reset unit, a pull-down unit and a signal output; the pull-up unit is connected to said signal output and pulls up an output signal; the reset unit is connected to a control end of said pull-up unit and said signal output respectively and resets the potential of the control end of said pull-up unit after said output signal is at high level; the pull-down unit is connected to a control end of said pull-up unit and said signal output respectively and pulls down the potential of the control end of said pull-up unit and said output signal after said reset unit has reset the potential of the control end of said pull-up unit, so that said pull-up unit switches off.

公开(公告)号：US09728113B2

公开(公告)日：2017-08-08

申请号：US14429172

申请日：2014-06-09

申请人： BOE TECHNOLOGY GROUP CO., LTD.

发明人： Qibing Dai

IPC分类号： G09G3/00 ,  G09G3/36 ,  G09G3/32 ,  G09G3/3266 ,  G09G3/3291

CPC分类号： G09G3/006 ,  G09G3/3266 ,  G09G3/3291 ,  G09G3/3674 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2300/0408 ,  G09G2330/021 ,  G09G2330/028

摘要： The present invention provides a control signal generating circuit, which comprises a signal output module comprising an output terminal, a first control signal input terminal and a second control signal input terminal, and the signal output module can selectively output the first control signal input from the first control signal input terminal or the second control signal input from the second control signal input terminal to a control signal receiving circuit via the output terminal. The present invention further provides a circuit system comprising the control signal generating circuit. When providing high-level signal and low-level signal for a control signal receiving circuit, the control signal generating circuit of the present invention only needs to switch between first control signal mode and second control signal mode, without complicated conversion. In addition, the control signal generating circuit of the present invention can test various control signal receiving circuits which need quick action.

公开(公告)号：US20170193951A1

公开(公告)日：2017-07-06

申请号：US15464242

申请日：2017-03-20

申请人： Xiamen Tianma Micro-Electronics Co., Ltd. ,  Tianma Micro-Electronics Co., Ltd.

发明人： Yuan LI ,  Zifeng Chen

IPC分类号： G09G3/36 ,  G02F1/1368 ,  G02F1/1362

CPC分类号： G09G3/3674 ,  G02F1/136286 ,  G02F1/1368 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0224 ,  G09G2310/0281 ,  G09G2320/0209 ,  G09G2320/0223 ,  G09G2320/0247

摘要： The invention discloses a thin film transistor drive circuit and a drive method thereof and a liquid crystal display device. The thin film transistor drive circuit includes a plurality of scan lines, a scan signal output port configured to sequentially apply a scan signal to each of the scan lines, and a plurality of logic circuits. Each of the logic circuits is connected with one of the scan lines and a control signal line. The logic circuits are added to a drive circuit, and an input control signal corresponding to a truth table of the logic circuit is input for a preset duration by using a logic relationship of the logic circuit, so that an output control signal output to a scan line can be obtained to improve a scan signal on the scan line, to improve a delay distortion at the time of being turned off.

公开(公告)号：US20170193930A1

公开(公告)日：2017-07-06

申请号：US15150469

申请日：2016-05-10

申请人： AU Optronics Corporation

发明人： Sheng-Ju Ho ,  Meng-Chiou Huang ,  Chia-Hui Pai ,  Shang-Jie Wu ,  Yi-Jung Chen ,  Hung-Che Lin

IPC分类号： G09G3/36

CPC分类号： G09G3/3607 ,  G09G3/3674 ,  G09G2300/0426 ,  G09G2300/0443 ,  G09G2300/0452 ,  G09G2320/0666

摘要： A pixel structure includes a scan line, a data line, first and second common lines, first and second sub-pixels, and a color filter layer. The scan line is disposed between the first and second common lines. The first sub-pixel and the second pixel respectively include an active device and a pixel electrode. The pixel electrode of the first sub-pixel is disposed between the scan line and the first common line. The pixel electrode of the second sub-pixel is disposed between the scan line and the second common line. The pixel electrode is connected to the active device through a contact hole. The pixel electrode includes a first side and a second side opposite to each other, wherein the first side of the pixel electrode is adjacent to the scan line, and the contact hole is disposed at an edge of the pixel electrode adjacent to the second side. The color filter layer has an opening exposing the active devices of the first sub-pixel and the second sub-pixel.

公开(公告)号：US20170186392A1

公开(公告)日：2017-06-29

申请号：US14777208

申请日：2014-06-27

申请人： SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO. LTD.

发明人： Ping-Sheng KUO ,  Tai-Jiun HWANG

IPC分类号： G09G3/36

CPC分类号： G09G3/3674 ,  G09G3/2096 ,  G09G3/3611 ,  G09G3/3685 ,  G09G2310/0278 ,  G09G2310/0289

摘要： The present invention provides an electronic device (100) having smaller number of drive chips and including a timing controller (10), a gate and a source drive chips (20, 30), a pixel cells matrix (60) and a multiplexer (40). The multiplexer (40) includes a plurality of first signal outputs connected to the pixel cells matrix (60). The timing controller (10) might generate enable signals for the multiplexer (40). In this way, the multiplexer (40) could output scan signals to the pixel cells matrix by a corresponding signal end. The number of the drive chips could be reduced by the present invention.

公开(公告)号：US20170179161A1

公开(公告)日：2017-06-22

申请号：US15391938

申请日：2016-12-28

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Atsushi UMEZAKI ,  Hiroyuki MIYAKE

IPC分类号： H01L27/12 ,  G09G3/20 ,  H01L27/02

CPC分类号： H01L27/124 ,  G09G3/2092 ,  G09G3/3266 ,  G09G3/3674 ,  G09G3/3677 ,  G09G2300/0809 ,  G09G2310/0205 ,  G09G2310/0248 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/0291 ,  G09G2310/061 ,  G09G2320/0646 ,  G09G2320/0666 ,  G11C19/28 ,  H01L27/0207 ,  H01L27/1222 ,  H01L27/1225

摘要： To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor, a clock signal is input to a gate electrode of the first switching transistor, and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.

公开(公告)号：US09686533B2

公开(公告)日：2017-06-20

申请号：US14882336

申请日：2015-10-13

申请人： Shanghai Tianma Micro-Electronics Co., Ltd. ,  Tianma Micro-Electronics Co., Ltd.

发明人： Jialing Li ,  Lei Niu ,  Zhihua Ling

IPC分类号： H04N13/04 ,  G09G1/06 ,  G09G3/20 ,  G09G3/00 ,  G09G3/36

CPC分类号： H04N13/31 ,  G09G3/003 ,  G09G3/20 ,  G09G3/3614 ,  G09G3/3674 ,  G09G2310/021 ,  G09G2310/0218 ,  H04N13/144 ,  H04N13/398

摘要： In general, embodiments of the present invention provide a 3D panel, a method for driving the 3D panel, and an electronic device. The method includes: driving a first group of gate lines row by row and displaying a first image, in scanning a (4k+1)-th frame, k being a natural number; driving a second group of gate lines row by row and displaying a second image, in scanning a (4k+2)-th frame; driving the first group of gate lines row by row and displaying a third image, in scanning a (4k+3)-th frame; driving the second group of gate lines row by row and displaying a fourth image, in scanning a (4k+4)-th frame. Gate lines in the first group of gate lines and those in the second group are arranged alternately. Scanning directions of the (4k+1)-th frame and the (4k+3)-th frame are opposite. Scanning directions of the (4k+2)-th frame and the (4k+4)-th frame are opposite.

公开(公告)号：US20170168620A1

公开(公告)日：2017-06-15

申请号：US15368473

申请日：2016-12-02

申请人： LG Display Co., Ltd.

发明人： SeonGeun GIM

IPC分类号： G06F3/041 ,  G06F3/044 ,  G09G3/36

CPC分类号： G06F3/0412 ,  G06F3/0416 ,  G06F3/044 ,  G09G3/3655 ,  G09G3/3674 ,  G09G3/3685 ,  G09G3/3696 ,  G09G2310/08 ,  G09G2354/00

摘要： A display device with a built-in touch screen according to the present disclosure includes a display panel, a data driver, a gate driver, a touch sensing unit, a common voltage supplier, and a switch circuit, and further includes a common voltage adjuster to supply different common voltages to touch electrodes of the display panel, thereby resolving a local stain or screen vibration problem occurring on the display panel. Further, a method for driving a display device with a built-in touch screen according to one embodiment includes: switching the display panel from a touch mode to a display mode, generating different common voltages, and supplying two or more of the different common voltages to a plurality of touch electrodes (TE) or groups of touch electrodes (TE), thereby resolving an image quality defect.

公开(公告)号：US09672936B2

公开(公告)日：2017-06-06

申请号：US14775719

申请日：2015-08-12

申请人： Shenzhen China Star Optoelectronics Technology Co., Ltd. ,  Wuhan China Star Optoelectronics Technology Co., Ltd.

发明人： Sikun Hao

IPC分类号： G11C19/28 ,  H03K19/20 ,  H03K19/00 ,  G09G3/36

CPC分类号： G11C19/28 ,  G09G3/3674 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G11C19/184 ,  H03K19/0013 ,  H03K19/20

摘要： A driving circuit and a shift register circuit are disclosed. The driving circuit includes a plurality of cascaded multi-stages shift register circuits. Each of the shift register circuit includes a transmission door latch circuit and a signal transmission circuit. The transmission door latch circuit includes a transmission door, first clock signals triggering the transmission door such that transmission signals of two stages ahead are transmitted to the signal transmission circuit via the transmission door to generate transmission signals for the current stage. Second clock signals control the transmission signals of the current stage to pass through the signal transmission circuit to generate gate driving signals for the current stage. In this way, the driving circuit is feasible for CMOS manufacturing process, and owns the advantages such as low power consumption and high noise tolerance.