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公开(公告)号：US20220416436A1
公开(公告)日：2022-12-29
申请号：US17356853
申请日：2021-06-24
Applicant: Silicon Laboratories Inc.
Inventor： Attila Zólomy , Adám Süle , Andrea Nagy , Jeffrey Tindle , Pasi Rahikkala , Terry Lee Dickey
Abstract: An antenna array that utilizes ground guard rings and metamaterial structures is disclosed. In certain embodiments, the antenna array is constructed from a plurality of antenna unit cells, wherein each antenna unit cell is identical. The antenna unit cell comprises a top surface, that contains a patch antenna and a ground guard ring. A reactive impedance surface (RIS) layer is disposed beneath the top surface and contains the metamaterial structures. The metamaterial structures are configured to present an inductance to the patch antennas, thereby allowing the patch antennas to be smaller than would otherwise be possible. In some embodiments, the metamaterial structures comprise hollow square frames. An antenna array constructed using this antenna unit cell has less coupling than conventional antenna arrays, which results in better performance. Furthermore, this new antenna array also requires less space than conventional antenna arrays.
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公开(公告)号：US11502883B2
公开(公告)日：2022-11-15
申请号：US17108912
申请日：2020-12-01
Applicant: Silicon Laboratories Inc.
Inventor： Wentao Li , Michael A. Wu , Yan Zhou
Abstract: A mixer in a receiver converts a sounding sequence of alternating ones and zeros to an intermediate frequency signal. A digital mixer converts the intermediate frequency signal to a baseband signal that contains a positive tone and a negative tone. A frequency offset correction circuit generates frequency offset corrections based on frequency offset estimates of the frequency offset between a transmitter of the sounding sequence and the receiver. A frequency adjustment circuit adjusts a frequency of the mixer or the digital mixer to thereby center the positive tone and the negative tone around DC. DFT circuits perform single bin DFTs respectively centered on the positive and negative tones. Phases of the positive and negative tones are calculated based on outputs of the DFT circuits and the phases are used to determine fractional time value associated with a distance measurement between the transmitter and receiver.
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63.发明申请公开(公告)号：US20220341989A1
公开(公告)日：2022-10-27
申请号：US17241164
申请日：2021-04-27
Applicant: Silicon Laboratories Inc.
Inventor： Wenshui Zhang , Wei Jue Lim
Abstract: A test system for high voltage testing of semiconductor devices including at least one test socket and a docking plate assembly. Each test socket includes a socket enclosure for encompassing first and second contact finger assemblies, in which the socket enclosure may include a cover and alignment plate. At least one test socket is embedded within the docking plate assembly which is configured to mount between high voltage test head and a pick and place handler. The docking plate assembly and each test socket includes one or more site openings each for receiving a corresponding device under test (DUT) during a high voltage test procedure. Each contact finger assembly includes at least one contact finger configured as an elongated conductor with a bent tip for electrically interfacing a pad of the DUT.
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公开(公告)号：US20220326725A1
公开(公告)日：2022-10-13
申请号：US17847404
申请日：2022-06-23
Applicant: Silicon Laboratories Inc.
Inventor： RICKY SETIAWAN , HUA BENG CHAN , REX TAK YING WONG
Abstract: In an embodiment, an apparatus includes: an amplifier to compare a reference voltage to a feedback voltage and to output a comparison signal based on the comparison; a first loop circuit coupled to the amplifier to receive the comparison signal and output a first feedback voltage for the amplifier to use as the feedback voltage in a first mode of operation; and a second loop circuit coupled to the amplifier. The second loop circuit may be configured to receive the comparison signal and output a second feedback voltage for the amplifier to use as the feedback voltage in a second mode of operation. The second feedback voltage may be greater than the first feedback voltage, and the second loop circuit may output a regulated voltage based on the comparison signal.
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公开(公告)号：US11415657B2
公开(公告)日：2022-08-16
申请号：US16587221
申请日：2019-09-30
Applicant: Silicon Laboratories Inc.
Inventor： Antonio Torrini , Sebastian Ahmed , Joel Kauppo , Sauli Johannes Lehtimaki
Abstract: A system and method of determining the angle of arrival or departure using a neural network is disclosed. The system collects a plurality of I and Q samples as a packet containing a constant tone extension is being received. The I and Q samples are used to form I and Q arrays, which are used as the input to the neural network. The neural network produces a first output representative of the azimuth angle and a second output representative of the elevation angle. In certain embodiments, the neural network is capable of detecting a plurality of angles, where, for each angle, there are three outputs, a first output representative of the azimuth angle, a second output representative of the elevation angle and a third output representative of the relative amplitude. In some embodiments, the neural network is configured to determine the carrier frequency offset of an incoming signal as well.
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Patent Agency Ranking
66.发明申请公开(公告)号：US20220216609A1
公开(公告)日：2022-07-07
申请号：US17705260
申请日：2022-03-25
Applicant: Silicon Laboratories Inc.
Inventor： Attila Zolomy , Thomas E. Voor , Zoltan Vida
Abstract: An apparatus includes a substrate and a loop antenna formed using the substrate. The loop antenna includes a set of gaps formed to isolate a first part of the loop antenna from a second part of the loop antenna.
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公开(公告)号：US11368359B2
公开(公告)日：2022-06-21
申请号：US17066819
申请日：2020-10-09
Applicant: Silicon Laboratories Inc.
Inventor： Bharat Raju Dandu , Robert Alexander
IPC: H04L41/069 , G06F11/07 , H04W84/18
Abstract: A system and method for remotely monitoring and analyzing devices on a wireless network, such as a ZIGBEE® network, is disclosed. The devices store event logs in a memory device whenever certain events occurs. These event logs are transmitted to a gateway device. The gateway device may operate in standalone mode or in network coprocessor (NCP) mode. The gateway device may then decode the event logs into a human readable output. This human readable output may then be uploaded to a server in the cloud, where further analysis of the human readable output may be performed. This information may then be retrieved by remote devices, such as smart phones. In other modes, the event logs are uploaded to the server in the cloud and the decoding is performed in the cloud.
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公开(公告)号：US11366898B2
公开(公告)日：2022-06-21
申请号：US16686486
申请日：2019-11-18
Applicant: Silicon Laboratories Inc.
Inventor： Jeffrey Lee Sonntag , Timothy Thomas Rueger
Abstract: In one form, an integrated circuit includes a plurality of electromagnetic fault injection (EMFI) sensors and a security management circuit. Each EMFI sensor includes a sense loop having a conductor around a corresponding portion of logic circuitry whose operation is affected by an electromagnetic pulse, and a detector circuit coupled to the sense loop and having an output for providing a pulse detection signal in response to a pulse of at least a predetermined magnitude. The security management circuit performs a protection operation to secure the integrated circuit in response to an activation of a corresponding pulse detection signal of one of the plurality of EMFI sensors.
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公开(公告)号：US11353903B1
公开(公告)日：2022-06-07
申请号：US17219225
申请日：2021-03-31
Applicant: Silicon Laboratories Inc.
Inventor： Abdulkerim L Coban
Abstract: A voltage reference circuit that can operate in a large supply voltage range with high PSRR, that dissipates low-power for a given output noise, and that has a low temperature-coefficient (TC) across a wide-temperature range. The voltage reference circuit does not require any calibration for low TC and high PSRR, occupies a relatively small circuit area, may be used without additional supply filtering in noisy or high-ripple supply environments, and is more robust against device mismatch effects particularly compared to designs based on sub-threshold operations. The voltage reference circuit is a special form of constant transconductance circuit that uses current mirror ratios that are chosen to achieve high PSSR and low noise properties. The device saturation voltage may be chosen so that flat temperature characteristics may be achieved.
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公开(公告)号：US20220174632A1
公开(公告)日：2022-06-02
申请号：US17107281
申请日：2020-11-30
Applicant: Silicon Laboratories Inc.
Inventor： John M. Khoury , Yan Zhou , Michael A. Wu
IPC: H04W56/00
Abstract: In at least one embodiment, a method for measuring a distance between a first communications device including a first local oscillator and a second communications device including a second local oscillator includes unwrapping N phase values to generate N unwrapped phase values. N is an integer greater than one. Each of the N phase values indicate an instantaneous phase of a received signal. The method includes averaging the N unwrapped phase values to generate an average phase value. The method includes wrapping the average phase value to generate a final phase measurement of the first local oscillator with respect to the second local oscillator.
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